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From: Dave Brolley <brolley@redhat.com>
To: Joern Rennecke <joernr@arc.com>
Cc: cgen@sources.redhat.com
Subject: Re: insert evaluation for multi-ifields broken
Date: Thu, 22 Feb 2007 16:56:00 -0000	[thread overview]
Message-ID: <45DDCB1D.6050605@redhat.com> (raw)
In-Reply-To: <20070222160755.GB8064@elsdt-razorfish.arc.com>

Joern Rennecke wrote:

>When I want to put a constant into a multi-ifield, the
>exact instructions how to set the subfields are apparently ignored, and the
>total value is copied into the subfields.
>  
>
This does appear to be broken. This is probably the first time someone 
has attempted this, since you could use f-a and f-c directly.

(dni
  swi
  ""
  "swi"
  (+ (f-a 1) (f-b 3) (f-c 2) (f-d 4))
  ()
  (sequence ()
    (set pc (c-call SI "foo_trap" pc 0)))
)

Multi-ifields are generally used in conjuction with an operand. I'm not 
saying you shouldn't be able to do what you're attempting, just that no 
one has likely tried it before.

Dave

>I have found this while working on my machine desscription,
>and I could reproduce this with a small synthetic testcase, attached as
>foo.cpu.  I've put tis file into the cgen/cpu directory, and
>then with the cgen directory as the cwd, invoked guile and evaluated:
>(load "dev.scm")
>(load-sim)
>(cload #:arch "foo" #:machs "foo")
>(cgen-decode.c)
>
>note that the expected value to check entire_insn against is 0x1324,
>but generated test is:
>        if ((entire_insn & 0xffff) == 0x12424)
>  
>
>------------------------------------------------------------------------
>
>(include "simplify.inc")
>
>(define-arch
>  (name foo) ; name of cpu family
>  (comment "")
>  (default-alignment aligned)
>  (insn-lsb0? #f)
>  (machs foo)
>  (isas foo)
>)
>
>(define-isa
>  (name foo)
>
>  ; The default size of an instruction in bits
>  (default-insn-bitsize 16)
>
>  (base-insn-bitsize 16)
>
>  (default-insn-word-bitsize 16)
>)
>
>(define-cpu
>  (name foo)
>  (comment "")
>  (endian either)
>  (word-bitsize 16)
>  ; Generated files have an "f" suffix.
>  (file-transform "f")
>)
>
>(define-mach
>  (name foo)
>  (comment "")
>  (cpu foo)
>)
>
>(dnf  f-a "op a" ()  0 4)
>(dnf  f-b "op a" ()  4 4)
>(dnf  f-c "op a" ()  8 4)
>(dnf  f-d "op a" () 12 4)
>(dnmf f-ac "op ac" () UINT
>  (f-a f-c)
>  (sequence () ; insert
>    (set (ifield f-c) (and (ifield f-ac) (const 15)))
>    (set (ifield f-a) (srl (ifield f-ac) (const  4)))
>  )
>  (sequence () ; extract
>    (set (ifield f-ac) (or (ifield f-c) (sll (ifield f-a) 4)))
>  )
>)
>
>(define-pmacro (dni xname xcomment xsyntax xformat xattrs xsemantics)
>  (define-insn
>    (name xname)
>    (comment xcomment)
>    (.splice attrs (.unsplice xattrs))
>    (syntax xsyntax)
>    (format xformat)
>    (semantics xsemantics)
>    )
>)
>
>(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
>
>(dni
>  swi
>  ""
>  "swi"
>  (+ (f-ac 18) (f-b 3) (f-d 4))
>  ()
>  (sequence ()
>    (set pc (c-call SI "foo_trap" pc 0)))
>)
>
>  
>

  reply	other threads:[~2007-02-22 16:56 UTC|newest]

Thread overview: 26+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2007-02-13 15:37 delayed branches and zero overhead loops Joern Rennecke
2007-02-13 18:51 ` Frank Ch. Eigler
2007-02-13 21:00   ` Joern Rennecke
2007-02-13 21:12     ` Frank Ch. Eigler
2007-02-13 22:21       ` Joern Rennecke
2007-02-14 17:09         ` Dave Brolley
2007-02-14 18:30           ` Joern Rennecke
2007-02-14 19:52             ` Dave Brolley
2007-02-14 20:15               ` Joern Rennecke
2007-02-16 20:54                 ` Dave Brolley
2007-02-19  3:39                   ` Joern Rennecke
     [not found]                     ` <45D9C06A.4030903@redhat.com>
2007-02-19 15:56                       ` Joern Rennecke
2007-02-19 16:07                         ` Frank Ch. Eigler
2007-02-19 18:14                           ` Joern Rennecke
2007-02-19 18:19                             ` Dave Brolley
2007-02-22 15:50                               ` Joern Rennecke
2007-02-22 16:08                               ` insert evaluation for multi-ifields broken Joern Rennecke
2007-02-22 16:56                                 ` Dave Brolley [this message]
2007-02-22 18:14                                   ` Joern Rennecke
2007-02-23 17:45                                     ` Dave Brolley
2007-02-15 16:54               ` delayed branches and zero overhead loops Joern Rennecke
2007-02-14 18:58       ` decode-bitsize (Was: Re: delayed branches and zero overhead loops) Joern Rennecke
2007-02-13 19:25 ` delayed branches and zero overhead loops Doug Evans
2007-02-13 20:38   ` Joern Rennecke
2007-02-14 18:30     ` Doug Evans
2007-02-14 19:22       ` Joern Rennecke

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