Re: include/dis-asm.h patch for cgen disassemblers

[Andrew Cagney <ac131313@cygnus.com>]

> Hi -
> 
> cagney wrote:
> 
>> [...]
> 
>> > isa ~= instruction set ~= group of machine instructions decodable;
>> > can be a function of cpu state
> 
>> 
>> Er, ISA == Instruction Set Architecture which to me is bfd_architecture. 
>> I think, here you're looking for something else.
>> 
>> For instance, Arm has thumb and MIPS has MIPS16.  They are modes but 
>> sill part of a single ISA.
> 
> 
> Yes, but not in an interesting sense.  It's much like the IA32 engine
> inside IA64: they surely aren't the same ISA, despite being executable
> by the same hardware, and operating partly on the same registers.
> Sure, arm & thumb are closer together, and they may be documented in
> the same publication, but that's not substantial to this question.


Yes, and both bfd_arch_ia64 and bfd_arch_i386 are defined as separate 
bfd_architectures.


> The conceptual issue is whether or not the choice of instructions
> available is a function of processor state.  For the purposes of
> tools like disassemblers and simulators, and really even assemblers
> and compilers, each such group forms a separate instruction set.


Sorry, can you try that again.

Andrew