* Disassembly with variable instruction size
@ 2006-07-27 8:00 Ronald Hecht
0 siblings, 0 replies; only message in thread
From: Ronald Hecht @ 2006-07-27 8:00 UTC (permalink / raw)
To: cgen
[-- Attachment #1: Type: text/plain, Size: 606 bytes --]
Hello,
I'm porting a very simple architecture for educational purposes. I got
gas working, but the dissasemble with objdump not. It is an 8 bit
processor with variable instruction size. The first byte is the opcode
the second an 8 bit immediate or together with the third byte an 16 bit
immediate. The disassemble of the "make gas-test" looks very strange,
whereas the object file is correct.
I played with "lsb0". As I saw in the mailing list there are problems
with #t. So I decided to use #f.
Attached is the cpu file, the assemble, disasemble, and the object file.
Thanks in advance
Ronald
[-- Attachment #2: proc.cpu --]
[-- Type: text/plain, Size: 1941 bytes --]
; Simple 8 Bit Processor -*- Scheme -*-
(include "simplify.inc")
; FIXME: Delete sign extension of accumulator results.
; Sign extension is done when accumulator is read.
; define-arch must appear first
(define-arch
(name proc) ; name of cpu family
(comment "8 Bit Processor")
(insn-lsb0? #f)
(machs proc)
(isas proc)
)
(define-isa
(name proc)
(default-insn-bitsize 8)
(base-insn-bitsize 8)
(default-insn-word-bitsize 8)
)
(define-cpu
(name proc)
(comment "8 Bit Processor Family")
(endian big)
(word-bitsize 8)
)
(define-mach
(name proc)
(comment "8 Bit FPGA Processor")
(cpu proc)
)
(define-model
(name proc)
(comment "8 Bit Processor Model")
(attrs)
(mach proc)
(unit u-exec "Execution Unit" () 1 1
() () () ())
)
(dnf f-op "op" () 0 8)
(dnf f-uimm8 "unsigned 8 bit immediate" () 8 8)
(dnf f-uimm16 "unsigned 16 bit immediate" () 8 16)
(define-normal-insn-enum
insn-op "insn format enums" () OP_ f-op
(.map .str (.iota 256))
)
(dnh h-pc "program counter" (PC PROFILE) (pc) () () ())
(define-hardware
(name h-accu)
(comment "Accumulator")
(attrs PROFILE );CACHE-ADDR)
(type register DI )
)
(define-attr
(for operand)
(type boolean)
(name HASH-PREFIX)
(comment "immediates have an optional '#' prefix")
)
(dnop accu "accumulator" () h-accu f-nil)
(dnop uimm8 "unsigned 8 bit immediate" () h-uint f-uimm8)
(dnop uimm16 "unsigned 16 bit immediate" () h-uint f-uimm16)
(dni nop "nop"
()
"nop"
(+ OP_0)
(nop)
()
)
(dni lda "lda"
()
"lda $uimm16"
(+ OP_1 uimm16)
(set accu (mem WI uimm16))
()
)
(dni ldc "ldc"
()
"ldc $uimm8"
(+ OP_2 uimm8)
(set accu uimm8)
()
)
(dni decx "decx"
()
"decx"
(+ OP_100)
(nop)
()
)
(dni decy "decy"
()
"decy"
(+ OP_101)
(nop)
()
)
[-- Attachment #3: allinsn.d --]
[-- Type: text/x-dsrc, Size: 881 bytes --]
#as:
#objdump: -dr
#name: allinsn
*: +file format .*
Disassembly of section \.text:
00000000 <nop>:
\.\.\.
00000001 <lda>:
1: 01 00 -> lda 0x100
3: 00 01 -> nop
5: ff ff || \*unknown\*
7: 01 80 -> lda 0xffff
9: 00 01 -> nop
b: 7f ff -> \*unknown\*
d: 01 00 -> lda 0x100
f: 01 01 -> lda 0x100
11: c5 bd || \*unknown\*
13: 01 fa -> lda 0xc5bd
15: 6d 01 -> \*unknown\*
17: 5e 51 -> \*unknown\*
00000019 <ldc>:
19: 02 00 -> ldc 0x2
1b: 02 ff -> ldc 0x2
1d: 02 80 -> ldc 0x2
1f: 02 7f -> ldc 0x2
21: 02 01 -> ldc 0x2
23: 02 f7 -> ldc 0x2
25: 02 54 -> ldc 0x2
27: 02 ea -> ldc 0x2
00000029 <decx>:
29: 64 65 -> decx
0000002a <decy>:
2a: 65 00 -> decy
[-- Attachment #4: allinsn.s --]
[-- Type: text/plain, Size: 334 bytes --]
.data
foodata: .word 42
.text
footext:
.text
.global nop
nop:
nop
.text
.global lda
lda:
lda 0
lda 65535
lda 32768
lda 32767
lda 1
lda 50621
lda 64109
lda 24145
.text
.global ldc
ldc:
ldc 0
ldc 255
ldc 128
ldc 127
ldc 1
ldc 247
ldc 84
ldc 234
.text
.global decx
decx:
decx
.text
.global decy
decy:
decy
[-- Attachment #5: a.out --]
[-- Type: application/octet-stream, Size: 204 bytes --]
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