public inbox for cgen@sourceware.org
 help / color / mirror / Atom feed
From: Dave Korn <dave.korn.cygwin@googlemail.com>
To: cgen@sources.redhat.com
Subject: unable to find precise mode to match cpu word-bitsize 24
Date: Sun, 21 Jun 2009 19:02:00 -0000	[thread overview]
Message-ID: <4A3E86AA.2080002@gmail.com> (raw)


    Hello CGEN list,

  I'm attempting to develop a model of a CPU that has a natural 24-bit
wordsize: 24-bit registers, 24-bit ALU, 24-bit data bus... 24-bit everything,
and no subword or unaligned accesses - in fact, you could really call them
24-bit bytes, as it's the minimum addressable unit.

  A naive attempt to just write

(define-cpu
	[ . . . ]
  (word-bitsize 24)
	[ . . . ]
)

fails with the error message from the title of this post.  I've crudely hacked
in a couple of three-quarter int modes like this:

Index: mode.scm
===================================================================
RCS file: /cvs/src/src/cgen/mode.scm,v
retrieving revision 1.4
diff -p -u -r1.4 mode.scm
--- mode.scm    16 Jul 2003 05:35:47 -0000      1.4
+++ mode.scm    21 Jun 2009 18:45:00 -0000
@@ -499,6 +499,7 @@ Define a mode, all arguments specified.

     (dfm 'QI "8 bit byte" '() 'INT 8 1 "int" "'x'" #f #f #f)
     (dfm 'HI "16 bit int" '() 'INT 16 2 "int" "'x'" #f #f #f)
+    (dfm 'TQI "24 bit int" '() 'INT 24 3 "int" "'x'" #f #f #f)
     (dfm 'SI "32 bit int" '() 'INT 32 4 "int" "'x'" #f #f #f)
     (dfm 'DI "64 bit int" '(FN-SUPPORT) 'INT 64 8 "" "'D'" #f #f #f)

@@ -506,6 +507,8 @@ Define a mode, all arguments specified.
         8 1 "unsigned int" "'x'" (mode:lookup 'QI) #f #f)
     (dfm 'UHI "16 bit unsigned int" '() 'UINT
         16 2 "unsigned int" "'x'" (mode:lookup 'HI) #f #f)
+    (dfm 'UTQI "24 bit unsigned int" '() 'UINT
+        24 3 "unsigned int" "'x'" (mode:lookup 'TQI) #f #f)
     (dfm 'USI "32 bit unsigned int" '() 'UINT
         32 4 "unsigned int" "'x'" (mode:lookup 'SI) #f #f)
     (dfm 'UDI "64 bit unsigned int" '(FN-SUPPORT) 'UINT


just so that I can get on with writing my i-fields, but will it work?  If I
want my (simulated) pc to increment in steps of 1, not 3, should I define the
number of bytes to 1 instead of 3?  Or would I be best off redefining QI mode
altogether?  Sorry if this is a n00b question, but a bit of googling and
grepping didn't show up anyone trying this before.

    cheers,
      DaveK


             reply	other threads:[~2009-06-21 19:02 UTC|newest]

Thread overview: 6+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2009-06-21 19:02 Dave Korn [this message]
2009-06-21 23:07 ` Doug Evans
2009-06-22  0:05   ` Dave Korn
2009-06-22 17:05     ` Doug Evans
2009-07-04 23:35       ` Dave Korn
2009-07-14  5:59         ` Doug Evans

Reply instructions:

You may reply publicly to this message via plain-text email
using any one of the following methods:

* Save the following mbox file, import it into your mail client,
  and reply-to-all from there: mbox

  Avoid top-posting and favor interleaved quoting:
  https://en.wikipedia.org/wiki/Posting_style#Interleaved_style

* Reply using the --to, --cc, and --in-reply-to
  switches of git-send-email(1):

  git send-email \
    --in-reply-to=4A3E86AA.2080002@gmail.com \
    --to=dave.korn.cygwin@googlemail.com \
    --cc=cgen@sources.redhat.com \
    /path/to/YOUR_REPLY

  https://kernel.org/pub/software/scm/git/docs/git-send-email.html

* If your mail client supports setting the In-Reply-To header
  via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).