[ECOS] imx31 litekit redboot support

[ECOS] imx31 litekit redboot support

[HASAN HÜSEYIN YILMAZ]

[-- Attachment #1: Type: text/plain, Size: 635 bytes --]

Hi All
       I was working on redboot tried to run it on imx31 litekit. I
successfully run redboot on imx31litekit I would like to share my
work.  my work was built on top of freescale's latest redboot release.

this is ecos base ecos_20050912.tar.gz
freescale's patch for basic support   patch-redboot-200650-base
freescale's patch for ads  support   patch-redboot-200650-mx31

on top of all of this here is my patch

put the patch file  in package directory

patch -p1 < redboot-imx31litekit.patch

this patch only have nor nand and serial console support. Ethernet
driver didnt implemented.
Regards,

-- 
----
Hasan Hüseyin Yılmaz

[-- Attachment #2: redboot-imx31litekit.patch --]
[-- Type: text/x-patch, Size: 21547 bytes --]

diff -uNr /home/Development/Redboot/src/ecos/packages/devs/flash/arm/mx31ads/current/cdl/flash_board_spansion.cdl packages/devs/flash/arm/mx31ads/current/cdl/flash_board_spansion.cdl
--- /home/Development/Redboot/src/ecos/packages/devs/flash/arm/mx31ads/current/cdl/flash_board_spansion.cdl	2007-04-02 18:35:54.000000000 +0300
+++ packages/devs/flash/arm/mx31ads/current/cdl/flash_board_spansion.cdl	2007-04-02 18:52:26.000000000 +0300
@@ -61,11 +61,11 @@
 
     # Arguably this should do in the generic package
     # but then there is a logic loop so you can never enable it.
-    cdl_interface CYGINT_DEVS_FLASH_AMD_AM29XXXXX_REQUIRED {
+    cdl_interface CYGINT_DEVS_FLASH_INTEL_28FXXX_REQUIRED {
         display   "Generic AMD FlashFile driver required"
     }
 
-    implements    CYGINT_DEVS_FLASH_AMD_AM29XXXXX_REQUIRED
+    implements    CYGINT_DEVS_FLASH_INTEL_28FXXX_REQUIRED
 
-    requires      CYGHWR_DEVS_FLASH_S29WS256N
+    requires      CYGHWR_DEVS_FLASH_INTEL_28F320C3
 }
diff -uNr /home/Development/Redboot/src/ecos/packages/devs/flash/arm/mx31ads/current/src/board_spansionflash.c packages/devs/flash/arm/mx31ads/current/src/board_spansionflash.c
--- /home/Development/Redboot/src/ecos/packages/devs/flash/arm/mx31ads/current/src/board_spansionflash.c	2007-04-02 18:35:54.000000000 +0300
+++ packages/devs/flash/arm/mx31ads/current/src/board_spansionflash.c	2007-04-02 18:53:32.000000000 +0300
@@ -70,4 +70,4 @@
 
 //--------------------------------------------------------------------------
 // Now include the driver code.
-#include "cyg/io/flash_am29xxxxx.inl"
+#include "cyg/io/flash_28fxxx.inl"
diff -uNr /home/Development/Redboot/src/ecos/packages/devs/flash/arm/mxc/current/include/mxc_nand_parts.inl packages/devs/flash/arm/mxc/current/include/mxc_nand_parts.inl
--- /home/Development/Redboot/src/ecos/packages/devs/flash/arm/mxc/current/include/mxc_nand_parts.inl	2007-04-02 18:35:51.000000000 +0300
+++ packages/devs/flash/arm/mxc/current/include/mxc_nand_parts.inl	2007-04-02 18:46:03.000000000 +0300
@@ -82,4 +82,15 @@
         device_size: 0x4000000 * 2,
         base_mask  : ~(0x4000000 * 2 - 1),
     },
+    {
+        device_id  : 0x7620, // ST NAND512W3A2BN6 (MX31 Litekit)
+        page_size  : 512,
+        spare_size : 16,
+        pages_per_block : 32,
+        block_size : 0x4000,
+        block_count: 4096,
+        device_size: 0x4000000,
+        base_mask  : ~(0x4000000 - 1),
+    },
+
 #endif // CYGONCE_DEVS_FLASH_MXC_NAND_PARTS_INL
diff -uNr /home/Development/Redboot/src/ecos/packages/devs/flash/arm/mxc/current/include/mxc_nand_specifics.h packages/devs/flash/arm/mxc/current/include/mxc_nand_specifics.h
--- /home/Development/Redboot/src/ecos/packages/devs/flash/arm/mxc/current/include/mxc_nand_specifics.h	2007-04-02 18:35:51.000000000 +0300
+++ packages/devs/flash/arm/mxc/current/include/mxc_nand_specifics.h	2007-04-02 18:46:03.000000000 +0300
@@ -57,6 +57,6 @@
 #define CYGNUM_FLASH_WIDTH              8
 #define CYGNUM_FLASH_BASE               0
 #define CYGNUM_FLASH_BLANK              1
-#define CYGNUM_FLASH_ID_MANUFACTURER    FLASHWORD(0xEC)
+#define CYGNUM_FLASH_ID_MANUFACTURER    FLASHWORD(0x20)
 
 #endif // CYGONCE_DEVS_FLASH_MXC_NAND_SPECIFICS_H
diff -uNr /home/Development/Redboot/src/ecos/packages/devs/flash/arm/mxc/current/include/mxc_nfc.h packages/devs/flash/arm/mxc/current/include/mxc_nfc.h
--- /home/Development/Redboot/src/ecos/packages/devs/flash/arm/mxc/current/include/mxc_nfc.h	2007-04-02 18:35:51.000000000 +0300
+++ packages/devs/flash/arm/mxc/current/include/mxc_nfc.h	2007-04-02 18:46:03.000000000 +0300
@@ -82,7 +82,7 @@
 #define FLASH_Block_Erase               FLASHWORD(0x60)
 #define FLASH_Start_Erase               FLASHWORD(0xD0)
 
-#define CYGNUM_FLASH_ID_MANUFACTURER    FLASHWORD(0xEC)
+#define CYGNUM_FLASH_ID_MANUFACTURER    FLASHWORD(0x20)
 
 #define NAND_MAIN_BUF0                  (NFC_BASE + 0x000)
 #define NAND_MAIN_BUF1                  (NFC_BASE + 0x200)
diff -uNr /home/Development/Redboot/src/ecos/packages/devs/flash/arm/mxc/current/src/mxc_nfc.c packages/devs/flash/arm/mxc/current/src/mxc_nfc.c
--- /home/Development/Redboot/src/ecos/packages/devs/flash/arm/mxc/current/src/mxc_nfc.c	2007-04-02 18:35:51.000000000 +0300
+++ packages/devs/flash/arm/mxc/current/src/mxc_nfc.c	2007-04-02 18:46:03.000000000 +0300
@@ -82,6 +82,9 @@
 
 extern unsigned int hal_timer_count(void);
 
+#define STATUS_OK_STMICRO 	0x01 
+
+
 #define nfc_printf(level, args...)          \
     do {                                \
         if (g_nfc_debug_level >= level)     \
@@ -92,6 +95,7 @@
     "Samsung K9F5608x0C",
     "Samsung K9F1208R0B",
     "Samsung K9K1G08x0B",
+    "STMicro NAND512W3A2BNG",
 };
 
 void
@@ -519,7 +523,7 @@
     NFC_CMD_INPUT(FLASH_Start_Erase);
 
     flash_status = NFC_STATUS_READ();
-    if(flash_status != 0xC0) {
+    if((flash_status & STATUS_OK_STMICRO )) {
         diag_printf("Error %d: %s(at 0x%x) status=0x%x\n",
                     __LINE__, __FUNCTION__, ra, flash_status);
         nfc_update_blk_table(ra, true);
@@ -780,7 +784,7 @@
         NFC_CMD_INPUT(FLASH_Program);
 
         flash_status = NFC_STATUS_READ();
-        if(flash_status != 0xC0) {
+    	if(flash_status & STATUS_OK_STMICRO ) {
             diag_printf("Error %d: %s(0x%x) status=0x%x\n",
                         __LINE__, __FUNCTION__, flash_addr, flash_status);
             return -1;
@@ -805,7 +809,7 @@
         NFC_CMD_INPUT(FLASH_Program);
 
         flash_status = NFC_STATUS_READ();
-        if(flash_status != 0xC0) {
+    	if(flash_status & STATUS_OK_STMICRO ) {
             diag_printf("Error %d: %s(0x%x) status=0x%x\n",
                         __LINE__, __FUNCTION__, flash_addr, flash_status);
             return -1;
@@ -839,7 +843,7 @@
         NFC_CMD_INPUT(FLASH_Read_Mode3);
         start_nfc_addr_ops(ADDRESS_INPUT_READ_PAGE, addr, MXC_NAND_LA_MASK);
         NFC_DATA_OUTPUT(buf, FDO_SPARE_ONLY);
-        temp = readw(ECC_STATUS_RESULT_REG);
+        temp = readw(ECC_STATUS_RESULT_REG); 
         NFC_CMD_INPUT(FLASH_Read_Mode1);
         if ((temp & 0x3) <= 0x1)
             return 0;
diff -uNr /home/Development/Redboot/src/ecos/packages/devs/flash/intel/28fxxx/current/include/flash_28fxxx_parts.inl packages/devs/flash/intel/28fxxx/current/include/flash_28fxxx_parts.inl
--- /home/Development/Redboot/src/ecos/packages/devs/flash/intel/28fxxx/current/include/flash_28fxxx_parts.inl	2007-04-02 18:35:51.000000000 +0300
+++ packages/devs/flash/intel/28fxxx/current/include/flash_28fxxx_parts.inl	2007-04-02 18:55:59.000000000 +0300
@@ -87,6 +87,28 @@
 #else // 16 bit devices
 
 #ifdef CYGHWR_DEVS_FLASH_INTEL_28F320C3
+    {   // 28F320C3-T
+        device_id  : FLASHWORD(0x88c3),
+        block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
+        block_count: 32,
+        device_size: 0x200000 * CYGNUM_FLASH_INTERLEAVE,
+        base_mask  : ~(0x200000 * CYGNUM_FLASH_INTERLEAVE - 1),
+        locking    : true,
+        buffered_w : false,
+        bootblock  : true,
+        bootblocks : { 0x000000 * CYGNUM_FLASH_INTERLEAVE,
+                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
+                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
+                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
+                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
+                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
+                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
+                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
+                       0x002000 * CYGNUM_FLASH_INTERLEAVE,
+                       0
+                     },
+        banked     : false
+    },
     {   // 28F320C3-T
         device_id  : FLASHWORD(0x88c4),
         block_size : 0x10000 * CYGNUM_FLASH_INTERLEAVE,
diff -uNr /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/ads/current/cdl/hal_arm_board.cdl packages/hal/arm/mx31/ads/current/cdl/hal_arm_board.cdl
--- /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/ads/current/cdl/hal_arm_board.cdl	2007-04-02 18:35:54.000000000 +0300
+++ packages/hal/arm/mx31/ads/current/cdl/hal_arm_board.cdl	2007-04-02 18:41:18.000000000 +0300
@@ -62,7 +62,7 @@
         puts $::cdl_system_header "#define CYGBLD_HAL_PLATFORM_H <pkgconf/hal_arm_board.h>"
 	puts $::cdl_header "#define HAL_PLATFORM_CPU    \"Freescale i.MX31 based\""
         puts $::cdl_header "#define HAL_PLATFORM_BOARD  \"MX31 ADS\""
-        puts $::cdl_header "#define HAL_PLATFORM_MACHINE_TYPE  0x1BF"
+        puts $::cdl_header "#define HAL_PLATFORM_MACHINE_TYPE  0x4D4"
         puts $::cdl_header "#define HAL_ARCH_PROGRAM_NEW_STACK board_program_new_stack"
     }
 
diff -uNr /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/ads/current/include/fsl_board.h packages/hal/arm/mx31/ads/current/include/fsl_board.h
--- /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/ads/current/include/fsl_board.h	2007-04-02 18:35:54.000000000 +0300
+++ packages/hal/arm/mx31/ads/current/include/fsl_board.h	2007-04-02 18:41:18.000000000 +0300
@@ -42,20 +42,6 @@
 
 #include <cyg/hal/hal_soc.h>        // Hardware definitions
 
-#define PBC_BASE                    CS4_BASE_ADDR    /* Peripheral Bus Controller */
-#define PBC_VERSION                 0x0
-#define PBC_BSTAT2                  0x2
-#define PBC_BCTRL1                  0x4
-#define PBC_BCTRL1_CLR              0x6
-#define PBC_BCTRL2                  0x8
-#define PBC_BCTRL2_CLR              0xA
-#define PBC_BCTRL3                  0xC
-#define PBC_BCTRL3_CLR              0xE
-#define PBC_BCTRL4                  0x10
-#define PBC_BCTRL4_CLR              0x12
-#define PBC_BSTAT1                  0x14
-#define BOARD_CS_LAN_BASE           (CS4_BASE_ADDR + 0x00020000 + 0x300)
-#define BOARD_CS_UART_BASE          (CS4_BASE_ADDR + 0x00010000)
 
 #define BOARD_FLASH_START	        CS0_BASE_ADDR
 #define REDBOOT_IMAGE_SIZE          0x40000
@@ -66,22 +52,6 @@
 #define RAM_BANK0_BASE              SDRAM_BASE_ADDR
 
 #define LED_MAX_NUM	2
-#define LED_IS_ON(n)    (readw(PBC_BASE+PBC_BCTRL1_CLR) & (1 << (n+6)))
-#define TURN_LED_ON(n)  writew((readw(PBC_BASE+PBC_BCTRL1_CLR) | (1 << (n+6))), PBC_BASE+PBC_BCTRL1)
-#define TURN_LED_OFF(n) writew((1<<(n+6)), PBC_BASE+PBC_BCTRL1_CLR)
-
-
-#define BOARD_DEBUG_LED(n) 			\
-    CYG_MACRO_START				\
-        if (n >= 0 && n < LED_MAX_NUM) { 	\
-		if (LED_IS_ON(n)) 		\
-			TURN_LED_OFF(n); 	\
-		else 				\
-			TURN_LED_ON(n);		\
-	}					\
-    CYG_MACRO_END
-
-#define BOARD_PBC_VERSION       ((*(volatile unsigned short*)(PBC_BASE + PBC_VERSION)) >> 8)
 
 #define DEBUG_SWITCH_1          (1 << 7)
 #define DEBUG_SWITCH_2          (1 << 6)
@@ -93,10 +63,4 @@
 #define DEBUG_SWITCH_8          (1 << 0)
 #define CLK_INPUT_27MHZ_SET     DEBUG_SWITCH_4
 
-#define DEBUG_SWITCH_IS_ON(n)   (((*(volatile unsigned short*)(PBC_BASE + PBC_BSTAT2)) & n) == 0)
-#if 0
-    while (DEBUG_SWITCH_IS_ON(DEBUG_SWITCH_1)) {
-        hal_delay_us(100);
-    }
-#endif
 #endif /* CYGONCE_FSL_BOARD_H */
diff -uNr /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/ads/current/include/hal_platform_setup.h packages/hal/arm/mx31/ads/current/include/hal_platform_setup.h
--- /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/ads/current/include/hal_platform_setup.h	2007-04-02 18:35:54.000000000 +0300
+++ packages/hal/arm/mx31/ads/current/include/hal_platform_setup.h	2007-04-02 18:50:03.000000000 +0300
@@ -472,10 +472,6 @@
         str r3, [r0, #CLKCTL_CCMR]  // enable PLL
         str r4, [r0, #CLKCTL_CCMR]  // switch to PLL (SPLL for FIR)
 
-        mov r1, #PBC_BASE
-        ldrh r1, [r1, #PBC_BSTAT2]
-        ands r1, r1, #CLK_INPUT_27MHZ_SET
-
         // 532-133-66.5
         ldr r1, CCM_PDR0_532_133_66_W
         str r1, [r0, #CLKCTL_PDR0]
diff -uNr /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/ads/current/misc/redboot_ROMRAM.ecm packages/hal/arm/mx31/ads/current/misc/redboot_ROMRAM.ecm
--- /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/ads/current/misc/redboot_ROMRAM.ecm	2007-04-02 18:35:54.000000000 +0300
+++ packages/hal/arm/mx31/ads/current/misc/redboot_ROMRAM.ecm	2007-04-02 18:48:35.000000000 +0300
@@ -18,7 +18,7 @@
     package -hardware CYGPKG_DEVS_ETH_ARM_MX31ADS current ;
     package -hardware CYGPKG_DEVS_ETH_CL_CS8900A current ;
     package -hardware CYGPKG_COMPRESS_ZLIB current ;
-    package -hardware CYGPKG_DEVS_FLASH_AMD_AM29XXXXX current ;
+    package -hardware CYGPKG_DEVS_FLASH_INTEL_28FXXX current ;
     package -hardware CYGPKG_IO_FLASH current ;
     package -hardware CYGPKG_DEVS_FLASH_ONMXC current ;
     package -hardware CYGPKG_DEVS_FLASH_MX31ADS_SPANSION current ;
@@ -35,7 +35,7 @@
     inferred_value 0
 };
 
-cdl_option CYGHWR_DEVS_FLASH_S29WS256N {
+cdl_option CYGHWR_DEVS_FLASH_INTEL_28F320C3 {
     inferred_value 1
 };
 
@@ -117,4 +117,4 @@
 
 cdl_option CYGDAT_REDBOOT_CUSTOM_VERSION {
     user_value 1 "FSL 200650"
-};
\ No newline at end of file
+};
diff -uNr /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/ads/current/src/board_diag.c packages/hal/arm/mx31/ads/current/src/board_diag.c
--- /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/ads/current/src/board_diag.c	2007-04-02 18:35:54.000000000 +0300
+++ packages/hal/arm/mx31/ads/current/src/board_diag.c	2007-04-02 18:41:18.000000000 +0300
@@ -58,12 +58,6 @@
 static void cyg_hal_plf_duart_init(void);
 extern void cyg_hal_plf_serial_init(void);
 
-#define DUART_WORKAROUND_DELAY(a)   \
-do {                                \
-    if (BOARD_PBC_VERSION < 7)      \
-        hal_delay_us(a);            \
-} while (0)
-
 void cyg_hal_plf_comms_init(void)
 {
     static int initialized = 0;
@@ -74,18 +68,10 @@
     initialized = 1;
 
     /* Setup GPIO and enable transceiver for UARTs */
-    cyg_hal_plf_duart_init();
+//    cyg_hal_plf_duart_init();
     cyg_hal_plf_serial_init();
 }
 
-//=============================================================================
-// ST16552 DUART driver
-//=============================================================================
-
-//-----------------------------------------------------------------------------
-// There are two serial ports.
-#define CYG_DEV_SERIAL_BASE_A    (BOARD_CS_UART_BASE + 0x0000) // port A
-#define CYG_DEV_SERIAL_BASE_B    (BOARD_CS_UART_BASE + 0x0010) // port B
 
 //-----------------------------------------------------------------------------
 // Based on 14.7456 MHz xtal
@@ -199,41 +185,7 @@
     int isr_vector;
 } channel_data_t;
 
-static channel_data_t channels[] = {
-#if CYGHWR_HAL_ARM_DUART_UARTA != 0
-    {(uart_width*)CYG_DEV_SERIAL_BASE_A, 1000, 0},
-#endif
-#if CYGHWR_HAL_ARM_DUART_UARTB != 0
-    {(uart_width*)CYG_DEV_SERIAL_BASE_B, 1000, 0}
-#endif
-};
-
-//-----------------------------------------------------------------------------
-
-static void init_duart_channel(channel_data_t* __ch_data)
-{
-    uart_width* base = __ch_data->base;
-    uart_width lcr;
-
-    // 8-1-no parity.
-    HAL_WRITE_UINT_UART(base+CYG_DEV_SERIAL_LCR,
-                        SIO_LCR_WLS0 | SIO_LCR_WLS1);
-    DUART_WORKAROUND_DELAY(50);
-    HAL_READ_UINT_UART(base+CYG_DEV_SERIAL_LCR, lcr);
-    lcr |= SIO_LCR_DLAB;
-    DUART_WORKAROUND_DELAY(50);
-    HAL_WRITE_UINT_UART(base+CYG_DEV_SERIAL_LCR, lcr);
-    DUART_WORKAROUND_DELAY(50);
-    HAL_WRITE_UINT_UART(base+CYG_DEV_SERIAL_DLL, CYG_DEV_SERIAL_BAUD_LSB);
-    DUART_WORKAROUND_DELAY(50);
-    HAL_WRITE_UINT_UART(base+CYG_DEV_SERIAL_DLM, CYG_DEV_SERIAL_BAUD_MSB);
-    lcr &= ~SIO_LCR_DLAB;
-    DUART_WORKAROUND_DELAY(50);
-    HAL_WRITE_UINT_UART(base+CYG_DEV_SERIAL_LCR, lcr);
-    DUART_WORKAROUND_DELAY(50);
-    HAL_WRITE_UINT_UART(base+CYG_DEV_SERIAL_FCR, 0x07);  // Enable & clear FIFO
-}
-
+#if 0
 //#define x_debug_uart_log_buf
 #ifdef x_debug_uart_log_buf
 #define x_DIAG_BUFSIZE 2048
@@ -646,5 +598,5 @@
 #endif // __BASE
 
 #endif // CYGSEM_HAL_VIRTUAL_VECTOR_DIAG
-
+#endif 
 /*---------------------------------------------------------------------------*/
diff -uNr /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/ads/current/src/board_misc.c packages/hal/arm/mx31/ads/current/src/board_misc.c
--- /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/ads/current/src/board_misc.c	2007-04-02 18:35:54.000000000 +0300
+++ packages/hal/arm/mx31/ads/current/src/board_misc.c	2007-04-02 18:41:18.000000000 +0300
@@ -110,45 +110,20 @@
     volatile int i = 0;
     unsigned long val = readl(CCM_BASE_ADDR + CLKCTL_CCMR);
     
-    if ((val & 0x6) == 0x4) {
-        if ((readw(PBC_BASE + PBC_BSTAT2) & CLK_INPUT_27MHZ_SET) != 0) {
-            g_clock_src = FREQ_27MHZ;
-        } else {
-            g_clock_src = FREQ_26MHZ;
-        }
-    } else if ((val & 0x6) == 0x2) {
-        g_clock_src = FREQ_32768HZ;
-    }
+    g_clock_src = FREQ_26MHZ;
 
     /* PBC setup */
     //Enable UART transceivers also reset the Ethernet/external UART
-    temp = readw(PBC_BASE + PBC_BCTRL1);
-
-    writew(0x8023, PBC_BASE + PBC_BCTRL1);
-
-    for (i = 0; i < 100000; i++) {
-    }
-
-    // clear the reset, toggle the LEDs
-    writew(0xDF, PBC_BASE + PBC_BCTRL1_CLR);
-
-    for (i = 0; i < 100000; i++) {
-    }
-
-    dummy = readb(0xB4000008);
-    dummy = readb(0xB4000007);
-    dummy = readb(0xB4000008);
-    dummy = readb(0xB4000007);
 
     // UAT1
-    writel(0x12121212, IOMUXC_BASE_ADDR + 0x7C);
-    writel(0x12121212, IOMUXC_BASE_ADDR + 0x80);
+//    writel(0x12121212, IOMUXC_BASE_ADDR + 0x7C);
+//    writel(0x12121212, IOMUXC_BASE_ADDR + 0x80);
 
     // UART2
-    writel(0x13131300, IOMUXC_BASE_ADDR + 0x70);
-    writel(0x00001313, IOMUXC_BASE_ADDR + 0x74);
-    writel(0x00000040, IOMUXC_BASE_ADDR + 0x7C);
-    writel(0x40400000, IOMUXC_BASE_ADDR + 0x78);
+//    writel(0x13131300, IOMUXC_BASE_ADDR + 0x70);
+//    writel(0x00001313, IOMUXC_BASE_ADDR + 0x74);
+//    writel(0x00000040, IOMUXC_BASE_ADDR + 0x7C);
+//    writel(0x40400000, IOMUXC_BASE_ADDR + 0x78);
 }
 
 #include CYGHWR_MEMORY_LAYOUT_H
diff -uNr /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/ads/current/src/redboot_cmds.c packages/hal/arm/mx31/ads/current/src/redboot_cmds.c
--- /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/ads/current/src/redboot_cmds.c	2007-04-02 18:35:54.000000000 +0300
+++ packages/hal/arm/mx31/ads/current/src/redboot_cmds.c	2007-04-02 18:41:18.000000000 +0300
@@ -111,7 +111,7 @@
 
     launchRunImg(phys_addr);
 }
-
+#if 0
 #if CYGPKG_REDBOOT_NETWORKING
 #define LAN_BASE    BOARD_CS_LAN_BASE
 
@@ -276,7 +276,7 @@
 #endif //EEPROM_DEBUG
 
 #endif //CYGPKG_REDBOOT_NETWORKING
-
+#endif 
 #if defined(CYGSEM_REDBOOT_FLASH_CONFIG) && defined(CYG_HAL_STARTUP_ROMRAM)
 
 RedBoot_cmd("romupdate", 
diff -uNr /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/var/current/src/soc_diag.c packages/hal/arm/mx31/var/current/src/soc_diag.c
--- /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/var/current/src/soc_diag.c	2007-04-02 18:35:54.000000000 +0300
+++ packages/hal/arm/mx31/var/current/src/soc_diag.c	2007-04-02 18:41:18.000000000 +0300
@@ -527,7 +527,7 @@
 #define NUMOF(x) (sizeof(x)/sizeof(x[0]))
     for (i = 0;  i < NUMOF(channels);  i++) {
         init_serial_channel(&channels[i]);
-        CYGACC_CALL_IF_SET_CONSOLE_COMM(i+2);
+        CYGACC_CALL_IF_SET_CONSOLE_COMM(i);
         comm = CYGACC_CALL_IF_CONSOLE_PROCS();
         CYGACC_COMM_IF_CH_DATA_SET(*comm, &channels[i]);
         CYGACC_COMM_IF_WRITE_SET(*comm, cyg_hal_plf_serial_write);
@@ -567,19 +567,19 @@
 
 #include <cyg/hal/hal_stub.h>           // cyg_hal_gdb_interrupt
 
-#if (CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL == 2)
+#if (CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL == 0)
 #define __BASE ((void*)UART1_BASE_ADDR)
 #define CYGHWR_HAL_GDB_PORT_VECTOR CYGNUM_HAL_INTERRUPT_UART1
-#elif (CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL == 3)
+#elif (CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL == 1)
 #define __BASE ((void*)UART2_BASE_ADDR)
 #define CYGHWR_HAL_GDB_PORT_VECTOR CYGNUM_HAL_INTERRUPT_UART2
-#elif (CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL == 4)
+#elif (CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL == 2)
 #define __BASE ((void*)UART3_BASE_ADDR)
 #define CYGHWR_HAL_GDB_PORT_VECTOR CYGNUM_HAL_INTERRUPT_UART3
-#elif (CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL == 5)
+#elif (CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL == 3)
 #define __BASE ((void*)UART4_BASE_ADDR)
 #define CYGHWR_HAL_GDB_PORT_VECTOR CYGNUM_HAL_INTERRUPT_UART4
-#elif (CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL == 6)
+#elif (CYGNUM_HAL_VIRTUAL_VECTOR_CONSOLE_CHANNEL == 4)
 #define __BASE ((void*)UART5_BASE_ADDR)
 #define CYGHWR_HAL_GDB_PORT_VECTOR CYGNUM_HAL_INTERRUPT_UART5
 #endif
diff -uNr /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/var/current/src/soc_misc.c packages/hal/arm/mx31/var/current/src/soc_misc.c
--- /home/Development/Redboot/src/ecos/packages/hal/arm/mx31/var/current/src/soc_misc.c	2007-04-02 18:35:54.000000000 +0300
+++ packages/hal/arm/mx31/var/current/src/soc_misc.c	2007-04-02 18:44:13.000000000 +0300
@@ -168,6 +168,9 @@
 
     // Perform any platform specific initializations
     plf_hardware_init();
+    // Init uart 
+    writel(0x12100101, IOMUXC_BASE_ADDR + 0x7C);
+    writel(0x00001210, IOMUXC_BASE_ADDR + 0x80);
 
     // Set up eCos/ROM interfaces
     hal_if_init();
@@ -248,8 +251,6 @@
     writel(delayCount, EPIT_BASE_ADDR + EPITLR);
 
     while ((0x1 & readl(EPIT_BASE_ADDR + EPITSR)) == 0); // return until compare bit is set
-    if ((++led_on % 2000) == 0)
-        BOARD_DEBUG_LED(0);
 }
 
 // -------------------------------------------------------------------------

[-- Attachment #3: Type: text/plain, Size: 148 bytes --]

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Re: [ECOS] imx31 litekit redboot support

[Andrew Lunn]

On Mon, Apr 02, 2007 at 05:30:23PM +0300, HASAN H?SEYIN YILMAZ wrote:
> Hi All
>       I was working on redboot tried to run it on imx31 litekit. I
> successfully run redboot on imx31litekit I would like to share my
> work.  my work was built on top of freescale's latest redboot release.
> 
> this is ecos base ecos_20050912.tar.gz
> freescale's patch for basic support   patch-redboot-200650-base
> freescale's patch for ads  support   patch-redboot-200650-mx31

Please could you give me a reference to these patches.

Since freescale has not contributed these patches we cannot include
your patches into the public eCos tree. However your work will be in
the email archive were other people can access it if they want.

    Andrew

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Re: [ECOS] imx31 litekit redboot support

[HASAN HÜSEYIN YILMAZ]

these patches included in freescales BSP release. I think they should
publish their work themselves right ?? I am not sure I can release
their patches ??


On 4/9/07, Andrew Lunn <andrew@lunn.ch> wrote:
> On Mon, Apr 02, 2007 at 05:30:23PM +0300, HASAN H?SEYIN YILMAZ wrote:
> > Hi All
> >       I was working on redboot tried to run it on imx31 litekit. I
> > successfully run redboot on imx31litekit I would like to share my
> > work.  my work was built on top of freescale's latest redboot release.
> >
> > this is ecos base ecos_20050912.tar.gz
> > freescale's patch for basic support   patch-redboot-200650-base
> > freescale's patch for ads  support   patch-redboot-200650-mx31
>
> Please could you give me a reference to these patches.
>
> Since freescale has not contributed these patches we cannot include
> your patches into the public eCos tree. However your work will be in
> the email archive were other people can access it if they want.
>
>     Andrew
>


-- 
----
Hasan Hüseyin Yılmaz

Re: [ECOS] imx31 litekit redboot support

[Andrew Lunn]

On Mon, Apr 09, 2007 at 04:28:52PM +0300, HASAN H?SEYIN YILMAZ wrote:
> these patches included in freescales BSP release. I think they should
> publish their work themselves right ?? I am not sure I can release
> their patches ??

Where do i get the BSP from? Can you give me a URL?

FreeScale has to publish the work, you cannot do that.

          Andrew

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Re: [ECOS] imx31 litekit redboot support

[HASAN HÜSEYIN YILMAZ]

http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=i.MX31&nodeId=01J4Fs2973ZrDR
from this site you will see linux BSP it is included in BSP but you
must be registered to obtain the BSP. it is 455MB iso image
Regards,

On 4/9/07, Andrew Lunn <andrew@lunn.ch> wrote:
> On Mon, Apr 09, 2007 at 04:28:52PM +0300, HASAN H?SEYIN YILMAZ wrote:
> > these patches included in freescales BSP release. I think they should
> > publish their work themselves right ?? I am not sure I can release
> > their patches ??
>
> Where do i get the BSP from? Can you give me a URL?
>
> FreeScale has to publish the work, you cannot do that.
>
>           Andrew
>


-- 
----
Hasan Hüseyin Yılmaz

Re: [ECOS] imx31 litekit redboot support

[Alexander Neundorf]

On Monday 09 April 2007 15:30, Andrew Lunn wrote:
> On Mon, Apr 09, 2007 at 04:28:52PM +0300, HASAN H?SEYIN YILMAZ wrote:
> > these patches included in freescales BSP release. I think they should
> > publish their work themselves right ?? I am not sure I can release
> > their patches ??
>
> Where do i get the BSP from? Can you give me a URL?
>
> FreeScale has to publish the work, you cannot do that.

Sure ?
If he received the modified ecos sources, they are under GPL+exception, so he 
should have every right to publish the ecos sources as he received them.
Am I wrong here ?

Bye
Alex
-- 
Work: alexander.neundorf AT jenoptik.com - http://www.jenoptik-los.de
Home: neundorf AT kde.org                - http://www.kde.org
      alex AT neundorf.net               - http://www.neundorf.net

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Re: [ECOS] imx31 litekit redboot support

[Andrew Lunn]

On Mon, Apr 09, 2007 at 04:03:30PM +0200, Alexander Neundorf wrote:
> On Monday 09 April 2007 15:30, Andrew Lunn wrote:
> > On Mon, Apr 09, 2007 at 04:28:52PM +0300, HASAN H?SEYIN YILMAZ wrote:
> > > these patches included in freescales BSP release. I think they should
> > > publish their work themselves right ?? I am not sure I can release
> > > their patches ??
> >
> > Where do i get the BSP from? Can you give me a URL?
> >
> > FreeScale has to publish the work, you cannot do that.
> 
> Sure ?
> If he received the modified ecos sources, they are under GPL+exception, so he 
> should have every right to publish the ecos sources as he received them.
> Am I wrong here ?

Sorry, i used the wrong term.

He can distribute the code under the GPL. However he cannot contribute
it to eCos since only the copyright holder can do that. Without the
contribution from FreeScale, i cannot incorporate his patch into
anoncvs.

        Andrew

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