[PATCH 0/5] Improve LoongArch support

[PATCH 0/5] Improve LoongArch support

[Youling Tang]

Test Environment (New Toolchain):
 $ cat /etc/os-release
 NAME="My GNU/Linux System for LoongArch64"
 VERSION="6.0"
 ID=CLFS4LA64
 PRETTY_NAME="My GNU/Linux System for LoongArch64 6.0"

 $ gcc -v
 gcc version 13.0.0 20220919 (experimental) (GCC) 

Test Results:
 ============================================================================
 Testsuite summary for elfutils 0.189
 ============================================================================
 # TOTAL: 238
 # PASS:  234
 # SKIP:  4
 # XFAIL: 0
 # FAIL:  0
 # XPASS: 0
 # ERROR: 0
 ============================================================================


Youling Tang (5):
  backends: Add abi_cfi and register_info callbacks for LoongArch
  backends: Add set_initial_registers_tid callback for  LoongArch
  backends: Add initial return value location support for LoongArch
  backends: Add frame pointer unwinding for LoongArch
  backends: Add core_note callback for LoongArch

 backends/ChangeLog            |  33 +++++-
 backends/Makefile.am          |   4 +-
 backends/loongarch_cfi.c      |  83 ++++++++++++++
 backends/loongarch_corenote.c | 114 +++++++++++++++++++
 backends/loongarch_init.c     |  10 ++
 backends/loongarch_initreg.c  |  91 +++++++++++++++
 backends/loongarch_regs.c     | 141 ++++++++++++++++++++++++
 backends/loongarch_retval.c   | 202 ++++++++++++++++++++++++++++++++++
 backends/loongarch_unwind.c   |  84 ++++++++++++++
 9 files changed, 760 insertions(+), 2 deletions(-)
 create mode 100644 backends/loongarch_cfi.c
 create mode 100644 backends/loongarch_corenote.c
 create mode 100644 backends/loongarch_initreg.c
 create mode 100644 backends/loongarch_regs.c
 create mode 100644 backends/loongarch_retval.c
 create mode 100644 backends/loongarch_unwind.c

-- 
2.37.1

[PATCH 1/5] backends: Add abi_cfi and register_info callbacks for LoongArch

[Youling Tang]

LoongArch Reference Manual - Volume 1:
https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html

LoongArch ELF ABI:
https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html

Signed-off-by: Liwei Ge <geliwei@openanolis.org>
Signed-off-by: Youling Tang <tangyouling@loongson.cn>
---
 backends/ChangeLog        |   9 ++-
 backends/Makefile.am      |   3 +-
 backends/loongarch_cfi.c  |  83 ++++++++++++++++++++++
 backends/loongarch_init.c |   4 ++
 backends/loongarch_regs.c | 141 ++++++++++++++++++++++++++++++++++++++
 5 files changed, 238 insertions(+), 2 deletions(-)
 create mode 100644 backends/loongarch_cfi.c
 create mode 100644 backends/loongarch_regs.c

diff --git a/backends/ChangeLog b/backends/ChangeLog
index 7bde2919..926c76ed 100644
--- a/backends/ChangeLog
+++ b/backends/ChangeLog
@@ -1,4 +1,11 @@
-2023-04-01  Youling Tang <tangyouling@loongson.cn>
+2023-04-07  Youling Tang  <tangyouling@loongson.cn>
+
+	* Makefile.am (loongarch_SRCS): Add loongarch_cfi.c and loongarch_regs.c.
+	* loongarch_cfi.c: New file.
+	* loongarch_regs.c: Likewise.
+	* loongarch_init.c (loongarch_init): Hook register_info and abi_cfi.
+
+2023-04-01  Youling Tang  <tangyouling@loongson.cn>
 
 	* loongarch_init.c (loongarch_init): Hook check_special_symbol.
 	* loongarch_symbol.c (loongarch_check_special_symbol): New function.
diff --git a/backends/Makefile.am b/backends/Makefile.am
index f373e5fb..2b6f08ce 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -96,7 +96,8 @@ riscv_SRCS = riscv_init.c riscv_symbol.c riscv_cfi.c riscv_regs.c \
 csky_SRCS = csky_attrs.c csky_init.c csky_symbol.c csky_cfi.c \
 	    csky_regs.c csky_initreg.c csky_corenote.c
 
-loongarch_SRCS = loongarch_init.c loongarch_symbol.c
+loongarch_SRCS = loongarch_init.c loongarch_symbol.c loongarch_cfi.c \
+	    loongarch_regs.c
 
 arc_SRCS = arc_init.c arc_symbol.c
 
diff --git a/backends/loongarch_cfi.c b/backends/loongarch_cfi.c
new file mode 100644
index 00000000..5f3cd2c7
--- /dev/null
+++ b/backends/loongarch_cfi.c
@@ -0,0 +1,83 @@
+/* LoongArch ABI-specified defaults for DWARF CFI.
+   Copyright (C) 2023 OpenAnolis community LoongArch SIG.
+   Copyright (C) 2023 Loongson Technology Corporation Limted.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+     * the GNU Lesser General Public License as published by the Free
+       Software Foundation; either version 3 of the License, or (at
+       your option) any later version
+
+   or
+
+     * the GNU General Public License as published by the Free
+       Software Foundation; either version 2 of the License, or (at
+       your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include <config.h>
+#endif
+
+#include <dwarf.h>
+
+#define BACKEND loongarch_
+#include "libebl_CPU.h"
+
+/* LoongArch ELF ABI specification:
+https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html#_register_convention
+*/
+int
+loongarch_abi_cfi (Ebl *ebl __attribute__ ((unused)), Dwarf_CIE *abi_info)
+{
+  static const uint8_t abi_cfi[] =
+    {
+      /* The initial Canonical Frame Address is the value of the
+         Stack Pointer ($r3) as setup in the previous frame. */
+      DW_CFA_def_cfa, ULEB128_7 (3), ULEB128_7 (0),
+
+      /* The Stack Pointer ($r3) is restored from CFA address by default.  */
+      DW_CFA_val_offset, ULEB128_7 (3), ULEB128_7 (0),
+
+#define SV(n) DW_CFA_same_value, ULEB128_7 (n)
+      /* The return address register contains the return address setup by
+	 caller.  */
+      SV (1),
+
+      /* Callee-saved registers $s0-$s7.  */
+      SV (23), SV (24), SV (25), SV (26), SV (27), SV (28),
+      SV (29), SV (30), SV (31),
+
+      /* The Frame Pointer ($fp, $r22) */
+      SV(22),
+
+      /* Callee-saved registers $fs0-$fs7.  */
+      SV (56), SV (57), SV (58), SV (59), SV (60), SV (61),
+      SV (62), SV (63),
+#undef SV
+
+      /* XXX Note: registers intentionally unused by the program,
+	 for example as a consequence of the procedure call standard
+	 should be initialized as if by DW_CFA_same_value.  */
+    };
+
+  abi_info->initial_instructions = abi_cfi;
+  abi_info->initial_instructions_end = &abi_cfi[sizeof abi_cfi];
+  abi_info->data_alignment_factor = -4;
+
+  abi_info->return_address_register = 1; /* ra.  */
+
+  return 0;
+}
diff --git a/backends/loongarch_init.c b/backends/loongarch_init.c
index b641b07f..7bfaaa7f 100644
--- a/backends/loongarch_init.c
+++ b/backends/loongarch_init.c
@@ -46,6 +46,10 @@ loongarch_init (Elf *elf __attribute__ ((unused)),
   loongarch_init_reloc (eh);
   HOOK (eh, reloc_simple_type);
   HOOK (eh, machine_flag_check);
+  HOOK (eh, register_info);
+  HOOK (eh, abi_cfi);
+  /* gcc/config/ #define DWARF_FRAME_REGISTERS.  */
+  eh->frame_nregs = 74;
   HOOK (eh, check_special_symbol);
 
   return eh;
diff --git a/backends/loongarch_regs.c b/backends/loongarch_regs.c
new file mode 100644
index 00000000..4a4b2052
--- /dev/null
+++ b/backends/loongarch_regs.c
@@ -0,0 +1,141 @@
+/* Register names and numbers for LoongArch DWARF.
+   Copyright (C) 2023 OpenAnolis community LoongArch SIG.
+   Copyright (C) 2023 Loongson Technology Corporation Limted.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+     * the GNU Lesser General Public License as published by the Free
+       Software Foundation; either version 3 of the License, or (at
+       your option) any later version
+
+   or
+
+     * the GNU General Public License as published by the Free
+       Software Foundation; either version 2 of the License, or (at
+       your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include <config.h>
+#endif
+
+#include <string.h>
+#include <dwarf.h>
+
+#define BACKEND loongarch_
+#include "libebl_CPU.h"
+
+ssize_t
+loongarch_register_info (Ebl *ebl, int regno, char *name, size_t namelen,
+		     const char **prefix, const char **setname,
+		     int *bits, int *type)
+{
+  if (name == NULL)
+    return 64;
+
+  *prefix = "";
+
+  if (regno < 32)
+    {
+      *setname = "integer";
+      *type = DW_ATE_signed;
+      *bits = ebl->class == ELFCLASS64 ? 64 : 32;
+    }
+  else
+    {
+      *setname = "FPU";
+      *type = DW_ATE_float;
+      *bits = 64;
+    }
+
+  switch (regno)
+    {
+    case 0:
+      return stpcpy (name, "zero") + 1 - name;
+
+    case 1:
+      *type = DW_ATE_address;
+      return stpcpy (name, "ra") + 1 - name;
+
+    case 2:
+      *type = DW_ATE_address;
+      return stpcpy (name, "tp") + 1 - name;
+
+    case 3:
+      *type = DW_ATE_address;
+      return stpcpy (name, "sp") + 1 - name;
+
+    case 4 ... 11:
+      name[0] = 'a';
+      name[1] = regno - 4 + '0';
+      namelen = 2;
+      break;
+
+    case 12 ... 20:
+      name[0] = 't';
+      name[1] = regno - 12 + '0';
+      namelen = 2;
+      break;
+
+    case 21:
+      return stpcpy (name, "u0") + 1 - name;
+
+    case 22:
+      *type = DW_ATE_address;
+      return stpcpy (name, "fp") + 1 - name;
+
+    case 23 ... 31:
+      name[0] = 's';
+      name[1] = regno - 23 + '0';
+      namelen = 2;
+      break;
+
+    case 32 ... 39:
+      name[0] = 'f';
+      name[1] = 'a';
+      name[2] = regno - 32 + '0';
+      namelen = 3;
+      break;
+
+    case 40 ... 49:
+      name[0] = 'f';
+      name[1] = 't';
+      name[2] = regno - 40 + '0';
+      namelen = 3;
+      break;
+
+    case 50 ... 55:
+      name[0] = 'f';
+      name[1] = 't';
+      name[2] = '1';
+      name[3] = regno - 50 + '0';
+      namelen = 4;
+      break;
+
+    case 56 ... 63:
+      name[0] = 'f';
+      name[1] = 's';
+      name[2] = regno - 56 + '0';
+      namelen = 3;
+      break;
+
+    default:
+      *setname = NULL;
+      return 0;
+    }
+
+  name[namelen++] = '\0';
+  return namelen;
+}
-- 
2.37.1

[PATCH 2/5] backends: Add set_initial_registers_tid callback for LoongArch

[Youling Tang]

This patch implements the set_initial_registers_tid hook for LoongArch.

Signed-off-by: Liwei Ge <geliwei@openanolis.org>
Signed-off-by: Youling Tang <tangyouling@loongson.cn>
---
 backends/ChangeLog           |  6 +++
 backends/Makefile.am         |  2 +-
 backends/loongarch_init.c    |  1 +
 backends/loongarch_initreg.c | 91 ++++++++++++++++++++++++++++++++++++
 4 files changed, 99 insertions(+), 1 deletion(-)
 create mode 100644 backends/loongarch_initreg.c

diff --git a/backends/ChangeLog b/backends/ChangeLog
index 926c76ed..85abc8a5 100644
--- a/backends/ChangeLog
+++ b/backends/ChangeLog
@@ -1,3 +1,9 @@
+2023-04-07  Youling Tang  <tangyouling@loongson.cn>
+
+	* Makefile.am (loongarch_SRCS): Add loongarch_initreg.c.
+	* loongarch_initreg.c: New file.
+	* loongarch_init.c (loongarch_init): Hook set_initial_registers_tid.
+
 2023-04-07  Youling Tang  <tangyouling@loongson.cn>
 
 	* Makefile.am (loongarch_SRCS): Add loongarch_cfi.c and loongarch_regs.c.
diff --git a/backends/Makefile.am b/backends/Makefile.am
index 2b6f08ce..e7055d7e 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -97,7 +97,7 @@ csky_SRCS = csky_attrs.c csky_init.c csky_symbol.c csky_cfi.c \
 	    csky_regs.c csky_initreg.c csky_corenote.c
 
 loongarch_SRCS = loongarch_init.c loongarch_symbol.c loongarch_cfi.c \
-	    loongarch_regs.c
+	    loongarch_regs.c loongarch_initreg.c
 
 arc_SRCS = arc_init.c arc_symbol.c
 
diff --git a/backends/loongarch_init.c b/backends/loongarch_init.c
index 7bfaaa7f..9c4b94a0 100644
--- a/backends/loongarch_init.c
+++ b/backends/loongarch_init.c
@@ -51,6 +51,7 @@ loongarch_init (Elf *elf __attribute__ ((unused)),
   /* gcc/config/ #define DWARF_FRAME_REGISTERS.  */
   eh->frame_nregs = 74;
   HOOK (eh, check_special_symbol);
+  HOOK (eh, set_initial_registers_tid);
 
   return eh;
 }
diff --git a/backends/loongarch_initreg.c b/backends/loongarch_initreg.c
new file mode 100644
index 00000000..75497a51
--- /dev/null
+++ b/backends/loongarch_initreg.c
@@ -0,0 +1,91 @@
+/* Fetch live process registers from TID.
+   Copyright (C) 2023 OpenAnolis community LoongArch SIG.
+   Copyright (C) 2023 Loongson Technology Corporation Limted.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+     * the GNU Lesser General Public License as published by the Free
+       Software Foundation; either version 3 of the License, or (at
+       your option) any later version
+
+   or
+
+     * the GNU General Public License as published by the Free
+       Software Foundation; either version 2 of the License, or (at
+       your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include <config.h>
+#endif
+
+#include "system.h"
+#include <assert.h>
+#if defined __loongarch__ && defined __linux__
+# include <sys/uio.h>
+# include <sys/procfs.h>
+# include <sys/ptrace.h>
+#endif
+
+#define BACKEND loongarch_
+#include "libebl_CPU.h"
+
+bool
+loongarch_set_initial_registers_tid (pid_t tid __attribute__ ((unused)),
+				 ebl_tid_registers_t *setfunc __attribute__ ((unused)),
+				 void *arg __attribute__ ((unused)))
+{
+#if !defined __loongarch__ || !defined __linux__
+  return false;
+#else /* __loongarch__ */
+
+  /* General registers.  */
+  struct user_regs_struct gregs;
+  struct iovec iovec;
+  iovec.iov_base = &gregs;
+  iovec.iov_len = sizeof (gregs);
+  if (ptrace (PTRACE_GETREGSET, tid, NT_PRSTATUS, &iovec) != 0)
+    return false;
+
+  /* $r0 is constant 0.  */
+  Dwarf_Word zero = 0;
+  if (! setfunc (0, 1, &zero, arg))
+    return false;
+
+  /* $r1-$r31.  */
+  if (! setfunc (1, 32, (Dwarf_Word *) &gregs.regs[1], arg))
+    return false;
+
+  /* PC.  */
+  if (! setfunc (-1, 1, (Dwarf_Word *) &gregs.csr_era, arg))
+    return false;
+
+  /* Floating-point registers (only 64bits are used).  */
+  struct user_fp_struct fregs;
+  iovec.iov_base = &fregs;
+  iovec.iov_len = sizeof (fregs);
+  if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec) != 0)
+    return false;
+
+  Dwarf_Word dwarf_fregs[32];
+  for (int r = 0; r < 32; r++)
+    dwarf_fregs[r] = fregs.fpr[r] & 0xFFFFFFFF;
+
+  if (! setfunc (32, 32, dwarf_fregs, arg))
+    return false;
+
+  return true;
+#endif /* __loongarch__ */
+}
-- 
2.37.1

[PATCH 3/5] backends: Add initial return value location support for LoongArch

[Youling Tang]

LoongArch ELF ABI specification - Return values:
https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html#_return_values

Signed-off-by: Liwei Ge <geliwei@openanolis.org>
Signed-off-by: Youling Tang <tangyouling@loongson.cn>
---
 backends/ChangeLog          |   6 ++
 backends/Makefile.am        |   2 +-
 backends/loongarch_init.c   |   3 +
 backends/loongarch_retval.c | 202 ++++++++++++++++++++++++++++++++++++
 4 files changed, 212 insertions(+), 1 deletion(-)
 create mode 100644 backends/loongarch_retval.c

diff --git a/backends/ChangeLog b/backends/ChangeLog
index 85abc8a5..40564ca7 100644
--- a/backends/ChangeLog
+++ b/backends/ChangeLog
@@ -1,3 +1,9 @@
+2023-04-07  Youling Tang  <tangyouling@loongson.cn>
+
+	* Makefile.am (loongarch_SRCS): Add loongarch_retval.c.
+	* loongarch_init.c (loongarch_init): Hook return_value_location.
+	* loongarch_retval.c: New file.
+
 2023-04-07  Youling Tang  <tangyouling@loongson.cn>
 
 	* Makefile.am (loongarch_SRCS): Add loongarch_initreg.c.
diff --git a/backends/Makefile.am b/backends/Makefile.am
index e7055d7e..9277ed59 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -97,7 +97,7 @@ csky_SRCS = csky_attrs.c csky_init.c csky_symbol.c csky_cfi.c \
 	    csky_regs.c csky_initreg.c csky_corenote.c
 
 loongarch_SRCS = loongarch_init.c loongarch_symbol.c loongarch_cfi.c \
-	    loongarch_regs.c loongarch_initreg.c
+	    loongarch_regs.c loongarch_initreg.c loongarch_retval.c
 
 arc_SRCS = arc_init.c arc_symbol.c
 
diff --git a/backends/loongarch_init.c b/backends/loongarch_init.c
index 9c4b94a0..8892a2e6 100644
--- a/backends/loongarch_init.c
+++ b/backends/loongarch_init.c
@@ -1,5 +1,7 @@
 /* Initialization of LoongArch specific backend library.
    Copyright (C) 2022 Hengqi Chen
+   Copyright (C) 2023 OpenAnolis community LoongArch SIG.
+   Copyright (C) 2023 Loongson Technology Corporation Limted.
    This file is part of elfutils.
 
    This file is free software; you can redistribute it and/or modify
@@ -52,6 +54,7 @@ loongarch_init (Elf *elf __attribute__ ((unused)),
   eh->frame_nregs = 74;
   HOOK (eh, check_special_symbol);
   HOOK (eh, set_initial_registers_tid);
+  HOOK (eh, return_value_location);
 
   return eh;
 }
diff --git a/backends/loongarch_retval.c b/backends/loongarch_retval.c
new file mode 100644
index 00000000..23b33ed5
--- /dev/null
+++ b/backends/loongarch_retval.c
@@ -0,0 +1,202 @@
+/* Function return value location for Linux/LoongArch ABI.
+   Copyright (C) 2013 Red Hat, Inc.
+   Copyright (C) 2023 OpenAnolis community LoongArch SIG.
+   Copyright (C) 2023 Loongson Technology Corporation Limited.
+
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+     * the GNU Lesser General Public License as published by the Free
+       Software Foundation; either version 3 of the License, or (at
+       your option) any later version
+
+   or
+
+     * the GNU General Public License as published by the Free
+       Software Foundation; either version 2 of the License, or (at
+       your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include <config.h>
+#endif
+
+#include <stdio.h>
+#include <inttypes.h>
+
+#include <assert.h>
+#include <dwarf.h>
+
+#define BACKEND loongarch_
+#include "libebl_CPU.h"
+
+static int
+dwarf_bytesize_aux (Dwarf_Die *die, Dwarf_Word *sizep)
+{
+  int bits;
+  if (((bits = 8 * dwarf_bytesize (die)) < 0
+       && (bits = dwarf_bitsize (die)) < 0)
+      || bits % 8 != 0)
+    return -1;
+
+  *sizep = bits / 8;
+  return 0;
+}
+
+static int
+pass_in_gpr (const Dwarf_Op **locp, Dwarf_Word size)
+{
+  static const Dwarf_Op loc[] =
+    {
+      { .atom = DW_OP_reg4 }, { .atom = DW_OP_piece, .number = 8 },
+      { .atom = DW_OP_reg5 }, { .atom = DW_OP_piece, .number = 8 }
+    };
+
+  *locp = loc;
+  return size <= 8 ? 1 : 4;
+}
+
+static int
+pass_by_ref (const Dwarf_Op **locp)
+{
+  static const Dwarf_Op loc[] = { { .atom = DW_OP_breg4 } };
+
+  *locp = loc;
+  return 1;
+}
+
+static int
+pass_in_fpr (const Dwarf_Op **locp, Dwarf_Word size)
+{
+  static const Dwarf_Op loc[] =
+    {
+      { .atom = DW_OP_regx, .number = 32 },
+      { .atom = DW_OP_piece, .number = 8 },
+      { .atom = DW_OP_regx, .number = 33 },
+      { .atom = DW_OP_piece, .number = 8 }
+    };
+
+  *locp = loc;
+  return size <= 8 ? 1 : 4;
+}
+
+int
+loongarch_return_value_location(Dwarf_Die *functypedie,
+                                const Dwarf_Op **locp)
+{
+  /* Start with the function's type, and get the DW_AT_type attribute,
+     which is the type of the return value.  */
+  Dwarf_Die typedie;
+  int tag = dwarf_peeled_die_type (functypedie, &typedie);
+  if (tag <= 0)
+    return tag;
+
+  Dwarf_Word size = (Dwarf_Word)-1;
+
+  /* If the argument type is a Composite Type that is larger than 16
+     bytes, then the argument is copied to memory allocated by the
+     caller and the argument is replaced by a pointer to the copy.  */
+  if (tag == DW_TAG_structure_type || tag == DW_TAG_union_type
+      || tag == DW_TAG_class_type || tag == DW_TAG_array_type)
+    {
+      if (dwarf_aggregate_size (&typedie, &size) < 0)
+	return -1;
+
+      /* Aggregates larger than 2*GRLEN bits are passed by reference.  */
+      if (size > 16)
+	return pass_by_ref (locp);
+      /* Aggregates whose total size is no more than GRLEN bits are passed in
+	 a register.  Aggregates whose total size is no more than 2*GRLEN bits
+	 are passed in a pair of registers.  */
+      else
+	return pass_in_gpr (locp, size);
+    }
+
+  if (tag == DW_TAG_base_type || dwarf_is_pointer (tag))
+    {
+      if (dwarf_bytesize_aux (&typedie, &size) < 0)
+	{
+	  if (dwarf_is_pointer (tag))
+	    size = 8;
+	  else
+	    return -1;
+	}
+
+      Dwarf_Attribute attr_mem;
+      if (tag == DW_TAG_base_type)
+	{
+	  Dwarf_Word encoding;
+	  if (dwarf_formudata (dwarf_attr_integrate (&typedie, DW_AT_encoding,
+						     &attr_mem),
+			       &encoding) != 0)
+	    return -1;
+
+	  switch (encoding)
+	    {
+	    case DW_ATE_boolean:
+	    case DW_ATE_signed:
+	    case DW_ATE_unsigned:
+	    case DW_ATE_unsigned_char:
+	    case DW_ATE_signed_char:
+	      /* Scalars that are at most GRLEN bits wide are passed in a single
+		 argument register.  Scalars that are 2*GRLEN bits wide are
+		 passed in a pair of argument registers.  Scalars wider than
+		 2*GRLEN are passed by reference.  */
+	      return pass_in_gpr (locp, size);
+
+	    case DW_ATE_float:
+	      /* A real floating-point argument is passed in a floating-point
+		 argument register if it is no more than FLEN bits wide,
+		 otherwise it is passed according to the integer calling
+		 convention.  */
+	      switch (size)
+		{
+		case 4: /* single */
+                case 8: /* double */
+                  return pass_in_fpr (locp, size);
+
+                case 16: /* quad */
+	          return pass_in_gpr (locp, size);
+
+		default:
+		  return -2;
+		}
+
+	    case DW_ATE_complex_float:
+	      /* A complex floating-point number is passed as though it were a
+		 struct containing two floating-point reals.  */
+	      switch (size)
+		{
+		case 8: /* float _Complex */
+                case 16: /* double _Complex */
+                  return pass_in_fpr (locp, size);
+
+                case 32: /* long double _Complex */
+		  return pass_by_ref (locp);
+
+		default:
+		  return -2;
+		}
+	    }
+
+	  return -2;
+	}
+      else
+	return pass_in_gpr (locp, size);
+    }
+
+  *locp = NULL;
+  return 0;
+}
-- 
2.37.1

[PATCH 4/5] backends: Add frame pointer unwinding for LoongArch

[Youling Tang]

If we don't find any debug information for a given frame, we usually
cannot unwind any further. However, the binary in question might have
been compiled with frame pointers, in which case we can look up the
well known frame pointer locations in the stack snapshot and use them
to bridge the frames without debug information.

Signed-off-by: Liwei Ge <geliwei@openanolis.org>
Signed-off-by: Youling Tang <tangyouling@loongson.cn>
---
 backends/ChangeLog          |  6 +++
 backends/Makefile.am        |  3 +-
 backends/loongarch_init.c   |  1 +
 backends/loongarch_unwind.c | 84 +++++++++++++++++++++++++++++++++++++
 4 files changed, 93 insertions(+), 1 deletion(-)
 create mode 100644 backends/loongarch_unwind.c

diff --git a/backends/ChangeLog b/backends/ChangeLog
index 40564ca7..ae385fe0 100644
--- a/backends/ChangeLog
+++ b/backends/ChangeLog
@@ -1,3 +1,9 @@
+2023-04-07  Youling Tang  <tangyouling@loongson.cn>
+
+	* Makefile.am (loongarch_SRCS): Add loongarch_unwind.c.
+	* loongarch_init.c (loongarch_init): Hook unwind.
+	* loongarch_unwind.c: New file.
+
 2023-04-07  Youling Tang  <tangyouling@loongson.cn>
 
 	* Makefile.am (loongarch_SRCS): Add loongarch_retval.c.
diff --git a/backends/Makefile.am b/backends/Makefile.am
index 9277ed59..848e520c 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -97,7 +97,8 @@ csky_SRCS = csky_attrs.c csky_init.c csky_symbol.c csky_cfi.c \
 	    csky_regs.c csky_initreg.c csky_corenote.c
 
 loongarch_SRCS = loongarch_init.c loongarch_symbol.c loongarch_cfi.c \
-	    loongarch_regs.c loongarch_initreg.c loongarch_retval.c
+	    loongarch_regs.c loongarch_initreg.c loongarch_retval.c \
+	    loongarch_unwind.c
 
 arc_SRCS = arc_init.c arc_symbol.c
 
diff --git a/backends/loongarch_init.c b/backends/loongarch_init.c
index 8892a2e6..808ff131 100644
--- a/backends/loongarch_init.c
+++ b/backends/loongarch_init.c
@@ -55,6 +55,7 @@ loongarch_init (Elf *elf __attribute__ ((unused)),
   HOOK (eh, check_special_symbol);
   HOOK (eh, set_initial_registers_tid);
   HOOK (eh, return_value_location);
+  HOOK (eh, unwind);
 
   return eh;
 }
diff --git a/backends/loongarch_unwind.c b/backends/loongarch_unwind.c
new file mode 100644
index 00000000..fb748083
--- /dev/null
+++ b/backends/loongarch_unwind.c
@@ -0,0 +1,84 @@
+/* Get previous frame state for an existing frame state.
+   Copyright (C) 2023 OpenAnolis community LoongArch SIG.
+   Copyright (C) 2023 Loongson Technology Corporation Limited.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+     * the GNU Lesser General Public License as published by the Free
+       Software Foundation; either version 3 of the License, or (at
+       your option) any later version
+
+   or
+
+     * the GNU General Public License as published by the Free
+       Software Foundation; either version 2 of the License, or (at
+       your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include <config.h>
+#endif
+
+#define BACKEND loongarch_
+#define RA_REG 1
+#define SP_REG 3
+#define FP_REG 22
+
+#define RA_OFFSET 8
+#define FP_OFFSET 16
+
+#include "libebl_CPU.h"
+
+/* There was no CFI. Maybe we happen to have a frame pointer and can unwind from that?  */
+
+bool
+EBLHOOK(unwind) (Ebl *ebl __attribute__ ((unused)), Dwarf_Addr pc __attribute__ ((unused)),
+                 ebl_tid_registers_t *setfunc, ebl_tid_registers_get_t *getfunc,
+                 ebl_pid_memory_read_t *readfunc, void *arg,
+                 bool *signal_framep __attribute__ ((unused)))
+{
+  Dwarf_Word fp, ra, sp;
+
+  if (!getfunc(RA_REG, 1, &ra, arg))
+    return false;
+
+  if (ra == 0 || !setfunc(-1, 1, &ra, arg))
+    return false;
+
+  if (!getfunc(FP_REG, 1, &fp, arg))
+    fp = 0;
+
+  if (!getfunc(SP_REG, 1, &sp, arg))
+    sp = 0;
+
+  Dwarf_Word newRa, newFp, newSp;
+
+  if (!readfunc(fp - RA_OFFSET, &newRa, arg))
+    newRa = 0;
+
+  if (!readfunc(fp - FP_OFFSET, &newFp, arg))
+    newFp = 0;
+
+  newSp = fp;
+
+  // These are not fatal if they don't work. They will just prevent unwinding at the next frame.
+  setfunc(RA_REG, 1, &newRa, arg);
+  setfunc(FP_REG, 1, &newFp, arg);
+  setfunc(SP_REG, 1, &newSp, arg);
+
+  // If the fp is invalid, we might still have a valid ra.
+  // But if the fp is valid, then the stack should be moving in the right direction.
+  return fp == 0 || newSp > sp;
+}
-- 
2.37.1

[PATCH 5/5] backends: Add core_note callback for LoongArch

[Youling Tang]

Signed-off-by: Youling Tang <tangyouling@loongson.cn>
---
 backends/ChangeLog            |   6 ++
 backends/Makefile.am          |   2 +-
 backends/loongarch_corenote.c | 114 ++++++++++++++++++++++++++++++++++
 backends/loongarch_init.c     |   1 +
 4 files changed, 122 insertions(+), 1 deletion(-)
 create mode 100644 backends/loongarch_corenote.c

diff --git a/backends/ChangeLog b/backends/ChangeLog
index ae385fe0..4575c16b 100644
--- a/backends/ChangeLog
+++ b/backends/ChangeLog
@@ -1,3 +1,9 @@
+2023-04-07  Youling Tang  <tangyouling@loongson.cn>
+
+	* Makefile.am (loongarch_SRCS): Add loongarch_corenote.c.
+	* loongarch_init.c (loongarch_init): Hook core_note.
+	* loongarch_corenote.c: New file.
+
 2023-04-07  Youling Tang  <tangyouling@loongson.cn>
 
 	* Makefile.am (loongarch_SRCS): Add loongarch_unwind.c.
diff --git a/backends/Makefile.am b/backends/Makefile.am
index 848e520c..c8459128 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -98,7 +98,7 @@ csky_SRCS = csky_attrs.c csky_init.c csky_symbol.c csky_cfi.c \
 
 loongarch_SRCS = loongarch_init.c loongarch_symbol.c loongarch_cfi.c \
 	    loongarch_regs.c loongarch_initreg.c loongarch_retval.c \
-	    loongarch_unwind.c
+	    loongarch_unwind.c loongarch_corenote.c
 
 arc_SRCS = arc_init.c arc_symbol.c
 
diff --git a/backends/loongarch_corenote.c b/backends/loongarch_corenote.c
new file mode 100644
index 00000000..b549edc0
--- /dev/null
+++ b/backends/loongarch_corenote.c
@@ -0,0 +1,114 @@
+/* LoongArch specific core note handling.
+   Copyright (C) 2023 Loongson Technology Corporation Limited.
+   This file is part of elfutils.
+
+   This file is free software; you can redistribute it and/or modify
+   it under the terms of either
+
+     * the GNU Lesser General Public License as published by the Free
+       Software Foundation; either version 3 of the License, or (at
+       your option) any later version
+
+   or
+
+     * the GNU General Public License as published by the Free
+       Software Foundation; either version 2 of the License, or (at
+       your option) any later version
+
+   or both in parallel, as here.
+
+   elfutils is distributed in the hope that it will be useful, but
+   WITHOUT ANY WARRANTY; without even the implied warranty of
+   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
+   General Public License for more details.
+
+   You should have received copies of the GNU General Public License and
+   the GNU Lesser General Public License along with this program.  If
+   not, see <http://www.gnu.org/licenses/>.  */
+
+#ifdef HAVE_CONFIG_H
+# include <config.h>
+#endif
+
+#include <elf.h>
+#include <inttypes.h>
+#include <stddef.h>
+#include <stdio.h>
+#include <sys/time.h>
+
+#define BACKEND loongarch_
+#include "libebl_CPU.h"
+
+#define	ULONG			uint64_t
+#define PID_T			int32_t
+#define	UID_T			uint32_t
+#define	GID_T			uint32_t
+#define ALIGN_ULONG		8
+#define ALIGN_PID_T		4
+#define ALIGN_UID_T		4
+#define ALIGN_GID_T		4
+#define TYPE_ULONG		ELF_T_XWORD
+#define TYPE_PID_T		ELF_T_SWORD
+#define TYPE_UID_T		ELF_T_WORD
+#define TYPE_GID_T		ELF_T_WORD
+
+#define PRSTATUS_REGS_SIZE	(45 * 8)
+
+static const Ebl_Register_Location prstatus_regs[] =
+  {
+    { .offset = 0, .regno = 0, .count = 32, .bits = 64 }, /* r0..r31 */
+  };
+
+#define PRSTATUS_REGSET_ITEMS						\
+  {									\
+    .name = "orig_a0", .type = ELF_T_XWORD, .format = 'x',		\
+    .offset = (offsetof (struct EBLHOOK(prstatus), pr_reg)		\
+	       + 32 * 8),						\
+    .group = "register"							\
+  },									\
+  {									\
+    .name = "csr_era", .type = ELF_T_XWORD, .format = 'x',		\
+    .offset = (offsetof (struct EBLHOOK(prstatus), pr_reg)		\
+	       + 33 * 8),						\
+    .group = "register",						\
+    .pc_register = true							\
+  },									\
+  {									\
+    .name = "csr_badvaddr", .type = ELF_T_XWORD, .format = 'x',		\
+    .offset = (offsetof (struct EBLHOOK(prstatus), pr_reg)		\
+	       + 34 * 8),						\
+    .group = "register"							\
+  },									\
+  {									\
+    .name = "csr_crmd", .type = ELF_T_XWORD, .format = 'x',		\
+    .offset = (offsetof (struct EBLHOOK(prstatus), pr_reg)		\
+	       + 35 * 8),						\
+    .group = "register"							\
+  },									\
+  {									\
+    .name = "csr_prmd", .type = ELF_T_XWORD, .format = 'x',		\
+    .offset = (offsetof (struct EBLHOOK(prstatus), pr_reg)		\
+	       + 36 * 8),						\
+    .group = "register"							\
+  },									\
+  {									\
+    .name = "csr_euen", .type = ELF_T_XWORD, .format = 'x',		\
+    .offset = (offsetof (struct EBLHOOK(prstatus), pr_reg)		\
+	       + 37 * 8),						\
+    .group = "register"							\
+  },									\
+  {									\
+    .name = "csr_ecfg", .type = ELF_T_XWORD, .format = 'x',		\
+    .offset = (offsetof (struct EBLHOOK(prstatus), pr_reg)		\
+	       + 38 * 8),						\
+    .group = "register"							\
+  },									\
+  {									\
+    .name = "csr_estat", .type = ELF_T_XWORD, .format = 'x',		\
+    .offset = (offsetof (struct EBLHOOK(prstatus), pr_reg)		\
+	       + 39 * 8),						\
+    .group = "register"							\
+  }
+  /* 40 ~ 44 reserved */
+
+#include "linux-core-note.c"
diff --git a/backends/loongarch_init.c b/backends/loongarch_init.c
index 808ff131..2f0d46c9 100644
--- a/backends/loongarch_init.c
+++ b/backends/loongarch_init.c
@@ -49,6 +49,7 @@ loongarch_init (Elf *elf __attribute__ ((unused)),
   HOOK (eh, reloc_simple_type);
   HOOK (eh, machine_flag_check);
   HOOK (eh, register_info);
+  HOOK (eh, core_note);
   HOOK (eh, abi_cfi);
   /* gcc/config/ #define DWARF_FRAME_REGISTERS.  */
   eh->frame_nregs = 74;
-- 
2.37.1

Re: [PATCH 1/5] backends: Add abi_cfi and register_info callbacks for LoongArch

[Mark Wielaard]

On Fri, Apr 07, 2023 at 10:59:24AM +0800, Youling Tang wrote:
> LoongArch Reference Manual - Volume 1:
> https://loongson.github.io/LoongArch-Documentation/LoongArch-Vol1-EN.html
> 
> LoongArch ELF ABI:
> https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html

Looks good. Thanks for the references.

Cheers,

Mark

Re: [PATCH 2/5] backends: Add set_initial_registers_tid callback for LoongArch

[Mark Wielaard]

Him

On Fri, Apr 07, 2023 at 10:59:25AM +0800, Youling Tang wrote:
> This patch implements the set_initial_registers_tid hook for LoongArch.

Looks good, but one question:

> +  /* Floating-point registers (only 64bits are used).  */
> +  struct user_fp_struct fregs;
> +  iovec.iov_base = &fregs;
> +  iovec.iov_len = sizeof (fregs);
> +  if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec) != 0)
> +    return false;
> +
> +  Dwarf_Word dwarf_fregs[32];
> +  for (int r = 0; r < 32; r++)
> +    dwarf_fregs[r] = fregs.fpr[r] & 0xFFFFFFFF;

The comment says 64bits, but the mask is for 32bits.
I assume the comment is wrong and the masking is deliberate?

Cheers,

Mark

Re: [PATCH 3/5] backends: Add initial return value location support for LoongArch

[Mark Wielaard]

On Fri, Apr 07, 2023 at 10:59:26AM +0800, Youling Tang wrote:
> LoongArch ELF ABI specification - Return values:
> https://loongson.github.io/LoongArch-Documentation/LoongArch-ELF-ABI-EN.html#_return_values

I haven't double checked everything against the actual ABI (thanks for
adding the reference). But the code looks plausible.

Thanks,

Mark

Re: [PATCH 4/5] backends: Add frame pointer unwinding for LoongArch

[Mark Wielaard]

On Fri, Apr 07, 2023 at 10:59:27AM +0800, Youling Tang wrote:
> If we don't find any debug information for a given frame, we usually
> cannot unwind any further. However, the binary in question might have
> been compiled with frame pointers, in which case we can look up the
> well known frame pointer locations in the stack snapshot and use them
> to bridge the frames without debug information.

Looks useful and correct.

Thanks,

Mark

Re: [PATCH 5/5] backends: Add core_note callback for LoongArch

[Mark Wielaard]

On Fri, Apr 07, 2023 at 10:59:28AM +0800, Youling Tang wrote:
> +2023-04-07  Youling Tang  <tangyouling@loongson.cn>
> +
> +	* Makefile.am (loongarch_SRCS): Add loongarch_corenote.c.
> +	* loongarch_init.c (loongarch_init): Hook core_note.
> +	* loongarch_corenote.c: New file.

This looks correct after a quick look at the kernel sources.

Thanks,

Mark

Re: [PATCH 2/5] backends: Add set_initial_registers_tid callback for LoongArch

[Youling Tang]

Hi, Mark

On 05/09/2023 03:57 AM, Mark Wielaard wrote:
> Him
>
> On Fri, Apr 07, 2023 at 10:59:25AM +0800, Youling Tang wrote:
>> This patch implements the set_initial_registers_tid hook for LoongArch.
>
> Looks good, but one question:
>
>> +  /* Floating-point registers (only 64bits are used).  */
>> +  struct user_fp_struct fregs;
>> +  iovec.iov_base = &fregs;
>> +  iovec.iov_len = sizeof (fregs);
>> +  if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec) != 0)
>> +    return false;
>> +
>> +  Dwarf_Word dwarf_fregs[32];
>> +  for (int r = 0; r < 32; r++)
>> +    dwarf_fregs[r] = fregs.fpr[r] & 0xFFFFFFFF;
>
> The comment says 64bits, but the mask is for 32bits.
> I assume the comment is wrong and the masking is deliberate?

Thanks for pointing out that there is no need to mask the lower 32 bits
here.

It can be modified as follows,
--- a/backends/loongarch_initreg.c
+++ b/backends/loongarch_initreg.c
@@ -79,11 +79,8 @@ loongarch_set_initial_registers_tid (pid_t tid 
__attribute__ ((unused)),
    if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec) != 0)
      return false;

-  Dwarf_Word dwarf_fregs[32];
-  for (int r = 0; r < 32; r++)
-    dwarf_fregs[r] = fregs.fpr[r] & 0xFFFFFFFF;
-
-  if (! setfunc (32, 32, dwarf_fregs, arg))
+  /* $f0-$f31 */
+  if (! setfunc (32, 32, &fregs.fpr[0], arg))

Do I need to send the v2 patchset again?

Thanks,
Youling.

>
> Cheers,
>
> Mark
>

Re: [PATCH 2/5] backends: Add set_initial_registers_tid callback for LoongArch

[Youling Tang]

On 05/09/2023 09:32 AM, Youling Tang wrote:
> Hi, Mark
>
> On 05/09/2023 03:57 AM, Mark Wielaard wrote:
>> Him
>>
>> On Fri, Apr 07, 2023 at 10:59:25AM +0800, Youling Tang wrote:
>>> This patch implements the set_initial_registers_tid hook for LoongArch.
>>
>> Looks good, but one question:
>>
>>> +  /* Floating-point registers (only 64bits are used).  */
>>> +  struct user_fp_struct fregs;
>>> +  iovec.iov_base = &fregs;
>>> +  iovec.iov_len = sizeof (fregs);
>>> +  if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec) != 0)
>>> +    return false;
>>> +
>>> +  Dwarf_Word dwarf_fregs[32];
>>> +  for (int r = 0; r < 32; r++)
>>> +    dwarf_fregs[r] = fregs.fpr[r] & 0xFFFFFFFF;
>>
>> The comment says 64bits, but the mask is for 32bits.
>> I assume the comment is wrong and the masking is deliberate?
>
> Thanks for pointing out that there is no need to mask the lower 32 bits
> here.
>
> It can be modified as follows,
> --- a/backends/loongarch_initreg.c
> +++ b/backends/loongarch_initreg.c
> @@ -79,11 +79,8 @@ loongarch_set_initial_registers_tid (pid_t tid
> __attribute__ ((unused)),
>    if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec) != 0)
>      return false;
>
> -  Dwarf_Word dwarf_fregs[32];
> -  for (int r = 0; r < 32; r++)
> -    dwarf_fregs[r] = fregs.fpr[r] & 0xFFFFFFFF;
> -
> -  if (! setfunc (32, 32, dwarf_fregs, arg))
> +  /* $f0-$f31 */
> +  if (! setfunc (32, 32, &fregs.fpr[0], arg))

Need to add `(Dwarf_Word *)`,

if (! setfunc (32, 32, (Dwarf_Word *) &fregs. fpr[0], arg))

>
> Do I need to send the v2 patchset again?
>
> Thanks,
> Youling.
>
>>
>> Cheers,
>>
>> Mark
>>

Re: [PATCH 2/5] backends: Add set_initial_registers_tid callback for LoongArch

[Mark Wielaard]

Hi Youling,

On Tue, 2023-05-09 at 09:32 +0800, Youling Tang wrote:
> Thanks for pointing out that there is no need to mask the lower 32 bits
> here.
> 
> It can be modified as follows,
> --- a/backends/loongarch_initreg.c
> +++ b/backends/loongarch_initreg.c
> @@ -79,11 +79,8 @@ loongarch_set_initial_registers_tid (pid_t tid 
> __attribute__ ((unused)),
>     if (ptrace (PTRACE_GETREGSET, tid, NT_FPREGSET, &iovec) != 0)
>       return false;
> 
> -  Dwarf_Word dwarf_fregs[32];
> -  for (int r = 0; r < 32; r++)
> -    dwarf_fregs[r] = fregs.fpr[r] & 0xFFFFFFFF;
> -
> -  if (! setfunc (32, 32, dwarf_fregs, arg))
> +  /* $f0-$f31 */
> +  if (! setfunc (32, 32, &fregs.fpr[0], arg))
> 
> Do I need to send the v2 patchset again?

Please just sent this patch rebased against the current git branch. I
already pushed the other 4 patches since they looked good.

Thanks,

Mark