[PATCH] ppc64: Add HTM SPRs support to readelf

[PATCH] ppc64: Add HTM SPRs support to readelf

[Gustavo Romero]

Since POWER8, PowerPC 64 supports Hardware Transactional Memory, which has
three special purpose registers associated to it: tfhar, tfiar, and texasr.
This commit add HTM SPRs set as known note type so it's possible to use
'readelf --notes' to inspect the HTM SPRs in a coredump file generated in
such a machines.

Signed-off-by: Gustavo Romero <gromero@linux.vnet.ibm.com>
---
 backends/ChangeLog           |  5 +++++
 backends/ppc_corenote.c      | 13 ++++++++++++-
 backends/ppc_regs.c          | 10 +++++++++-
 libebl/ChangeLog             |  4 ++++
 libebl/eblcorenotetypename.c |  1 +
 libelf/ChangeLog             |  4 ++++
 libelf/elf.h                 |  1 +
 tests/ChangeLog              |  5 +++++
 tests/run-addrcfi.sh         | 18 +++++++++---------
 tests/run-allregs.sh         | 12 ++++++------
 10 files changed, 56 insertions(+), 17 deletions(-)

diff --git a/backends/ChangeLog b/backends/ChangeLog
index d628245..6cecdf9 100644
--- a/backends/ChangeLog
+++ b/backends/ChangeLog
@@ -1,3 +1,8 @@
+2017-07-19  Gustavo Romero <gromero@linux.vnet.ibm.com>
+
+	* ppc_corenote.c: Add offsets for ppc64 HTM SPRs: thfar, tfiar, and texasr.
+	* ppc_regs.c: Add names for ppc64 HTM SPRs mappings.
+
 2017-06-17  Mark Wielaard  <mark@klomp.org>
 
 	* s390_initreg.c: Swap sys/ptrace.h and asm/ptrace.h include order.
diff --git a/backends/ppc_corenote.c b/backends/ppc_corenote.c
index 9ac8871..2b4ada7 100644
--- a/backends/ppc_corenote.c
+++ b/backends/ppc_corenote.c
@@ -94,9 +94,20 @@ static const Ebl_Register_Location spe_regs[] =
     { .offset = 34 * 4, .regno = 612, .count = 1, .bits = 32 }
   };
 
+static const Ebl_Register_Location tm_spr_regs[] =
+  {
+    /* tfhar */
+    { .offset = 0, .regno = 114, .count = 1, .bits = 64 },
+    /* texasr */
+    { .offset = 8, .regno = 116, .count = 1, .bits = 64 },
+    /* tfiar */
+    { .offset = 16, .regno = 115, .count = 1, .bits = 64 }
+  };
+
 #define EXTRA_NOTES \
   EXTRA_REGSET (NT_PPC_VMX, 34 * 16, altivec_regs) \
-  EXTRA_REGSET (NT_PPC_SPE, 35 * 4, spe_regs)
+  EXTRA_REGSET (NT_PPC_SPE, 35 * 4, spe_regs) \
+  EXTRA_REGSET (NT_PPC_TM_SPR, 3 * 8, tm_spr_regs)
 
 #if BITS == 32
 # define ULONG			uint32_t
diff --git a/backends/ppc_regs.c b/backends/ppc_regs.c
index bcf4f7a..c2d5011 100644
--- a/backends/ppc_regs.c
+++ b/backends/ppc_regs.c
@@ -149,7 +149,15 @@ ppc_register_info (Ebl *ebl __attribute__ ((unused)),
       namelen = 4;
       break;
 
-    case 110 ... 117:
+    case 114:
+      return stpcpy (name, "tfhar") + 1 - name;
+    case 115:
+      return stpcpy (name, "tfiar") + 1 - name;
+    case 116:
+      return stpcpy (name, "texasr") + 1 - name;
+
+    case 110 ... 113:
+    case 117:
     case 120 ... 121:
     case 123 ... 199:
       name[0] = 's';
diff --git a/libebl/ChangeLog b/libebl/ChangeLog
index 506915b..efeb7c3 100644
--- a/libebl/ChangeLog
+++ b/libebl/ChangeLog
@@ -1,3 +1,7 @@
+2017-07-19  Gustavo Romero <gromero@linux.vnet.ibm.com>
+
+	* eblcorenotetypename.c: Add ppc64 HTM SPRs note as known type.
+
 2017-04-20  Ulf Hermann  <ulf.hermann@qt.io>
 
 	* libebl.h: Use __pure_attribute__.
diff --git a/libebl/eblcorenotetypename.c b/libebl/eblcorenotetypename.c
index fa81dbe..d3a56fa 100644
--- a/libebl/eblcorenotetypename.c
+++ b/libebl/eblcorenotetypename.c
@@ -75,6 +75,7 @@ ebl_core_note_type_name (Ebl *ebl, uint32_t type, char *buf, size_t len)
 	    KNOWNSTYPE (PPC_VMX);
 	    KNOWNSTYPE (PPC_SPE);
 	    KNOWNSTYPE (PPC_VSX);
+	    KNOWNSTYPE (PPC_TM_SPR);
 	    KNOWNSTYPE (386_TLS);
 	    KNOWNSTYPE (386_IOPERM);
 	    KNOWNSTYPE (X86_XSTATE);
diff --git a/libelf/ChangeLog b/libelf/ChangeLog
index 594bec9..e5529e9 100644
--- a/libelf/ChangeLog
+++ b/libelf/ChangeLog
@@ -1,3 +1,7 @@
+2017-07-19  Gustavo Romero <gromero@linux.vnet.ibm.com>
+
+	* elf.h: Add known type in notes segment descriptor for HTM SPRs.
+
 2017-04-20  Ulf Hermann  <ulf.hermann@qt.io>
 
 	* libelfP.h: Don't include config.h.
diff --git a/libelf/elf.h b/libelf/elf.h
index b6112d9..fa35203 100644
--- a/libelf/elf.h
+++ b/libelf/elf.h
@@ -763,6 +763,7 @@ typedef struct
 #define NT_PPC_SPE	0x101		/* PowerPC SPE/EVR registers */
 #define NT_PPC_VSX	0x102		/* PowerPC VSX registers */
 #define NT_386_TLS	0x200		/* i386 TLS slots (struct user_desc) */
+#define NT_PPC_TM_SPR	0x10c		/* PowerPC HW Transactional Memory SPRs */
 #define NT_386_IOPERM	0x201		/* x86 io permission bitmap (1=deny) */
 #define NT_X86_XSTATE	0x202		/* x86 extended state using xsave */
 #define NT_S390_HIGH_GPRS	0x300	/* s390 upper register halves */
diff --git a/tests/ChangeLog b/tests/ChangeLog
index 3dd6f2a..84742c6 100644
--- a/tests/ChangeLog
+++ b/tests/ChangeLog
@@ -1,3 +1,8 @@
+2017-07-19  Gustavo Romero <gromero@linux.vnet.ibm.com>
+
+	* run-addrcfi.sh: Update generic SPRs names to HTM SPRs names
+	* run-allregs.sh: Update generic SPRs names to HTM SPRs names
+
 2017-07-14  Mark Wielaard  <mark@klomp.org>
 
 	* run-strip-remove-keep.sh: New test.
diff --git a/tests/run-addrcfi.sh b/tests/run-addrcfi.sh
index c864eea..376a6dc 100755
--- a/tests/run-addrcfi.sh
+++ b/tests/run-addrcfi.sh
@@ -397,9 +397,9 @@ dwarf_cfi_addrframe (.eh_frame): no matching address range
 	privileged reg111 (spr11): undefined
 	privileged reg112 (spr12): undefined
 	privileged reg113 (spr13): undefined
-	privileged reg114 (spr14): undefined
-	privileged reg115 (spr15): undefined
-	privileged reg116 (spr16): undefined
+	privileged reg114 (tfhar): undefined
+	privileged reg115 (tfiar): undefined
+	privileged reg116 (texasr): undefined
 	privileged reg117 (spr17): undefined
 	privileged reg118 (dsisr): undefined
 	privileged reg119 (dar): undefined
@@ -1419,9 +1419,9 @@ testrun_compare ${abs_builddir}/addrcfi -e testfileppc32 0x100004d2 <<\EOF
 	privileged reg111 (spr11): undefined
 	privileged reg112 (spr12): undefined
 	privileged reg113 (spr13): undefined
-	privileged reg114 (spr14): undefined
-	privileged reg115 (spr15): undefined
-	privileged reg116 (spr16): undefined
+	privileged reg114 (tfhar): undefined
+	privileged reg115 (tfiar): undefined
+	privileged reg116 (texasr): undefined
 	privileged reg117 (spr17): undefined
 	privileged reg118 (dsisr): undefined
 	privileged reg119 (dar): undefined
@@ -2447,9 +2447,9 @@ dwarf_cfi_addrframe (.eh_frame): no matching address range
 	privileged reg111 (spr11): undefined
 	privileged reg112 (spr12): undefined
 	privileged reg113 (spr13): undefined
-	privileged reg114 (spr14): undefined
-	privileged reg115 (spr15): undefined
-	privileged reg116 (spr16): undefined
+	privileged reg114 (tfhar): undefined
+	privileged reg115 (tfiar): undefined
+	privileged reg116 (texasr): undefined
 	privileged reg117 (spr17): undefined
 	privileged reg118 (dsisr): undefined
 	privileged reg119 (dar): undefined
diff --git a/tests/run-allregs.sh b/tests/run-allregs.sh
index d82f37e..7ddd452 100755
--- a/tests/run-allregs.sh
+++ b/tests/run-allregs.sh
@@ -253,9 +253,9 @@ privileged registers:
 	111: spr11 (spr11), unsigned 32 bits
 	112: spr12 (spr12), unsigned 32 bits
 	113: spr13 (spr13), unsigned 32 bits
-	114: spr14 (spr14), unsigned 32 bits
-	115: spr15 (spr15), unsigned 32 bits
-	116: spr16 (spr16), unsigned 32 bits
+	114: tfhar (tfhar), unsigned 32 bits
+	115: tfiar (tfiar), unsigned 32 bits
+	116: texasr (texasr), unsigned 32 bits
 	117: spr17 (spr17), unsigned 32 bits
 	118: dsisr (dsisr), unsigned 32 bits
 	119: dar (dar), unsigned 32 bits
@@ -1276,9 +1276,9 @@ privileged registers:
 	111: spr11 (spr11), unsigned 64 bits
 	112: spr12 (spr12), unsigned 64 bits
 	113: spr13 (spr13), unsigned 64 bits
-	114: spr14 (spr14), unsigned 64 bits
-	115: spr15 (spr15), unsigned 64 bits
-	116: spr16 (spr16), unsigned 64 bits
+	114: tfhar (tfhar), unsigned 64 bits
+	115: tfiar (tfiar), unsigned 64 bits
+	116: texasr (texasr), unsigned 64 bits
 	117: spr17 (spr17), unsigned 64 bits
 	118: dsisr (dsisr), unsigned 64 bits
 	119: dar (dar), unsigned 64 bits
-- 
2.7.4

Re: [PATCH] ppc64: Add HTM SPRs support to readelf

[Mark Wielaard]

On Thu, 2017-07-20 at 17:49 -0400, Gustavo Romero wrote:
> Since POWER8, PowerPC 64 supports Hardware Transactional Memory, which has
> three special purpose registers associated to it: tfhar, tfiar, and texasr.
> This commit add HTM SPRs set as known note type so it's possible to use
> 'readelf --notes' to inspect the HTM SPRs in a coredump file generated in
> such a machines.

This patch looks perfect, thanks.

One nitpick.

> diff --git a/libelf/ChangeLog b/libelf/ChangeLog
> index 594bec9..e5529e9 100644
> --- a/libelf/ChangeLog
> +++ b/libelf/ChangeLog
> @@ -1,3 +1,7 @@
> +2017-07-19  Gustavo Romero <gromero@linux.vnet.ibm.com>
> +
> +	* elf.h: Add known type in notes segment descriptor for HTM SPRs.
> +
>  2017-04-20  Ulf Hermann  <ulf.hermann@qt.io>
>  
>  	* libelfP.h: Don't include config.h.
> diff --git a/libelf/elf.h b/libelf/elf.h
> index b6112d9..fa35203 100644
> --- a/libelf/elf.h
> +++ b/libelf/elf.h
> @@ -763,6 +763,7 @@ typedef struct
>  #define NT_PPC_SPE	0x101		/* PowerPC SPE/EVR registers */
>  #define NT_PPC_VSX	0x102		/* PowerPC VSX registers */
>  #define NT_386_TLS	0x200		/* i386 TLS slots (struct user_desc) */
> +#define NT_PPC_TM_SPR	0x10c		/* PowerPC HW Transactional Memory SPRs */
>  #define NT_386_IOPERM	0x201		/* x86 io permission bitmap (1=deny) */
>  #define NT_X86_XSTATE	0x202		/* x86 extended state using xsave */
>  #define NT_S390_HIGH_GPRS	0x300	/* s390 upper register halves */

We normally keep elf.h in sync with glibc.
Could you submit this elf.h change to libc-alpha@sourceware.org?
Then we resync elf.h from glibc to pull in the new constants.

Thanks,

Mark

Re: [PATCH] ppc64: Add HTM SPRs support to readelf

[Gustavo Romero]

Hi Mark,

On 21-07-2017 16:55, Mark Wielaard wrote:
> On Thu, 2017-07-20 at 17:49 -0400, Gustavo Romero wrote:
>> Since POWER8, PowerPC 64 supports Hardware Transactional Memory, which has
>> three special purpose registers associated to it: tfhar, tfiar, and texasr.
>> This commit add HTM SPRs set as known note type so it's possible to use
>> 'readelf --notes' to inspect the HTM SPRs in a coredump file generated in
>> such a machines.
> 
> This patch looks perfect, thanks.

Thanks for reviewing it!


> 
> We normally keep elf.h in sync with glibc.
> Could you submit this elf.h change to libc-alpha@sourceware.org?
> Then we resync elf.h from glibc to pull in the new constants.

It looks like glibc community won't review / push that change as it is in
freeze for glibc 2.26 cut right now accordingly to [1].

If my understanding is correct, it's a blocker or my change can be pushed
to elfutils and once glibc is open again (in about a week) I can submit
this elf.h change to libc-alpha@sourceware.org?


Thank you and best regards,
Gustavo

[1] https://sourceware.org/ml/libc-alpha/2017-07/msg00018.htm

Re: [PATCH] ppc64: Add HTM SPRs support to readelf

[Mark Wielaard]

On Mon, Jul 24, 2017 at 11:54:34AM -0300, Gustavo Romero wrote:
> On 21-07-2017 16:55, Mark Wielaard wrote:
> > This patch looks perfect, thanks.
> 
> Thanks for reviewing it!
>
> > We normally keep elf.h in sync with glibc.
> > Could you submit this elf.h change to libc-alpha@sourceware.org?
> > Then we resync elf.h from glibc to pull in the new constants.
> 
> It looks like glibc community won't review / push that change as it is in
> freeze for glibc 2.26 cut right now accordingly to [1].
> 
> If my understanding is correct, it's a blocker or my change can be pushed
> to elfutils and once glibc is open again (in about a week) I can submit
> this elf.h change to libc-alpha@sourceware.org?

Lets call it a soft-block :) It is just that I hate the files getting
out of sync. We risk using slightly differently named constants. It
looks like the 2.26 release will be next week, so hopefully the freeze
will be over end of this week.

Could you post the fix to libc-alpha already and then ping it next
week once the tree open up again? Then I'll push your patch to
elfutils.

Thanks,

Mark

Re: [PATCH] ppc64: Add HTM SPRs support to readelf

[Gustavo Romero]

Hi Mark,

On 24-07-2017 16:17, Mark Wielaard wrote:
>>> We normally keep elf.h in sync with glibc.
>>> Could you submit this elf.h change to libc-alpha@sourceware.org?
>>> Then we resync elf.h from glibc to pull in the new constants.
>>
>> It looks like glibc community won't review / push that change as it is in
>> freeze for glibc 2.26 cut right now accordingly to [1].
>>
>> If my understanding is correct, it's a blocker or my change can be pushed
>> to elfutils and once glibc is open again (in about a week) I can submit
>> this elf.h change to libc-alpha@sourceware.org?
> 
> Lets call it a soft-block :) It is just that I hate the files getting
> out of sync. We risk using slightly differently named constants. It
> looks like the 2.26 release will be next week, so hopefully the freeze
> will be over end of this week.
> 
> Could you post the fix to libc-alpha already and then ping it next
> week once the tree open up again? Then I'll push your patch to
> elfutils.

Posted: https://sourceware.org/ml/libc-alpha/2017-07/msg00827.html

Thank you and best regards,
Gustavo

Re: [PATCH] ppc64: Add HTM SPRs support to readelf

[Gustavo Romero]

I'll ping it next week and follow-up. Thanks!

Regards,
Gustavo

On 24-07-2017 17:47, Gustavo Romero wrote:
> Hi Mark,
> 
> On 24-07-2017 16:17, Mark Wielaard wrote:
>>>> We normally keep elf.h in sync with glibc.
>>>> Could you submit this elf.h change to libc-alpha@sourceware.org?
>>>> Then we resync elf.h from glibc to pull in the new constants.
>>>
>>> It looks like glibc community won't review / push that change as it is in
>>> freeze for glibc 2.26 cut right now accordingly to [1].
>>>
>>> If my understanding is correct, it's a blocker or my change can be pushed
>>> to elfutils and once glibc is open again (in about a week) I can submit
>>> this elf.h change to libc-alpha@sourceware.org?
>>
>> Lets call it a soft-block :) It is just that I hate the files getting
>> out of sync. We risk using slightly differently named constants. It
>> looks like the 2.26 release will be next week, so hopefully the freeze
>> will be over end of this week.
>>
>> Could you post the fix to libc-alpha already and then ping it next
>> week once the tree open up again? Then I'll push your patch to
>> elfutils.
> 
> Posted: https://sourceware.org/ml/libc-alpha/2017-07/msg00827.html
> 
> Thank you and best regards,
> Gustavo
> 

Re: [PATCH] ppc64: Add HTM SPRs support to readelf

[Mark Wielaard]

On Mon, Jul 24, 2017 at 05:50:36PM -0300, Gustavo Romero wrote:
> I'll ping it next week and follow-up. Thanks!

Thanks. I pushed you commit to master already.
Lets make sure to resync glibc elf.h next week.

Cheers,

Mark

Re: [PATCH] ppc64: Add HTM SPRs support to readelf

[Gustavo Romero]

Dear Mark,

On 25-07-2017 07:34, Mark Wielaard wrote:
> On Mon, Jul 24, 2017 at 05:50:36PM -0300, Gustavo Romero wrote:
>> I'll ping it next week and follow-up. Thanks!
> 
> Thanks. I pushed you commit to master already.
> Lets make sure to resync glibc elf.h next week.

Thank you so much for waiting the elf.h update at glibc side :-)

For the records, it was pushed today: http://tinyurl.com/ydgl28f4

Regards,
Gustavo

Re: [PATCH] ppc64: Add HTM SPRs support to readelf

[Mark Wielaard]

[-- Attachment #1: Type: text/plain, Size: 572 bytes --]

Hi Gustavo,

On Tue, Aug 15, 2017 at 11:23:37AM -0300, Gustavo Romero wrote:
> On 25-07-2017 07:34, Mark Wielaard wrote:
> > On Mon, Jul 24, 2017 at 05:50:36PM -0300, Gustavo Romero wrote:
> >> I'll ping it next week and follow-up. Thanks!
> > 
> > Thanks. I pushed you commit to master already.
> > Lets make sure to resync glibc elf.h next week.
> 
> Thank you so much for waiting the elf.h update at glibc side :-)
> 
> For the records, it was pushed today: http://tinyurl.com/ydgl28f4

Thanks for following up.
I resynced our elf.h from glibc just now.

Cheers,

Mark

[-- Attachment #2: 0001-libelf-Sync-elf.h-from-glibc.patch --]
[-- Type: text/plain, Size: 5585 bytes --]

From 6d2e7e7100429df3d548251e9685a1eb7bb434cb Mon Sep 17 00:00:00 2001
From: Mark Wielaard <mark@klomp.org>
Date: Tue, 15 Aug 2017 22:43:01 +0200
Subject: [PATCH] libelf: Sync elf.h from glibc.

Add new powerpc note descriptors.

Signed-off-by: Mark Wielaard <mark@klomp.org>
---
 libelf/ChangeLog |  4 +++
 libelf/elf.h     | 96 ++++++++++++++++++++++++++++++++++++++++++++++++++++++--
 2 files changed, 97 insertions(+), 3 deletions(-)

diff --git a/libelf/ChangeLog b/libelf/ChangeLog
index b17e1c5e..436b8880 100644
--- a/libelf/ChangeLog
+++ b/libelf/ChangeLog
@@ -1,3 +1,7 @@
+2017-08-15  Mark Wielaard  <mark@klomp.org>
+
+	* elf.h: Update from glibc. Add new powerpc note descriptors.
+
 2017-07-19  Gustavo Romero <gromero@linux.vnet.ibm.com>
 
 	* elf.h: Add known type in notes segment descriptor for HTM SPRs.
diff --git a/libelf/elf.h b/libelf/elf.h
index fa35203d..84a71260 100644
--- a/libelf/elf.h
+++ b/libelf/elf.h
@@ -1,5 +1,5 @@
 /* This file defines standard ELF types, structures, and macros.
-   Copyright (C) 1995-2016 Free Software Foundation, Inc.
+   Copyright (C) 1995-2017 Free Software Foundation, Inc.
    This file is part of the GNU C Library.
 
    The GNU C Library is free software; you can redistribute it and/or
@@ -762,8 +762,23 @@ typedef struct
 #define NT_PPC_VMX	0x100		/* PowerPC Altivec/VMX registers */
 #define NT_PPC_SPE	0x101		/* PowerPC SPE/EVR registers */
 #define NT_PPC_VSX	0x102		/* PowerPC VSX registers */
+#define NT_PPC_TAR	0x103		/* Target Address Register */
+#define NT_PPC_PPR	0x104		/* Program Priority Register */
+#define NT_PPC_DSCR	0x105		/* Data Stream Control Register */
+#define NT_PPC_EBB	0x106		/* Event Based Branch Registers */
+#define NT_PPC_PMU	0x107		/* Performance Monitor Registers */
+#define NT_PPC_TM_CGPR	0x108		/* TM checkpointed GPR Registers */
+#define NT_PPC_TM_CFPR	0x109		/* TM checkpointed FPR Registers */
+#define NT_PPC_TM_CVMX	0x10a		/* TM checkpointed VMX Registers */
+#define NT_PPC_TM_CVSX	0x10b		/* TM checkpointed VSX Registers */
+#define NT_PPC_TM_SPR	0x10c		/* TM Special Purpose Registers */
+#define NT_PPC_TM_CTAR	0x10d		/* TM checkpointed Target Address
+					   Register */
+#define NT_PPC_TM_CPPR	0x10e		/* TM checkpointed Program Priority
+					   Register */
+#define NT_PPC_TM_CDSCR	0x10f		/* TM checkpointed Data Stream Control
+					   Register */
 #define NT_386_TLS	0x200		/* i386 TLS slots (struct user_desc) */
-#define NT_PPC_TM_SPR	0x10c		/* PowerPC HW Transactional Memory SPRs */
 #define NT_386_IOPERM	0x201		/* x86 io permission bitmap (1=deny) */
 #define NT_X86_XSTATE	0x202		/* x86 extended state using xsave */
 #define NT_S390_HIGH_GPRS	0x300	/* s390 upper register halves */
@@ -1171,6 +1186,18 @@ typedef struct
 #define AT_L2_CACHESHAPE	36
 #define AT_L3_CACHESHAPE	37
 
+/* Shapes of the caches, with more room to describe them.
+   *GEOMETRY are comprised of cache line size in bytes in the bottom 16 bits
+   and the cache associativity in the next 16 bits.  */
+#define AT_L1I_CACHESIZE	40
+#define AT_L1I_CACHEGEOMETRY	41
+#define AT_L1D_CACHESIZE	42
+#define AT_L1D_CACHEGEOMETRY	43
+#define AT_L2_CACHESIZE		44
+#define AT_L2_CACHEGEOMETRY	45
+#define AT_L3_CACHESIZE		46
+#define AT_L3_CACHEGEOMETRY	47
+
 /* Note section contents.  Each entry in the note section begins with
    a header of a fixed form.  */
 
@@ -2533,9 +2560,10 @@ enum
 #define DT_PPC64_OPT	(DT_LOPROC + 3)
 #define DT_PPC64_NUM    4
 
-/* PowerPC64 specific values for the DT_PPC64_OPT Dyn entry.  */
+/* PowerPC64 specific bits in the DT_PPC64_OPT Dyn entry.  */
 #define PPC64_OPT_TLS		1
 #define PPC64_OPT_MULTI_TOC	2
+#define PPC64_OPT_LOCALENTRY	4
 
 /* PowerPC64 specific values for the Elf64_Sym st_other field.  */
 #define STO_PPC64_LOCAL_BIT	5
@@ -3683,6 +3711,68 @@ enum
 #define R_BPF_NONE		0	/* No reloc */
 #define R_BPF_MAP_FD		1	/* Map fd to pointer */
 
+/* Imagination Meta specific relocations. */
+
+#define R_METAG_HIADDR16	0
+#define R_METAG_LOADDR16	1
+#define R_METAG_ADDR32		2	/* 32bit absolute address */
+#define R_METAG_NONE		3	/* No reloc */
+#define R_METAG_RELBRANCH	4
+#define R_METAG_GETSETOFF	5
+
+/* Backward compatability */
+#define R_METAG_REG32OP1	6
+#define R_METAG_REG32OP2	7
+#define R_METAG_REG32OP3	8
+#define R_METAG_REG16OP1	9
+#define R_METAG_REG16OP2	10
+#define R_METAG_REG16OP3	11
+#define R_METAG_REG32OP4	12
+
+#define R_METAG_HIOG		13
+#define R_METAG_LOOG		14
+
+#define R_METAG_REL8		15
+#define R_METAG_REL16		16
+
+/* GNU */
+#define R_METAG_GNU_VTINHERIT	30
+#define R_METAG_GNU_VTENTRY	31
+
+/* PIC relocations */
+#define R_METAG_HI16_GOTOFF	32
+#define R_METAG_LO16_GOTOFF	33
+#define R_METAG_GETSET_GOTOFF	34
+#define R_METAG_GETSET_GOT	35
+#define R_METAG_HI16_GOTPC	36
+#define R_METAG_LO16_GOTPC	37
+#define R_METAG_HI16_PLT	38
+#define R_METAG_LO16_PLT	39
+#define R_METAG_RELBRANCH_PLT	40
+#define R_METAG_GOTOFF		41
+#define R_METAG_PLT		42
+#define R_METAG_COPY		43
+#define R_METAG_JMP_SLOT	44
+#define R_METAG_RELATIVE	45
+#define R_METAG_GLOB_DAT	46
+
+/* TLS relocations */
+#define R_METAG_TLS_GD		47
+#define R_METAG_TLS_LDM		48
+#define R_METAG_TLS_LDO_HI16	49
+#define R_METAG_TLS_LDO_LO16	50
+#define R_METAG_TLS_LDO		51
+#define R_METAG_TLS_IE		52
+#define R_METAG_TLS_IENONPIC	53
+#define R_METAG_TLS_IENONPIC_HI16 54
+#define R_METAG_TLS_IENONPIC_LO16 55
+#define R_METAG_TLS_TPOFF	56
+#define R_METAG_TLS_DTPMOD	57
+#define R_METAG_TLS_DTPOFF	58
+#define R_METAG_TLS_LE		59
+#define R_METAG_TLS_LE_HI16	60
+#define R_METAG_TLS_LE_LO16	61
+
 __END_DECLS
 
 #endif	/* elf.h */
-- 
2.13.4