From: "wilson at gcc dot gnu.org" <sourceware-bugzilla@sourceware.org>
To: elfutils-devel@sourceware.org
Subject: [Bug backends/27925] riscv backend only provides return value locations for code compiled for LP64D ABI
Date: Mon, 20 Sep 2021 02:29:23 +0000 [thread overview]
Message-ID: <bug-27925-10460-QIS9yw2hnv@http.sourceware.org/bugzilla/> (raw)
In-Reply-To: <bug-27925-10460@http.sourceware.org/bugzilla/>
https://sourceware.org/bugzilla/show_bug.cgi?id=27925
--- Comment #5 from Jim Wilson <wilson at gcc dot gnu.org> ---
I hadn't thought about the kernel. It is compiled LP64 and with the FP
extensions disabled, to avoid accidentally using FP registers. It does
save/restore FP registers in the context switching code, but otherwise doesn't
use FP registers, so that we don't have to save/restore FP registers in system
calls. If there are no FP types in the kernel then LP64D will behave
identically to LP64. But if you have a testsuite that checks all features,
then we would have to implement LP64 correctly, and your patch is a step in the
right direction.
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next prev parent reply other threads:[~2021-09-20 2:29 UTC|newest]
Thread overview: 14+ messages / expand[flat|nested] mbox.gz Atom feed top
2021-05-27 18:58 [Bug backends/27925] New: " wcohen at redhat dot com
2021-09-18 21:18 ` [Bug backends/27925] " wcohen at redhat dot com
2021-09-19 10:30 ` mark at klomp dot org
2021-09-19 16:45 ` wilson at gcc dot gnu.org
2021-09-19 23:22 ` wcohen at redhat dot com
2021-09-20 2:29 ` wilson at gcc dot gnu.org [this message]
2021-09-20 7:42 ` mark at klomp dot org
2021-09-23 3:26 ` wcohen at redhat dot com
2021-09-23 14:22 ` wilson at gcc dot gnu.org
2021-09-23 14:30 ` wilson at gcc dot gnu.org
2021-09-29 13:43 ` mark at klomp dot org
2021-09-29 17:02 ` wilson at gcc dot gnu.org
2021-09-29 20:13 ` wcohen at redhat dot com
2021-09-29 22:14 ` mark at klomp dot org
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