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* Re: binutils bug you reported (fwd)
@ 1997-09-25  6:16 Joel Sherrill
  1997-09-25 10:00 ` Ian Lance Taylor
  0 siblings, 1 reply; 3+ messages in thread
From: Joel Sherrill @ 1997-09-25  6:16 UTC (permalink / raw)
  To: gas2

Here is a little more information on the binutils patch I got from a user.

If it is not enough or you need me to send you a manual page or two, let
me know.

--joel


---------- Forwarded message ----------
Date: Wed, 24 Sep 97 16:09:00 -0600
From: Eric Norum <eric@skatter.USask.Ca>
To: Joel Sherrill <joel@OARcorp.com>
Subject: Re: binutils bug you reported

You wrote:
> Do you have a test case or description? Ian was going to merge it
> but did not understand why it was necessary.
>
> --joel
>

Here's the file I got from the Linux people:
===================================================================

I guess, there are two small bug in gas (binutils 2.8.1), concerning cpu32
targets (68332).

1. 'tst.l a0' won't assemble any more (it worked fine in version 2.6). The
        reason is, that this addressing mode is allowed in
        'binutils-2.8.1/opcodes/m68k-opc.c'only for targets 'm68020up'. 
        My cpu32 reference manual (cpu32rm/ad rev 1) allows this  
addressing
        mode for word and long word operation

        I suggest one should change /binutils-2.8.1/opcodes/m68k-opc.c:

        original code:

        {"tstb", one(0045000), one(0177700), ";b", m68020up | mcf5200 },
        {"tstb", one(0045000), one(0177700), "@b", m68000up },
        {"tstw", one(0045100), one(0177700), "*w", m68020up | mcf5200 },
        {"tstw", one(0045100), one(0177700), "@w", m68000up },
        {"tstl", one(0045200), one(0177700), "*l", m68020up | mcf5200 },
        {"tstl", one(0045200), one(0177700), "@l", m68000up },

        new code:

>>>     {"tstb", one(0045000), one(0177700), ";b", m68020up |  
mcf5200 | cpu32 },
        {"tstb", one(0045000), one(0177700), "@b", m68000up },
>>>     {"tstw", one(0045100), one(0177700), "*w", m68020up |  
mcf5200 | cpu32 },
        {"tstw", one(0045100), one(0177700), "@w", m68000up },
>>>     {"tstl", one(0045200), one(0177700), "*l", m68020up |  
mcf5200 | cpu32 },
        {"tstl", one(0045200), one(0177700), "@l", m68000up },

2. 'tblu.w a0@,d0' won't assemble. The error message tells something about
        'invalid operand'. The table lookup and interpolate opcode  
(tbls, tblsn,
        tblu, tblun) allows two types of operands:

          eg:
                tblu.<size>     <ea>,Dx
                tblu.<size>     Dym:Dyn,Dx

        The first one (wich is not allowed by gas) is similar to the
        addressing mode of the 'mulu' opcode, except immediate data,
        so made the following change to  
/binutils-2.8.1/opcodes/m68k-opc.c:

        original code:

        #define TBL1(name,signed,round,size)                          
       \
          {name, two(0174000,  
(signed<<11)|(!round<<10)|(size<<6)|0000400), \
             two(0177700,0107777), "`sD1", cpu32 },                   
       \
          {name, two(0174000, (signed<<11)|(!round<<10)|(size<<6)),   
       \
             two(0177770,0107770), "DsD3D1", cpu32 }

        new code:

        #define TBL1(name,signed,round,size)                          
       \
          {name, two(0174000,  
(signed<<11)|(!round<<10)|(size<<6)|0000400), \
>>>          two(0177700,0107777), "@lD1", cpu32 },                   
       \
          {name, two(0174000, (signed<<11)|(!round<<10)|(size<<6)),   
       \
             two(0177770,0107770), "DsD3D1", cpu32 }


---
Eric Norum                                 eric@skatter.usask.ca
Saskatchewan Accelerator Laboratory        Phone: (306) 966-6308
University of Saskatchewan                 FAX:   (306) 966-6058
Saskatoon, Canada.


^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: binutils bug you reported (fwd)
  1997-09-25  6:16 binutils bug you reported (fwd) Joel Sherrill
@ 1997-09-25 10:00 ` Ian Lance Taylor
  1997-09-25 10:28   ` Joel Sherrill
  0 siblings, 1 reply; 3+ messages in thread
From: Ian Lance Taylor @ 1997-09-25 10:00 UTC (permalink / raw)
  To: joel; +Cc: gas2

   Date: Thu, 25 Sep 1997 07:38:20 -0500 (CDT)
   From: Joel Sherrill <joel@OARcorp.com>

   2. 'tblu.w a0@,d0' won't assemble. The error message tells something about
	   'invalid operand'. The table lookup and interpolate opcode  
   (tbls, tblsn,
	   tblu, tblun) allows two types of operands:

	     eg:
		   tblu.<size>     <ea>,Dx
		   tblu.<size>     Dym:Dyn,Dx

Interesting.  My basic Motorola manual says that tbls does not permits
a0@, although it does permit a0@-, and that is what gas implements.
However, the manual also says that tblu permits both a0@ and a0@-, and
gas does not implement that.

I checked a CPU32 specific manual, and it says that both instructions
support a0@, and neither supports a0@-.

I couldn't get any useful information from the Motorola web site.

Since a0@- doesn't really make sense for these instructions, I'll
change gas to not permit a0@-, but to permit a0@, for both.

Either way, the submitted patch is wrong, since it permits operand
types which are not actually permitted.

Ian

^ permalink raw reply	[flat|nested] 3+ messages in thread

* Re: binutils bug you reported (fwd)
  1997-09-25 10:00 ` Ian Lance Taylor
@ 1997-09-25 10:28   ` Joel Sherrill
  0 siblings, 0 replies; 3+ messages in thread
From: Joel Sherrill @ 1997-09-25 10:28 UTC (permalink / raw)
  To: Ian Lance Taylor; +Cc: gas2

On Thu, 25 Sep 1997, Ian Lance Taylor wrote:
> 
>    2. 'tblu.w a0@,d0' won't assemble. The error message tells something about
> 	   'invalid operand'. The table lookup and interpolate opcode  
>    (tbls, tblsn,
> 	   tblu, tblun) allows two types of operands:
> 
> 	     eg:
> 		   tblu.<size>     <ea>,Dx
> 		   tblu.<size>     Dym:Dyn,Dx
> 
> Interesting.  My basic Motorola manual says that tbls does not permits
> a0@, although it does permit a0@-, and that is what gas implements.
> However, the manual also says that tblu permits both a0@ and a0@-, and
> gas does not implement that.


My reading of the 68000 Instruction Set Manual says that it is not
permitted which is consistent with the implementation.  But the CPU32
Reference Manual is pretty clear  in that a0@ is permitted for both
instructions but not a0@- or a0@+.  Sounds like the manual set is very
inconsistent.  It would be interesting to listen to someone at Motorola
squirm. :)

> I checked a CPU32 specific manual, and it says that both instructions
> support a0@, and neither supports a0@-.

That's my interpretation as well.

> I couldn't get any useful information from the Motorola web site.

No Surprise here.  They have a lot of stuff on their site but you can
never find what you are looking for.

> Since a0@- doesn't really make sense for these instructions, I'll
> change gas to not permit a0@-, but to permit a0@, for both.
> 
> Either way, the submitted patch is wrong, since it permits operand
> types which are not actually permitted.

Fine.  It sounds like whoover wrote the patch was not that knowledgeable
but knew there was a problem.  

Thanks.

--joel


^ permalink raw reply	[flat|nested] 3+ messages in thread

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1997-09-25 10:00 ` Ian Lance Taylor
1997-09-25 10:28   ` Joel Sherrill

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