public inbox for gcc-bugs@sourceware.org
help / color / mirror / Atom feed
* [Bug target/101743] New: [12 Regression] Error: insn does not satisfy its constraints since r12-2640-gf7bf03cf69ccb7dc
@ 2021-08-03  8:24 marxin at gcc dot gnu.org
  2021-08-03  8:25 ` [Bug target/101743] " marxin at gcc dot gnu.org
                   ` (4 more replies)
  0 siblings, 5 replies; 6+ messages in thread
From: marxin at gcc dot gnu.org @ 2021-08-03  8:24 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101743

            Bug ID: 101743
           Summary: [12 Regression] Error: insn does not satisfy its
                    constraints since r12-2640-gf7bf03cf69ccb7dc
           Product: gcc
           Version: 12.0
            Status: UNCONFIRMED
          Keywords: ice-on-valid-code
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: marxin at gcc dot gnu.org
                CC: roger at nextmovesoftware dot com, uros at gcc dot gnu.org
  Target Milestone: ---
              Host: x86_64-linux-gnu

Created attachment 51249
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=51249&action=edit
RTL dump file

The ICE happens in cam4_r SPEC 2017 benchmark when run with PGO and
-march=znver2 -Ofast. It's not easy to get a test-case as the file contains
quite some modules.

Hope you'll be able to guess what's wrong based on RTL dump file.

$ gfortran -I/tmp/ -c -Ofast -march=znver2 -g -std=legacy -fprofile-use
m_MCTWorld.fppized.f90 -fdump-rtl-all
...
Error: insn does not satisfy its constraints:
(insn 2301 2106 2302 113 (parallel [
            (set (reg:CCGOC 17 flags)
                (compare:CCGOC (plus:DI (reg:DI 20 xmm0 [orig:311 vect__743.211
] [311])
                        (const_int -1 [0xffffffffffffffff]))
                    (const_int 0 [0])))
            (set (reg:DI 20 xmm0 [orig:311 vect__743.211 ] [311])
                (plus:DI (reg:DI 20 xmm0 [orig:311 vect__743.211 ] [311])
                    (const_int -1 [0xffffffffffffffff])))
        ]) "m_MCTWorld.fppized.f90":103:40 217 {*adddi_2}
     (nil))
during RTL pass: rnreg
dump file: m_MCTWorld.fppized.f90.313r.rnreg
m_MCTWorld.fppized.f90:116:22: internal compiler error: in
extract_constrain_insn, at recog.c:2670
0x7143a8 _fatal_insn(char const*, rtx_def const*, char const*, int, char
const*)
        /home/marxin/Programming/gcc/gcc/rtl-error.c:108
0x7143d6 _fatal_insn_not_found(rtx_def const*, char const*, int, char const*)
        /home/marxin/Programming/gcc/gcc/rtl-error.c:118
0x7125cb extract_constrain_insn(rtx_insn*)
        /home/marxin/Programming/gcc/gcc/recog.c:2670
0xeaf065 build_def_use
        /home/marxin/Programming/gcc/gcc/regrename.c:1691
0xeaf065 regrename_analyze(bitmap_head*, bool)
        /home/marxin/Programming/gcc/gcc/regrename.c:763
0xeb0196 regrename_optimize
        /home/marxin/Programming/gcc/gcc/regrename.c:1974
0xeb0196 execute
        /home/marxin/Programming/gcc/gcc/regrename.c:2011
Please submit a full bug report,
with preprocessed source if appropriate.
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [Bug target/101743] [12 Regression] Error: insn does not satisfy its constraints since r12-2640-gf7bf03cf69ccb7dc
  2021-08-03  8:24 [Bug target/101743] New: [12 Regression] Error: insn does not satisfy its constraints since r12-2640-gf7bf03cf69ccb7dc marxin at gcc dot gnu.org
@ 2021-08-03  8:25 ` marxin at gcc dot gnu.org
  2021-08-03  8:49 ` crazylht at gmail dot com
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: marxin at gcc dot gnu.org @ 2021-08-03  8:25 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101743

Martin Liška <marxin at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
     Ever confirmed|0                           |1
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2021-08-03

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [Bug target/101743] [12 Regression] Error: insn does not satisfy its constraints since r12-2640-gf7bf03cf69ccb7dc
  2021-08-03  8:24 [Bug target/101743] New: [12 Regression] Error: insn does not satisfy its constraints since r12-2640-gf7bf03cf69ccb7dc marxin at gcc dot gnu.org
  2021-08-03  8:25 ` [Bug target/101743] " marxin at gcc dot gnu.org
@ 2021-08-03  8:49 ` crazylht at gmail dot com
  2021-08-03 10:46 ` rguenth at gcc dot gnu.org
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: crazylht at gmail dot com @ 2021-08-03  8:49 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101743

Hongtao.liu <crazylht at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |crazylht at gmail dot com

--- Comment #1 from Hongtao.liu <crazylht at gmail dot com> ---
+;; Eliminate a reg-reg mov by inverting the condition of a cmov (#1).
+;; mov r0,r1; dec r0; mov r2,r3; cmov r0,r2 -> dec r1; mov r0,r3; cmov r0, r1
+(define_peephole2
+ [(set (match_operand:SWI248 0 "register_operand")
+       (match_operand:SWI248 1 "register_operand"))
+  (parallel [(set (reg FLAGS_REG) (match_operand 5))
+            (set (match_dup 0) (match_operand:SWI248 6))])
+  (set (match_operand:SWI248 2 "register_operand")
+       (match_operand:SWI248 3))
+  (set (match_dup 0)
+       (if_then_else:SWI248 (match_operator 4 "ix86_comparison_operator"
+                            [(reg FLAGS_REG) (const_int 0)])
+       (match_dup 0)
+       (match_dup 2)))]
+ "TARGET_CMOVE
+  && REGNO (operands[2]) != REGNO (operands[0])
+  && REGNO (operands[2]) != REGNO (operands[1])
+  && peep2_reg_dead_p (1, operands[1])
+  && peep2_reg_dead_p (4, operands[2])
+  && !reg_overlap_mentioned_p (operands[0], operands[3])"
+ [(parallel [(set (match_dup 7) (match_dup 8))
+            (set (match_dup 1) (match_dup 9))])
+  (set (match_dup 0) (match_dup 3))
+  (set (match_dup 0) (if_then_else:SWI248 (match_dup 4)
+                                         (match_dup 1)
+                                         (match_dup 0)))]
+{
+  operands[7] = SET_DEST (XVECEXP (PATTERN (peep2_next_insn (1)), 0, 0));
+  operands[8] = replace_rtx (operands[5], operands[0], operands[1]);
+  operands[9] = replace_rtx (operands[6], operands[0], operands[1]);
+})
+
+;; Eliminate a reg-reg mov by inverting the condition of a cmov (#2).
+;; mov r2,r3; mov r0,r1; dec r0; cmov r0,r2 -> dec r1; mov r0,r3; cmov r0, r1

I guess the below peephole should refine its predicate as general_reg_operand,
since x86 support movement between gpr, sse, mask registers.

r1 here is very likely sse_reg_operand which result in ICE.

+(define_peephole2
+ [(set (match_operand:SWI248 2 "register_operand")
+       (match_operand:SWI248 3))
+  (set (match_operand:SWI248 0 "register_operand")
+       (match_operand:SWI248 1 "register_operand"))
+  (parallel [(set (reg FLAGS_REG) (match_operand 5))
+            (set (match_dup 0) (match_operand:SWI248 6))])
+  (set (match_dup 0)
+       (if_then_else:SWI248 (match_operator 4 "ix86_comparison_operator"
+                            [(reg FLAGS_REG) (const_int 0)])
+       (match_dup 0)
+       (match_dup 2)))]
+ "TARGET_CMOVE
+  && REGNO (operands[2]) != REGNO (operands[0])
+  && REGNO (operands[2]) != REGNO (operands[1])
+  && peep2_reg_dead_p (2, operands[1])
+  && peep2_reg_dead_p (4, operands[2])
+  && !reg_overlap_mentioned_p (operands[0], operands[3])"
+ [(parallel [(set (match_dup 7) (match_dup 8))
+            (set (match_dup 1) (match_dup 9))])
+  (set (match_dup 0) (match_dup 3))
+  (set (match_dup 0) (if_then_else:SWI248 (match_dup 4)
+                                         (match_dup 1)
+                                         (match_dup 0)))]
+{
+  operands[7] = SET_DEST (XVECEXP (PATTERN (peep2_next_insn (2)), 0, 0));
+  operands[8] = replace_rtx (operands[5], operands[0], operands[1]);
+  operands[9] = replace_rtx (operands[6], operands[0], operands[1]);
+})
+

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [Bug target/101743] [12 Regression] Error: insn does not satisfy its constraints since r12-2640-gf7bf03cf69ccb7dc
  2021-08-03  8:24 [Bug target/101743] New: [12 Regression] Error: insn does not satisfy its constraints since r12-2640-gf7bf03cf69ccb7dc marxin at gcc dot gnu.org
  2021-08-03  8:25 ` [Bug target/101743] " marxin at gcc dot gnu.org
  2021-08-03  8:49 ` crazylht at gmail dot com
@ 2021-08-03 10:46 ` rguenth at gcc dot gnu.org
  2021-08-04  9:43 ` cvs-commit at gcc dot gnu.org
  2021-08-12 10:28 ` marxin at gcc dot gnu.org
  4 siblings, 0 replies; 6+ messages in thread
From: rguenth at gcc dot gnu.org @ 2021-08-03 10:46 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101743

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |12.0

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [Bug target/101743] [12 Regression] Error: insn does not satisfy its constraints since r12-2640-gf7bf03cf69ccb7dc
  2021-08-03  8:24 [Bug target/101743] New: [12 Regression] Error: insn does not satisfy its constraints since r12-2640-gf7bf03cf69ccb7dc marxin at gcc dot gnu.org
                   ` (2 preceding siblings ...)
  2021-08-03 10:46 ` rguenth at gcc dot gnu.org
@ 2021-08-04  9:43 ` cvs-commit at gcc dot gnu.org
  2021-08-12 10:28 ` marxin at gcc dot gnu.org
  4 siblings, 0 replies; 6+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2021-08-04  9:43 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101743

--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by hongtao Liu <liuhongt@gcc.gnu.org>:

https://gcc.gnu.org/g:9f26640f7b89c771b0ebffd7e7f5019d0709a955

commit r12-2724-g9f26640f7b89c771b0ebffd7e7f5019d0709a955
Author: liuhongt <hongtao.liu@intel.com>
Date:   Wed Aug 4 10:50:28 2021 +0800

    Refine predicate of peephole2 to general_reg_operand. [PR target/101743]

    The define_peephole2 which is added by r12-2640-gf7bf03cf69ccb7dc
    should only work on general registers, considering that x86 also
    supports mov instructions between gpr, sse reg, mask reg, limiting the
    peephole2 predicate to general_reg_operand.

    gcc/ChangeLog:

            PR target/101743
            * config/i386/i386.md (peephole2): Refine predicate from
            register_operand to general_reg_operand.

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [Bug target/101743] [12 Regression] Error: insn does not satisfy its constraints since r12-2640-gf7bf03cf69ccb7dc
  2021-08-03  8:24 [Bug target/101743] New: [12 Regression] Error: insn does not satisfy its constraints since r12-2640-gf7bf03cf69ccb7dc marxin at gcc dot gnu.org
                   ` (3 preceding siblings ...)
  2021-08-04  9:43 ` cvs-commit at gcc dot gnu.org
@ 2021-08-12 10:28 ` marxin at gcc dot gnu.org
  4 siblings, 0 replies; 6+ messages in thread
From: marxin at gcc dot gnu.org @ 2021-08-12 10:28 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=101743

Martin Liška <marxin at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
         Resolution|---                         |FIXED

--- Comment #3 from Martin Liška <marxin at gcc dot gnu.org> ---
I can confirm it's fixed now.

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2021-08-12 10:28 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2021-08-03  8:24 [Bug target/101743] New: [12 Regression] Error: insn does not satisfy its constraints since r12-2640-gf7bf03cf69ccb7dc marxin at gcc dot gnu.org
2021-08-03  8:25 ` [Bug target/101743] " marxin at gcc dot gnu.org
2021-08-03  8:49 ` crazylht at gmail dot com
2021-08-03 10:46 ` rguenth at gcc dot gnu.org
2021-08-04  9:43 ` cvs-commit at gcc dot gnu.org
2021-08-12 10:28 ` marxin at gcc dot gnu.org

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).