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From: "segher at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/102239] powerpc suboptimal boolean test of contiguous bits
Date: Mon, 29 Nov 2021 10:05:53 +0000	[thread overview]
Message-ID: <bug-102239-4-s2HRs0KABT@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-102239-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=102239

--- Comment #8 from Segher Boessenkool <segher at gcc dot gnu.org> ---
(In reply to luoxhu from comment #6)
> > > foo:
> > > .LFB0:
> > >         .cfi_startproc
> > >         rldicr. 3,3,29,1
> > >         beq 0,.L2
> > 
> > This is fine, but only because it tests the EQ bit (not the LT or GT bits).
> > So the generated RTL for this insn (the 2insn one) is not correct.
> 
> The generated RTL in pr102239.c.300r.split2 is:
> 
> (insn 32 8 33 2 (parallel [
>             (set (reg:CC 100 0 [123])
>                 (compare:CC (and:DI (ashift:DI (reg:DI 3 3 [124])
>                             (const_int 29 [0x1d]))
>                         (const_int -4611686018427387904
> [0xc000000000000000]))
>                     (const_int 0 [0])))
>             (clobber (reg:DI 3 3 [125]))
>         ]) "pr102239.c":4:6 238 {*rotldi3_mask_dot}
>      (nil))
> (insn 33 32 10 2 (set (reg:DI 3 3 [125])
>         (lshiftrt:DI (reg:DI 3 3 [125])
>             (const_int 29 [0x1d]))) "pr102239.c":4:6 278 {lshrdi3}
>      (nil))
> (jump_insn 10 33 11 2 (set (pc)
>         (if_then_else (eq (reg:CC 100 0 [123])
>                 (const_int 0 [0]))
>             (label_ref 15)
>             (pc))) "pr102239.c":4:6 868 {*cbranch}
>      (int_list:REG_BR_PROB 536870916 (nil))
>  -> 15)

So combine will have to look at insn 10 as well when it does the combination
(it often already does, via "other_insn") -- but also it does have to know
an "eq" is okay here, and that requires a new pattern.

> rotldi3_mask_dot is what you mentioned in c#1, it is a shifted result and
> not matter for comparing to 0:

It does matter, if what you are want to see is if it is smaller than zero or
greater than zero.  CCmode includes those things.  There is a CCEQmode for
if only the EQ bit is set correctly.

> > *rotl<mode>3_mask_dot cannot do this either; the base and the dot2 of that
> > cannot be done, they return a shifted result, but that doesn't matter for
> > comparing it to 0.  So we should add a specialised version.
> 
> What specialized version to add?

Some pattern that just does this as an rldicr, as a single insn.  It will
have to be excluded by the 2insn thing (it is only a single insn itself!),
and it will have to have comparison mode CCEQ only.

  parent reply	other threads:[~2021-11-29 10:05 UTC|newest]

Thread overview: 14+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-09-08 11:55 [Bug c/102239] New: " npiggin at gmail dot com
2021-09-09 19:40 ` [Bug target/102239] " segher at gcc dot gnu.org
2021-11-24  7:17 ` luoxhu at gcc dot gnu.org
2021-11-24 23:22 ` segher at gcc dot gnu.org
2021-11-26  8:50 ` luoxhu at gcc dot gnu.org
2021-11-26 15:53 ` segher at gcc dot gnu.org
2021-11-29  3:31 ` luoxhu at gcc dot gnu.org
2021-11-29  6:36 ` luoxhu at gcc dot gnu.org
2021-11-29 10:05 ` segher at gcc dot gnu.org [this message]
2021-11-30  5:28 ` luoxhu at gcc dot gnu.org
2021-11-30 22:59 ` segher at gcc dot gnu.org
2021-12-01  7:46 ` luoxhu at gcc dot gnu.org
2022-01-11  9:23 ` cvs-commit at gcc dot gnu.org
2022-01-12  0:27 ` luoxhu at gcc dot gnu.org

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