[Bug target/104458] New: [11/12 Regression] ICE: SIGSEGV in gen_udivmodhiqi3 -> copy_rtx with -O1 -m8bit-idiv

[Bug target/104458] New: [11/12 Regression] ICE: SIGSEGV in gen_udivmodhiqi3 -> copy_rtx with -O1 -m8bit-idiv

[zsojka at seznam dot cz]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104458

            Bug ID: 104458
           Summary: [11/12 Regression] ICE: SIGSEGV in gen_udivmodhiqi3 ->
                    copy_rtx with -O1 -m8bit-idiv
           Product: gcc
           Version: 12.0
            Status: UNCONFIRMED
          Keywords: ice-on-valid-code
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: zsojka at seznam dot cz
  Target Milestone: ---
              Host: x86_64-pc-linux-gnu
            Target: x86_64-pc-linux-gnu

Created attachment 52384
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=52384&action=edit
reduced testcase

Compiler output:
$ x86_64-pc-linux-gnu-gcc -O1 -m8bit-idiv testcase.c -wrapper valgrind,-q
==18265== Invalid read of size 2
==18265==    at 0x131DB41: copy_rtx(rtx_def*) (rtl.cc:290)
==18265==    by 0x1B857B0: gen_udivmodhiqi3(rtx_def*, rtx_def*, rtx_def*)
(insn-emit.cc:1592)
==18265==    by 0x17C9E9C: ix86_split_idivmod(machine_mode, rtx_def**, bool)
(i386-expand.cc:1469)
==18265==    by 0x1C5D40D: gen_split_167(rtx_insn*, rtx_def**) (i386.md:8758)
==18265==    by 0x21D8CDC: split_insns(rtx_def*, rtx_insn*) (i386.md:15576)
==18265==    by 0xF725E8: try_split(rtx_def*, rtx_insn*, int)
(emit-rtl.cc:3795)
==18265==    by 0x12DCBC9: split_insn(rtx_insn*) (recog.cc:3362)
==18265==    by 0x12E3D27: split_all_insns() (recog.cc:3466)
==18265==    by 0x12E3DD8: (anonymous
namespace)::pass_split_all_insns::execute(function*) (recog.cc:4384)
==18265==    by 0x128CC49: execute_one_pass(opt_pass*) (passes.cc:2637)
==18265==    by 0x128D50F: execute_pass_list_1(opt_pass*) (passes.cc:2737)
==18265==    by 0x128D521: execute_pass_list_1(opt_pass*) (passes.cc:2738)
==18265==  Address 0x0 is not stack'd, malloc'd or (recently) free'd
==18265== 
during RTL pass: split1
testcase.c: In function 'foo':
testcase.c:9:1: internal compiler error: Segmentation fault
    9 | }
      | ^
0x139854f crash_signal
        /repo/gcc-trunk/gcc/toplev.cc:322
0x131db41 copy_rtx(rtx_def*)
        /repo/gcc-trunk/gcc/rtl.cc:290
0x1b857b0 gen_udivmodhiqi3(rtx_def*, rtx_def*, rtx_def*)
        /repo/build-gcc-trunk-amd64/gcc/insn-emit.cc:1592
0x17c9e9c ix86_split_idivmod(machine_mode, rtx_def**, bool)
        /repo/gcc-trunk/gcc/config/i386/i386-expand.cc:1469
0x1c5d40d gen_split_167(rtx_insn*, rtx_def**)
        /repo/gcc-trunk/gcc/config/i386/i386.md:8758
0x21d8cdc split_insns(rtx_def*, rtx_insn*)
        /repo/gcc-trunk/gcc/config/i386/i386.md:15576
0xf725e8 try_split(rtx_def*, rtx_insn*, int)
        /repo/gcc-trunk/gcc/emit-rtl.cc:3795
0x12dcbc9 split_insn
        /repo/gcc-trunk/gcc/recog.cc:3362
0x12e3d27 split_all_insns()
        /repo/gcc-trunk/gcc/recog.cc:3466
0x12e3dd8 execute
        /repo/gcc-trunk/gcc/recog.cc:4384
Please submit a full bug report, with preprocessed source (by using
-freport-bug).
Please include the complete backtrace with any bug report.
See <https://gcc.gnu.org/bugs/> for instructions.

$ x86_64-pc-linux-gnu-gcc -v
Using built-in specs.
COLLECT_GCC=/repo/gcc-trunk/binary-latest-amd64/bin/x86_64-pc-linux-gnu-gcc
COLLECT_LTO_WRAPPER=/repo/gcc-trunk/binary-trunk-r12-7124-20220209171435-g59b31f0e2d1-checking-yes-rtl-df-extra-nobootstrap-amd64/bin/../libexec/gcc/x86_64-pc-linux-gnu/12.0.1/lto-wrapper
Target: x86_64-pc-linux-gnu
Configured with: /repo/gcc-trunk//configure --enable-languages=c,c++
--enable-valgrind-annotations --disable-nls --enable-checking=yes,rtl,df,extra
--disable-bootstrap --with-cloog --with-ppl --with-isl
--build=x86_64-pc-linux-gnu --host=x86_64-pc-linux-gnu
--target=x86_64-pc-linux-gnu --with-ld=/usr/bin/x86_64-pc-linux-gnu-ld
--with-as=/usr/bin/x86_64-pc-linux-gnu-as --disable-libstdcxx-pch
--prefix=/repo/gcc-trunk//binary-trunk-r12-7124-20220209171435-g59b31f0e2d1-checking-yes-rtl-df-extra-nobootstrap-amd64
Thread model: posix
Supported LTO compression algorithms: zlib zstd
gcc version 12.0.1 20220209 (experimental) (GCC)

[Bug target/104458] [11/12 Regression] ICE: SIGSEGV in gen_udivmodhiqi3 -> copy_rtx with -O1 -m8bit-idiv

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104458

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P3                          |P2
   Target Milestone|---                         |11.3

[Bug target/104458] [11/12 Regression] ICE: SIGSEGV in gen_udivmodhiqi3 -> copy_rtx with -O1 -m8bit-idiv

[ubizjak at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104458

Uroš Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |ASSIGNED
           Assignee|unassigned at gcc dot gnu.org      |ubizjak at gmail dot com
   Last reconfirmed|                            |2022-02-09
     Ever confirmed|0                           |1

--- Comment #1 from Uroš Bizjak <ubizjak at gmail dot com> ---
The testcase is quite creative with casts, creating:

(gdb) p debug_rtx ( operands[3])
(subreg:DI (reg:V2SF 96) 0)

which chokes lowpart_subreg. So, force inputs to a register, which is
preferable even when the input is from a memory.

--cut here--
diff --git a/gcc/config/i386/i386-expand.cc b/gcc/config/i386/i386-expand.cc
index eb1930ba375..ce9607e36de 100644
--- a/gcc/config/i386/i386-expand.cc
+++ b/gcc/config/i386/i386-expand.cc
@@ -1407,6 +1407,9 @@ ix86_split_idivmod (machine_mode mode, rtx operands[],
   rtx scratch, tmp0, tmp1, tmp2;
   rtx (*gen_divmod4_1) (rtx, rtx, rtx, rtx);

+  operands[2] = force_reg (mode, operands[2]);
+  operands[3] = force_reg (mode, operands[3]);
+
   switch (mode)
     {
     case E_SImode:
--cut here--

[Bug target/104458] [11/12 Regression] ICE: SIGSEGV in gen_udivmodhiqi3 -> copy_rtx with -O1 -m8bit-idiv

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104458

--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Uros Bizjak <uros@gcc.gnu.org>:

https://gcc.gnu.org/g:2b399dbabd48639ab4daac462c9d82c6cf3f99cc

commit r12-7146-g2b399dbabd48639ab4daac462c9d82c6cf3f99cc
Author: Uros Bizjak <ubizjak@gmail.com>
Date:   Wed Feb 9 20:18:10 2022 +0100

    i386: Force inputs to a register to avoid lowpart_subreg failure [PR104458]

    Input operands can be in the form of:

            (subreg:DI (reg:V2SF 96) 0)

    which chokes lowpart_subreg. Force inputs to a register, which is
    preferable even when the input operand is from memory.

    2022-02-09  Uroš Bizjak  <ubizjak@gmail.com>

    gcc/ChangeLog:

            PR target/104458
            * config/i386/i386-expand.cc (ix86_split_idivmod):
            Force operands[2] and operands[3] into a register..

    gcc/testsuite/ChangeLog:

            PR target/104458
            * gcc.target/i386/pr104458.c: New test.

[Bug target/104458] [11/12 Regression] ICE: SIGSEGV in gen_udivmodhiqi3 -> copy_rtx with -O1 -m8bit-idiv

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104458

--- Comment #3 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-11 branch has been updated by Uros Bizjak <uros@gcc.gnu.org>:

https://gcc.gnu.org/g:11fc7d98a25128d016b8f6f453c193878faf2570

commit r11-9548-g11fc7d98a25128d016b8f6f453c193878faf2570
Author: Uros Bizjak <ubizjak@gmail.com>
Date:   Wed Feb 9 20:18:10 2022 +0100

    i386: Force inputs to a register to avoid lowpart_subreg failure [PR104458]

    Input operands can be in the form of:

            (subreg:DI (reg:V2SF 96) 0)

    which chokes lowpart_subreg. Force inputs to a register, which is
    preferable even when the input operand is from memory.

    2022-02-09  Uroš Bizjak  <ubizjak@gmail.com>

    gcc/ChangeLog:

            PR target/104458
            * config/i386/i386-expand.c (ix86_split_idivmod):
            Force operands[2] and operands[3] into a register..

    gcc/testsuite/ChangeLog:

            PR target/104458
            * gcc.target/i386/pr104458.c: New test.

    (cherry picked from commit 2b399dbabd48639ab4daac462c9d82c6cf3f99cc)

[Bug target/104458] [11/12 Regression] ICE: SIGSEGV in gen_udivmodhiqi3 -> copy_rtx with -O1 -m8bit-idiv

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104458

--- Comment #4 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-10 branch has been updated by Uros Bizjak <uros@gcc.gnu.org>:

https://gcc.gnu.org/g:983b7bcdd048650b193aad6018042b21626b89eb

commit r10-10444-g983b7bcdd048650b193aad6018042b21626b89eb
Author: Uros Bizjak <ubizjak@gmail.com>
Date:   Wed Feb 9 23:40:55 2022 +0100

    i386: Force inputs to a register to avoid lowpart_subreg failure [PR104458]

    Input operands can be in the form of:

            (subreg:DI (reg:V2SF 96) 0)

    which chokes lowpart_subreg. Force inputs to a register, which is
    preferable even when the input operand is from memory.

    2022-02-09  Uroš Bizjak  <ubizjak@gmail.com>

    gcc/ChangeLog:

            PR target/104458
            * config/i386/i386-expand.c (ix86_split_idivmod):
            Force operands[2] and operands[3] into a register..

    gcc/testsuite/ChangeLog:

            PR target/104458
            * gcc.target/i386/pr104458.c: New test.

[Bug target/104458] [11/12 Regression] ICE: SIGSEGV in gen_udivmodhiqi3 -> copy_rtx with -O1 -m8bit-idiv

[ubizjak at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104458

Uroš Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
   Target Milestone|11.3                        |10.4
         Resolution|---                         |FIXED

--- Comment #5 from Uroš Bizjak <ubizjak at gmail dot com> ---
Fixed for gcc-10.4, gcc-11.3 and gcc-12.

[Bug target/104458] [11/12 Regression] ICE: SIGSEGV in gen_udivmodhiqi3 -> copy_rtx with -O1 -m8bit-idiv

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104458

--- Comment #6 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by H.J. Lu <hjl@gcc.gnu.org>:

https://gcc.gnu.org/g:69febe852753448582ae4a73793816dfb9d91c3b

commit r12-7181-g69febe852753448582ae4a73793816dfb9d91c3b
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Thu Feb 10 06:26:23 2022 -0800

    pr104458.c: Replace long with long long for -mx32

            PR target/104458
            * gcc.target/i386/pr104458.c: Replace long with long long.

[Bug target/104458] [11/12 Regression] ICE: SIGSEGV in gen_udivmodhiqi3 -> copy_rtx with -O1 -m8bit-idiv

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104458

--- Comment #7 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-11 branch has been updated by Uros Bizjak <uros@gcc.gnu.org>:

https://gcc.gnu.org/g:3c9a9ce0c1d5fe3d0ac93ff32d7a57e12a5fefb6

commit r11-9552-g3c9a9ce0c1d5fe3d0ac93ff32d7a57e12a5fefb6
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Thu Feb 10 06:26:23 2022 -0800

    pr104458.c: Replace long with long long for -mx32

            PR target/104458
            * gcc.target/i386/pr104458.c: Replace long with long long.

    (cherry picked from commit 69febe852753448582ae4a73793816dfb9d91c3b)

[Bug target/104458] [11/12 Regression] ICE: SIGSEGV in gen_udivmodhiqi3 -> copy_rtx with -O1 -m8bit-idiv

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=104458

--- Comment #8 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-10 branch has been updated by Uros Bizjak <uros@gcc.gnu.org>:

https://gcc.gnu.org/g:0cbdb6f7662e404a72f13a1e47609ca7d80ec4fb

commit r10-10447-g0cbdb6f7662e404a72f13a1e47609ca7d80ec4fb
Author: H.J. Lu <hjl.tools@gmail.com>
Date:   Thu Feb 10 06:26:23 2022 -0800

    pr104458.c: Replace long with long long for -mx32

            PR target/104458
            * gcc.target/i386/pr104458.c: Replace long with long long.

    (cherry picked from commit 69febe852753448582ae4a73793816dfb9d91c3b)