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From: "acoplan at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug tree-optimization/105394] [12 Regression] ICE: verify_gimple failed with MVE during GIMPLE pass: veclower2
Date: Tue, 26 Apr 2022 12:42:38 +0000	[thread overview]
Message-ID: <bug-105394-4-XKHRgWNLRo@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-105394-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105394

--- Comment #2 from Alex Coplan <acoplan at gcc dot gnu.org> ---
(In reply to Richard Biener from comment #1)
> Hmm, in my cross-arm build I get
> 
> > ./cc1plus -quiet t.c -I include -march=armv8.1-m.main+mve -mfloat-abi=hard -O
> cc1plus: error: target CPU does not support ARM mode

Try adding -mthumb (I think the driver does this automatically).

  parent reply	other threads:[~2022-04-26 12:42 UTC|newest]

Thread overview: 17+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-04-26 12:23 [Bug tree-optimization/105394] New: " acoplan at gcc dot gnu.org
2022-04-26 12:40 ` [Bug tree-optimization/105394] " rguenth at gcc dot gnu.org
2022-04-26 12:42 ` acoplan at gcc dot gnu.org [this message]
2022-04-26 13:18 ` rguenth at gcc dot gnu.org
2022-04-26 13:19 ` rguenth at gcc dot gnu.org
2022-04-26 13:22 ` [Bug target/105394] " rguenth at gcc dot gnu.org
2022-04-29  9:07 ` [Bug target/105394] [12/13 " rguenth at gcc dot gnu.org
2022-04-29  9:20 ` rguenth at gcc dot gnu.org
2022-04-29  9:57 ` rguenth at gcc dot gnu.org
2022-04-29  9:59 ` acoplan at gcc dot gnu.org
2022-05-03  8:34 ` acoplan at gcc dot gnu.org
2022-05-03  8:49 ` rguenther at suse dot de
2022-05-03  9:19 ` cvs-commit at gcc dot gnu.org
2022-05-03  9:25 ` [Bug target/105394] [12 " rguenth at gcc dot gnu.org
2022-05-06  8:33 ` jakub at gcc dot gnu.org
2022-05-06  9:27 ` cvs-commit at gcc dot gnu.org
2022-05-06  9:28 ` rguenth at gcc dot gnu.org

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