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* [Bug target/105773] New: [Aarch64] Failure to optimize and+cmp to tst
@ 2022-05-30 13:29 gabravier at gmail dot com
  2022-06-08 12:37 ` [Bug target/105773] " rearnsha at gcc dot gnu.org
                   ` (4 more replies)
  0 siblings, 5 replies; 6+ messages in thread
From: gabravier at gmail dot com @ 2022-05-30 13:29 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105773

            Bug ID: 105773
           Summary: [Aarch64] Failure to optimize and+cmp to tst
           Product: gcc
           Version: 13.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: gabravier at gmail dot com
  Target Milestone: ---

int
baz (unsigned long x, unsigned long y)
{
  return (int) (x & y) > 0;
}

With -O3, AArch64 GCC outputs this:

baz(unsigned long, unsigned long):
        and     w0, w0, w1
        cmp     w0, 0
        cset    w0, gt
        ret

whereas LLVM outputs this:

baz(unsigned long, unsigned long):
        tst     w1, w0
        cset    w0, gt
        ret

It seems to me as though using tst should be faster (unless Aarch64 processors
are extremely weird).

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [Bug target/105773] [Aarch64] Failure to optimize and+cmp to tst
  2022-05-30 13:29 [Bug target/105773] New: [Aarch64] Failure to optimize and+cmp to tst gabravier at gmail dot com
@ 2022-06-08 12:37 ` rearnsha at gcc dot gnu.org
  2022-06-08 12:41 ` rearnsha at gcc dot gnu.org
                   ` (3 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: rearnsha at gcc dot gnu.org @ 2022-06-08 12:37 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105773

Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2022-06-08
             Status|UNCONFIRMED                 |NEW
     Ever confirmed|0                           |1

--- Comment #1 from Richard Earnshaw <rearnsha at gcc dot gnu.org> ---
Confirmed. The tricky thing here is the inequality following the logical AND
operation.
The GT comparison is defined as (Z=0 && N==V), and the logical AND will clear V
and set Z & N appropriately.

It's important to note that this optimization is not valid in AArch32, because
the V flag is not modified by the TST instruction, leaving the flag bit
essentially undefined.

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [Bug target/105773] [Aarch64] Failure to optimize and+cmp to tst
  2022-05-30 13:29 [Bug target/105773] New: [Aarch64] Failure to optimize and+cmp to tst gabravier at gmail dot com
  2022-06-08 12:37 ` [Bug target/105773] " rearnsha at gcc dot gnu.org
@ 2022-06-08 12:41 ` rearnsha at gcc dot gnu.org
  2022-06-22 21:34 ` pinskia at gcc dot gnu.org
                   ` (2 subsequent siblings)
  4 siblings, 0 replies; 6+ messages in thread
From: rearnsha at gcc dot gnu.org @ 2022-06-08 12:41 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105773

Richard Earnshaw <rearnsha at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P3                          |P4
           Severity|normal                      |minor

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [Bug target/105773] [Aarch64] Failure to optimize and+cmp to tst
  2022-05-30 13:29 [Bug target/105773] New: [Aarch64] Failure to optimize and+cmp to tst gabravier at gmail dot com
  2022-06-08 12:37 ` [Bug target/105773] " rearnsha at gcc dot gnu.org
  2022-06-08 12:41 ` rearnsha at gcc dot gnu.org
@ 2022-06-22 21:34 ` pinskia at gcc dot gnu.org
  2022-10-13 13:56 ` cvs-commit at gcc dot gnu.org
  2022-10-13 13:58 ` wilco at gcc dot gnu.org
  4 siblings, 0 replies; 6+ messages in thread
From: pinskia at gcc dot gnu.org @ 2022-06-22 21:34 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105773

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Severity|minor                       |enhancement

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [Bug target/105773] [Aarch64] Failure to optimize and+cmp to tst
  2022-05-30 13:29 [Bug target/105773] New: [Aarch64] Failure to optimize and+cmp to tst gabravier at gmail dot com
                   ` (2 preceding siblings ...)
  2022-06-22 21:34 ` pinskia at gcc dot gnu.org
@ 2022-10-13 13:56 ` cvs-commit at gcc dot gnu.org
  2022-10-13 13:58 ` wilco at gcc dot gnu.org
  4 siblings, 0 replies; 6+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2022-10-13 13:56 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105773

--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Wilco Dijkstra <wilco@gcc.gnu.org>:

https://gcc.gnu.org/g:1cccf644ff92ac1145abdbf255d1862dd787875b

commit r13-3274-g1cccf644ff92ac1145abdbf255d1862dd787875b
Author: Wilco Dijkstra <wdijkstr@arm.com>
Date:   Thu Oct 13 14:41:55 2022 +0100

    [AArch64] Improve bit tests [PR105773]

    Since AArch64 sets all flags on logical operations, comparisons with zero
    can be combined into an AND even if the condition is LE or GT. Add a new
    CC_NZV mode used by ANDS/BICS/TST instructions.

    gcc/
            PR target/105773
            * config/aarch64/aarch64.cc (aarch64_select_cc_mode): Allow
            GT/LE for merging compare with zero into AND.
            (aarch64_get_condition_code_1): Add CC_NZVmode support.
            * config/aarch64/aarch64-modes.def: Add CC_NZV.
            * config/aarch64/aarch64.md: Use CC_NZV in cmp+and patterns.

    gcc/testsuite/
            PR target/105773
            * gcc.target/aarch64/ands_2.c: Test for ANDS.
            * gcc.target/aarch64/bics_2.c: Test for BICS.
            * gcc.target/aarch64/tst_2.c: Test for TST.
            * gcc.target/aarch64/tst_imm_split_1.c: Fix test.

^ permalink raw reply	[flat|nested] 6+ messages in thread

* [Bug target/105773] [Aarch64] Failure to optimize and+cmp to tst
  2022-05-30 13:29 [Bug target/105773] New: [Aarch64] Failure to optimize and+cmp to tst gabravier at gmail dot com
                   ` (3 preceding siblings ...)
  2022-10-13 13:56 ` cvs-commit at gcc dot gnu.org
@ 2022-10-13 13:58 ` wilco at gcc dot gnu.org
  4 siblings, 0 replies; 6+ messages in thread
From: wilco at gcc dot gnu.org @ 2022-10-13 13:58 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=105773

Wilco <wilco at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|NEW                         |RESOLVED

--- Comment #3 from Wilco <wilco at gcc dot gnu.org> ---
Fixed.

^ permalink raw reply	[flat|nested] 6+ messages in thread

end of thread, other threads:[~2022-10-13 13:58 UTC | newest]

Thread overview: 6+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-05-30 13:29 [Bug target/105773] New: [Aarch64] Failure to optimize and+cmp to tst gabravier at gmail dot com
2022-06-08 12:37 ` [Bug target/105773] " rearnsha at gcc dot gnu.org
2022-06-08 12:41 ` rearnsha at gcc dot gnu.org
2022-06-22 21:34 ` pinskia at gcc dot gnu.org
2022-10-13 13:56 ` cvs-commit at gcc dot gnu.org
2022-10-13 13:58 ` wilco at gcc dot gnu.org

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