[Bug tree-optimization/106240] New: [13 Regression] Recent change causes missed vectorization opportunity on mips

[Bug tree-optimization/106240] New: [13 Regression] Recent change causes missed vectorization opportunity on mips

[law at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106240

            Bug ID: 106240
           Summary: [13 Regression] Recent change causes missed
                    vectorization opportunity on mips
           Product: gcc
           Version: 13.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: tree-optimization
          Assignee: unassigned at gcc dot gnu.org
          Reporter: law at gcc dot gnu.org
  Target Milestone: ---

This can be see on the mipsisa32r2-linux-gnu target with a cross compiler.

Starting a couple months ago these tests started failing on
mipsisa32r2-linux-gnu:

Tests that now fail, but worked before (24 tests):

gcc.target/mips/mips-ps-5.c   -O1   scan-assembler \tadd\\.ps\t
gcc.target/mips/mips-ps-5.c   -O1   scan-assembler \tc\\.eq\\.ps\t
gcc.target/mips/mips-ps-5.c   -O1   scan-assembler \tmov[tf]\\.ps\t
gcc.target/mips/mips-ps-5.c   -O2   scan-assembler \tadd\\.ps\t
gcc.target/mips/mips-ps-5.c   -O2   scan-assembler \tc\\.eq\\.ps\t
gcc.target/mips/mips-ps-5.c   -O2   scan-assembler \tmov[tf]\\.ps\t
gcc.target/mips/mips-ps-5.c   -O3 -fomit-frame-pointer -funroll-loops
-fpeel-loops -ftracer -finline-functions   scan-assembler \tadd\\.ps\t
gcc.target/mips/mips-ps-5.c   -O3 -fomit-frame-pointer -funroll-loops
-fpeel-loops -ftracer -finline-functions   scan-assembler \tc\\.eq\\.ps\t
gcc.target/mips/mips-ps-5.c   -O3 -fomit-frame-pointer -funroll-loops
-fpeel-loops -ftracer -finline-functions   scan-assembler \tmov[tf]\\.ps\t
gcc.target/mips/mips-ps-5.c   -O3 -g   scan-assembler \tadd\\.ps\t
gcc.target/mips/mips-ps-5.c   -O3 -g   scan-assembler \tc\\.eq\\.ps\t
gcc.target/mips/mips-ps-5.c   -O3 -g   scan-assembler \tmov[tf]\\.ps\t
gcc.target/mips/mips-ps-7.c   -O1   scan-assembler \tadd\\.ps\t
gcc.target/mips/mips-ps-7.c   -O1   scan-assembler \tc\\.eq\\.ps\t
gcc.target/mips/mips-ps-7.c   -O1   scan-assembler \tmov[tf]\\.ps\t
gcc.target/mips/mips-ps-7.c   -O2   scan-assembler \tadd\\.ps\t
gcc.target/mips/mips-ps-7.c   -O2   scan-assembler \tc\\.eq\\.ps\t
gcc.target/mips/mips-ps-7.c   -O2   scan-assembler \tmov[tf]\\.ps\t
gcc.target/mips/mips-ps-7.c   -O3 -fomit-frame-pointer -funroll-loops
-fpeel-loops -ftracer -finline-functions   scan-assembler \tadd\\.ps\t
gcc.target/mips/mips-ps-7.c   -O3 -fomit-frame-pointer -funroll-loops
-fpeel-loops -ftracer -finline-functions   scan-assembler \tc\\.eq\\.ps\t
gcc.target/mips/mips-ps-7.c   -O3 -fomit-frame-pointer -funroll-loops
-fpeel-loops -ftracer -finline-functions   scan-assembler \tmov[tf]\\.ps\t
gcc.target/mips/mips-ps-7.c   -O3 -g   scan-assembler \tadd\\.ps\t
gcc.target/mips/mips-ps-7.c   -O3 -g   scan-assembler \tc\\.eq\\.ps\t
gcc.target/mips/mips-ps-7.c   -O3 -g   scan-assembler \tmov[tf]\\.ps\t

This change is the trigger:
commit 68e0063397ba820e71adc220b2da0581dce29ffa
Author: Richard Biener <rguenther@suse.de>
Date:   Mon Apr 11 13:36:53 2022 +0200

    Force the selection operand of a GIMPLE COND_EXPR to be a register

    This goes away with the selection operand allowed to be a GENERIC
    tcc_comparison tree.  It keeps those for vectorizer pattern recog,
    those are short lived and removing this instance is a bigger task.

    The patch doesn't yet remove dead code and functionality, that's
    left for a followup.  Instead the patch makes sure to produce
    valid GIMPLE IL and continue to optimize COND_EXPRs where the
    previous IL allowed and the new IL showed regressions in the testsuite.

[ ... ]


Basically before this change we were able to vectorize the loop and after that
change we no longer vectorize the loop.

Testcase:

/* { dg-do compile } */
/* { dg-options "-mpaired-single -mgp64 -ftree-vectorize forbid_cpu=octeon.*" }
*/
/* { dg-skip-if "requires vectorization" { *-*-* } { "-O0" "-Os" } { "" } } */

extern float a[] __attribute__ ((aligned (8)));
extern float b[] __attribute__ ((aligned (8)));
extern float c[] __attribute__ ((aligned (8)));

NOMIPS16 void
foo (void)
{
  int i;
  for (i = 0; i < 16; i++)
    a[i] = b[i] == c[i] + 1 ? b[i] : c[i];
}

/* { dg-final { scan-assembler "\tadd\\.ps\t" } } */
/* { dg-final { scan-assembler "\tc\\.eq\\.ps\t" } } */
/* { dg-final { scan-assembler "\tmov\[tf\]\\.ps\t" } } */


Compilation line:

/home/jlaw/test/obj/mipsisa32r2-linux-gnu/obj/gcc/gcc/xgcc
-B/home/jlaw/test/obj/mipsisa32r2-linux-gnu/obj/gcc/gcc/
/home/jlaw/test/gcc/gcc/testsuite/gcc.target/mips/mips-ps-5.c
-fdiagnostics-plain-output -O2 -DNOMIPS16="__attribute__((nomips16))"
-DNOMICROMIPS="__attribute__((nomicromips))"
-DNOCOMPRESSION="__attribute__((nocompression))" -mabi=o64 -mips64r2
-mhard-float -mdouble-float -mfp64 -mgp64 -mlong32 -mpaired-single -modd-spreg
-ftree-vectorize -fno-ident -S -o mips-ps-5.s -fdump-tree-all-details


As one would expect this patch changes the form of the COND_EXPRs and
ultimately we're unable to vectorize as a result.  I haven't dug any deeper
than that.

[Bug tree-optimization/106240] [13 Regression] Recent change causes missed vectorization opportunity on mips

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106240

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|---                         |13.0
           Keywords|                            |missed-optimization
             Target|                            |mipsisa32r2-linux-gnu

[Bug target/106240] [13 Regression] missed vectorization opportunity (cond move) on mips since r13-707-g68e0063397ba82

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106240

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2022-07-11
     Ever confirmed|0                           |1
          Component|tree-optimization           |target
                 CC|                            |mfortune at gmail dot com
             Status|UNCONFIRMED                 |NEW

--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
So we're going

t.c:9:17: note:   using normal nonmask vectors for _11 = _1 == _3;
t.c:9:17: note:   can narrow to unsigned:5 without loss of precision: i_9 =
i_12 + 1;
t.c:9:17: note:   vect_recog_bool_pattern: detected: iftmp.0_5 = _11 ? _1 : _2;
t.c:9:17: note:   bool pattern recognized: patt_10 = _11 != 0 ? _1 : _2;
..
t.c:9:17: note:   ==> examining statement: _11 = _1 == _3;
t.c:10:36: missed:   not vectorized: relevant stmt not supported: _11 = _1 ==
_3;
t.c:9:17: missed:  bad operation or unsupported loop bound.

> grep 'vcond\|vec_cmp' *.md
mips-msa.md:;; Same as MSA.  Used by vcond to iterate two modes.
mips-msa.md:(define_expand "vcondu<MSA:mode><IMSA:mode>"
mips-msa.md:(define_expand "vcond<MSA:mode><MSA_2:mode>"
mips-msa.md:(define_expand "vec_cmp<MSA:mode><mode_i>"
mips-msa.md:  mips_expand_vec_cmp_expr (operands);
mips-msa.md:(define_expand "vec_cmpu<IMSA:mode><mode_i>"
mips-msa.md:  mips_expand_vec_cmp_expr (operands);
mips-ps-3d.md:(define_expand "vcondv2sfv2sf"
mips-ps-3d.md:  mips_expand_vcondv2sf (operands[0], operands[1], operands[2],
mips-ps-3d.md:  mips_expand_vcondv2sf (operands[0], operands[1], operands[2],
mips-ps-3d.md:  mips_expand_vcondv2sf (operands[0], operands[1], operands[2],

so we have limited support for vec_cmp and no support for vcond_mask.

Generally I'd blame it on the target to not provide optabs that map to the
actual ISA.  Before the rev. we produced

$L2:
        ldc1    $f1,0($4)
        ldc1    $f0,0($2)
        addiu   $3,$3,8
        add.ps  $f2,$f1,$f3
        addiu   $2,$2,8
        addiu   $4,$4,8
        c.eq.ps $fcc0,$f0,$f2
        movf.ps $f0,$f1,$fcc0
        .set    noreorder
        .set    nomacro
        bne     $2,$5,$L2

I think

        c.eq.ps $fcc0,$f0,$f2
        movf.ps $f0,$f1,$fcc0

corresponds to

  _34 = vect__1.8_28 == vect__3.12_33;
  vect_iftmp.13_35 = VEC_COND_EXPR <_34, vect__1.8_28, vect__2.11_31>;

and ISEL makes

  vect_iftmp.13_35 = .VCOND (vect__1.8_28, vect__3.12_33, vect__1.8_28,
vect__2.11_31, 113);

so while the target supports vcond the actual ISA has vec_cmp plus
vcond_mask instead which would map to the new GIMPLE IL constraints
nicely.

But indeed for targets where the ISA can do VCOND we mess this up
during pattern recognition, making "fixup" in vectorizable_*
difficult.  It would possibly be best to emulate ISEL here and
pattern-recog iftmp.0_5 = _1 == _3 ? _1 : _2; instead (yeah,
embedded GENERIC cond - patterns still have those - they probably
should use "unchecked" .VCOND but with scalar ops ...).

I'm not sure how likely is a MIPS maintainer modernizing the vectorizer
patterns here?  What's the "modern" parts?  mips-msa.md or mips-ps-3d.md?

[Bug target/106240] [13 Regression] missed vectorization opportunity (cond move) on mips since r13-707-g68e0063397ba82

[law at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106240

--- Comment #2 from Jeffrey A. Law <law at gcc dot gnu.org> ---
I don't mind deferring this -- I *think* the .ps variants are deprecated in
newer versions of the ISA.  So we could easily move this to P4 and let the MIPS
folks take care of it if/when they feel the need.

[Bug target/106240] [13 Regression] missed vectorization opportunity (cond move) on mips since r13-707-g68e0063397ba82

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106240

--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Jeffrey A. Law from comment #2)
> I don't mind deferring this -- I *think* the .ps variants are deprecated in
> newer versions of the ISA.  So we could easily move this to P4 and let the
> MIPS folks take care of it if/when they feel the need.

I don't even know if anyone cares about the MIPS port any more, especially
either MSA or PS. I don't even know of implementations that have either MSA or
PS in it. That could be used for testing either.

[Bug target/106240] [13 Regression] missed vectorization opportunity (cond move) on mips since r13-707-g68e0063397ba82

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106240

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |ASSIGNED
           Assignee|unassigned at gcc dot gnu.org      |rguenth at gcc dot gnu.org

--- Comment #4 from Richard Biener <rguenth at gcc dot gnu.org> ---
Note I expect the issue to eventually show up elsewhere, too, so I do plan to
look into this eventually.  Just as with other targets now that we have vec_cmp
and vcond_mask targets should move to those when that matches how their ISA
behaves (which I think is all of them).

[Bug target/106240] [13 Regression] missed vectorization opportunity (cond move) on mips since r13-707-g68e0063397ba82

[law at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106240

Jeffrey A. Law <law at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Priority|P3                          |P2

[Bug target/106240] [13/14 Regression] missed vectorization opportunity (cond move) on mips since r13-707-g68e0063397ba82

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106240

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|13.0                        |13.2

--- Comment #5 from Richard Biener <rguenth at gcc dot gnu.org> ---
GCC 13.1 is being released, retargeting bugs to GCC 13.2.

[Bug target/106240] [13/14 Regression] missed vectorization opportunity (cond move) on mips since r13-707-g68e0063397ba82

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106240

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|13.2                        |13.3

--- Comment #6 from Richard Biener <rguenth at gcc dot gnu.org> ---
GCC 13.2 is being released, retargeting bugs to GCC 13.3.

[Bug target/106240] [13/14/15 Regression] missed vectorization opportunity (cond move) on mips since r13-707-g68e0063397ba82

[jakub at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106240

Jakub Jelinek <jakub at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Target Milestone|13.3                        |13.4

--- Comment #7 from Jakub Jelinek <jakub at gcc dot gnu.org> ---
GCC 13.3 is being released, retargeting bugs to GCC 13.4.