[Bug target/106462] New: LRA on mips64el: unable to reload (subreg:SI (reg:DI)) constrained by "f"

[Bug target/106462] New: LRA on mips64el: unable to reload (subreg:SI (reg:DI)) constrained by "f"

[yangyujie at loongson dot cn]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106462

            Bug ID: 106462
           Summary: LRA on mips64el: unable to reload (subreg:SI (reg:DI))
                    constrained by "f"
           Product: gcc
           Version: 13.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: yangyujie at loongson dot cn
  Target Milestone: ---

Created attachment 53368
  --> https://gcc.gnu.org/bugzilla/attachment.cgi?id=53368&action=edit
-freport-bug dump

Hi,
compiling the following code with gcc 13.0.0 20220728
(mips64el-linux-gnuabi64):

extern void bar (float x, short y);

void foo (int argc)
{
    short c = argc * 2;
    float a = (float)(short)c, b = 9.5;

    bar (b/a, c);
}

failed with:

mips64el-linux-gnuabi64-gcc fail.c -O1 -mabi=64 -msingle-float -S -o /dev/null
fail.c: In function 'foo':
fail.c:9:1: error: unable to find a register to spill
    9 | }
      | ^
fail.c:9:1: error: this is the insn:
(insn 12 27 15 2 (set (reg:SF 202 [ a ])
        (float:SF (subreg/s/u:SI (reg/v:DI 209 [orig:197 c ] [197]) 0)))
"fail.c":6:11 270 {floatsisf2}
     (expr_list:REG_DEAD (reg/v:DI 209 [orig:197 c ] [197])
        (nil)))
during RTL pass: reload
fail.c:9:1: internal compiler error: in lra_split_hard_reg_for, at
lra-assigns.cc:1871
Please submit a full bug report, with preprocessed source.
See <https://gcc.gnu.org/bugs/> for instructions.
Preprocessed source stored into /tmp/ccZs64gB.out file, please attach this to
your bugreport.


This bug is also reproducible on gcc-8.3.0, so it seems to be around for quite
a while.

[Bug target/106462] LRA on mips64el: unable to reload (subreg:SI (reg:DI)) constrained by "f"

[yangyujie at loongson dot cn]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106462

--- Comment #1 from Yang Yujie <yangyujie at loongson dot cn> ---
The relevant insn template is:

(define_insn "floatsisf2"
  [(set (match_operand:SF 0 "register_operand" "=f")
        (float:SF (match_operand:SI 1 "register_operand" "f")))]
  "TARGET_HARD_FLOAT"
  "cvt.s.w\t%0,%1"
  [(set_attr "type"     "fcvt")
   (set_attr "mode"     "SF")
   (set_attr "cnv_mode" "I2S")])

It seems that

  (match_operand:SI 1 "register_operand "f")

actually matched (during pass_expand):

  (subreg/s/u:SI (reg/v:DI 209 [orig:197 c ] [197]))

and curr_insn_transform decided to spill the (reg/v:DI 209) pseudo-register
into FP_REGS, which fails because FP registers are only 32-bit-wide.

My question is: should the reload pass handle this by first assigning (reg:DI)
into a (64-bit) general-purpose hard register, and then emit a move instruction
to fill the floating-point-register operand?

[Bug target/106462] LRA on mips64el: unable to reload (subreg:SI (reg:DI)) constrained by "f"

[vmakarov at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106462

--- Comment #2 from Vladimir Makarov <vmakarov at gcc dot gnu.org> ---
I built mips64el-linux-gnuabi64 but using -mabi=64 -msingle-float for it gives

cc1: error: unsupported combination: -mgp64 -mno-odd-spreg

Did I miss something?

[Bug target/106462] LRA on mips64el: unable to reload (subreg:SI (reg:DI)) constrained by "f"

[yangyujie at loongson dot cn]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106462

--- Comment #3 from Yang Yujie <yangyujie at loongson dot cn> ---
(In reply to Vladimir Makarov from comment #2)
> I built mips64el-linux-gnuabi64 but using -mabi=64 -msingle-float for it
> gives
> 
> cc1: error: unsupported combination: -mgp64 -mno-odd-spreg
> 
> Did I miss something?

Hi Vladimir, thanks for your reply!

It seems that you need to specify -march=mips64r2 (or configure gcc with
--with-arch=mips64r2). This turns on -mno-spreg by default.

[Bug target/106462] LRA on mips64el: unable to reload (subreg:SI (reg:DI)) constrained by "f"

[yangyujie at loongson dot cn]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106462

--- Comment #4 from Yang Yujie <yangyujie at loongson dot cn> ---
(In reply to Yang Yujie from comment #3)
> (In reply to Vladimir Makarov from comment #2)
> > I built mips64el-linux-gnuabi64 but using -mabi=64 -msingle-float for it
> > gives
> > 
> > cc1: error: unsupported combination: -mgp64 -mno-odd-spreg
> > 
> > Did I miss something?
> 
> Hi Vladimir, thanks for your reply!
> 
> It seems that you need to specify -march=mips64r2 (or configure gcc with
> --with-arch=mips64r2). This turns on -mno-spreg by default.

* Should be -modd-spreg, sorry for the typo.

[Bug target/106462] LRA on mips64el: unable to reload (subreg:SI (reg:DI)) constrained by "f"

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106462

--- Comment #5 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Vladimir Makarov <vmakarov@gcc.gnu.org>:

https://gcc.gnu.org/g:70596a0fb2a2ec072e1e97e37616e05041dfa4e5

commit r13-4466-g70596a0fb2a2ec072e1e97e37616e05041dfa4e5
Author: Vladimir N. Makarov <vmakarov@redhat.com>
Date:   Fri Dec 2 08:18:04 2022 -0500

    LRA: Check hard reg availability of pseudo and its subreg for pseudo reload

    Do not reload subreg pseudo if there are hard regs for subreg mode
    but there are no hard regs for pseudo mode.

            PR target/106462

    gcc/ChangeLog:

            * lra-constraints.cc (curr_insn_transform): Check available hard
            regs for pseudo and its subreg to decide what to reload.

    gcc/testsuite/ChangeLog:

            * gcc.target/mips/pr106462.c: New test.