[Bug target/106550] New: [rs6000] sub-optimal constant generation

[Bug target/106550] New: [rs6000] sub-optimal constant generation

[guojiufu at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106550

            Bug ID: 106550
           Summary: [rs6000] sub-optimal constant generation
           Product: gcc
           Version: 13.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: guojiufu at gcc dot gnu.org
  Target Milestone: ---

There is 'pli' which supports a 34bits immediate, so to generate a 64bits
constant we just need 3 instructions at most.

void
foo (unsigned long long *a)
{
  *a = 0x020805006106003;
}

On the trunk, below asm is generated:

        .file   "test.c"
        .machine power10
        .abiversion 2
        .section        ".text"
        .align 2
        .p2align 4,,15
        .globl foo
        .type   foo, @function
foo:
.LFB0:
        .cfi_startproc
        .localentry     foo,1
        lis 9,0x20
        ori 9,9,0x8050
        sldi 9,9,32
        oris 9,9,0x610
        ori 9,9,0x6003
        std 9,0(3)
        blr
        .long 0
        .byte 0,0,0,0,0,0,0,0
        .cfi_endproc
.LFE0:
        .size   foo,.-foo
        .ident  "GCC: (GNU) 13.0.0 20220729 (experimental)"
        .section        .note.GNU-stack,"",@progbits


The compiling command: gcc -O2 -std=c99 test.c -S -mcpu=power10

[Bug target/106550] [rs6000] sub-optimal 64bit constant generation for P10

[linkw at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106550

Kewen Lin <linkw at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2022-08-08
                 CC|                            |linkw at gcc dot gnu.org
            Summary|[rs6000] sub-optimal        |[rs6000] sub-optimal 64bit
                   |constant generation         |constant generation for P10
     Ever confirmed|0                           |1
             Status|UNCONFIRMED                 |NEW

--- Comment #1 from Kewen Lin <linkw at gcc dot gnu.org> ---
Confirmed.

Clang supports it as:

https://godbolt.org/z/Kxj584sfd

[Bug target/106550] [rs6000] sub-optimal 64bit constant generation for P10

[guojiufu at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106550

--- Comment #2 from Jiu Fu Guo <guojiufu at gcc dot gnu.org> ---
(In reply to Kewen Lin from comment #1)
> Confirmed.
> 
> Clang supports it as:
> 
> https://godbolt.org/z/Kxj584sfd

Thanks Kewen!

Or another example code could be:

pli 9,101736451 (0x6106003)
sldi 9,9,32
paddi 9,9, 2130000 (0x0208050)

[Bug target/106550] [rs6000] sub-optimal 64bit constant generation for P10

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106550

--- Comment #3 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Jiu Fu Guo <guojiufu@gcc.gnu.org>:

https://gcc.gnu.org/g:7a3dfc23a910a47b6c1113b3a28a22858d0b9e7a

commit r13-2679-g7a3dfc23a910a47b6c1113b3a28a22858d0b9e7a
Author: Jiufu Guo <guojiufu@linux.ibm.com>
Date:   Mon Sep 5 13:36:10 2022 +0800

    rs6000: Using pli(paddi) and rotate to build 64bit constants

    Hi,

    Test cases are updated/added, and code is refined as the comments in the
    review for previous version:
    https://gcc.gnu.org/pipermail/gcc-patches/2022-September/600768.html

    As mentioned in PR106550, since pli could support 34bits immediate, we
could
    use less instructions(3insn would be ok) to build 64bits constant with pli.

    For example, for constant 0x020805006106003, we could generate it with:
    asm code1:
    pli 9,101736451 (0x6106003)
    sldi 9,9,32
    paddi 9,9, 2130000 (0x0208050)

    or asm code2:
    pli 10, 2130000
    pli 9, 101736451
    rldimi 9, 10, 32, 0

    The asm code2 would be better.
    This patch generates the asm code2 in split1 pass, this patch also supports
    to generate asm code1 when splitter is only after RA.

    This patch pass boostrap and regtest on ppc64. P10 testing is running.
    Thanks for any comments!

    BR,
    Jeff(Jiufu)

            PR target/106550

    gcc/ChangeLog:

            * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Use pli.

    gcc/testsuite/ChangeLog:

            * gcc.target/powerpc/pr106550.c: New test.
            * gcc.target/powerpc/pr106550_1.c: New test.

[Bug target/106550] [rs6000] sub-optimal 64bit constant generation for P10

[guojiufu at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=106550

Jiu Fu Guo <guojiufu at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|NEW                         |RESOLVED
         Resolution|---                         |FIXED

--- Comment #4 from Jiu Fu Guo <guojiufu at gcc dot gnu.org> ---
Committed