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* [Bug target/108958] New: Powerpcle could generate mtvsrdd for zero extend DI to TI mode, when the TImode is in a vector register
@ 2023-02-27 22:28 meissner at gcc dot gnu.org
  0 siblings, 0 replies; only message in thread
From: meissner at gcc dot gnu.org @ 2023-02-27 22:28 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=108958

            Bug ID: 108958
           Summary: Powerpcle could generate mtvsrdd for zero extend DI to
                    TI mode, when the TImode is in a vector register
           Product: gcc
           Version: 13.0
            Status: UNCONFIRMED
          Severity: enhancement
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: meissner at gcc dot gnu.org
  Target Milestone: ---

If you have a DImode variable (i.e. long) in a GPR, and you want to zero extend
it to TImode (i.e. `__int128', and the result is needed in a vector register,
you could just do a single `mtvsrdd' instruction, instead of separate zero a
GPR register, and then `mtvsrd' and `mtvsrdd' instructions.

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2023-02-27 22:28 [Bug target/108958] New: Powerpcle could generate mtvsrdd for zero extend DI to TI mode, when the TImode is in a vector register meissner at gcc dot gnu.org

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