[Bug c/110188] New: gcc for RISC-V stack aligned error

[Bug c/110188] New: gcc for RISC-V stack aligned error

[jzhgonha at 163 dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110188

            Bug ID: 110188
           Summary: gcc for RISC-V stack aligned error
           Product: gcc
           Version: 10.2.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
          Assignee: unassigned at gcc dot gnu.org
          Reporter: jzhgonha at 163 dot com
  Target Milestone: ---

I use gcc(10.2.0) which is for RISC-V to compile a C language function,
according to disassembly language, stack just consumed 3word(12bytes), RISC-V
specification stipulate stack must aligned 16byte, but actual "addi sp,sp,-32"
show that stack occupy 32bytes, why not 16bytes?
I have tried different optimization levels, but all occupy 32bytes.
I also have tried another compiler which is called zcc, that occupy 16bytes.

C code main.c is following
int myadd(int a1, int a2, int a3, int a4, int a5, int a6, int a7, int a8, int
a9);
int main(void)
{
    return myadd(1,2,3,4,5,6,7,8,9);
}

command line is following
riscv64-unknown-elf-gcc -c main.c -o main.o -march=rv32imac
-mpreferred-stack-boundary=4
riscv64-unknown-elf-objdump -d main.o > main.asm

diassembly main.asm is following
00000000 <main>:
   0:   1101                    addi    sp,sp,-32
   2:   ce06                    sw      ra,28(sp)
   4:   cc22                    sw      s0,24(sp)
   6:   1000                    addi    s0,sp,32
   8:   47a5                    li      a5,9
   a:   c03e                    sw      a5,0(sp)
   c:   48a1                    li      a7,8
   e:   481d                    li      a6,7
  10:   4799                    li      a5,6
  12:   4715                    li      a4,5
  14:   4691                    li      a3,4
  16:   460d                    li      a2,3
  18:   4589                    li      a1,2
  1a:   4505                    li      a0,1
  1c:   00000097                auipc   ra,0x0
  20:   000080e7                jalr    ra # 1c <main+0x1c>
  24:   87aa                    mv      a5,a0
  26:   853e                    mv      a0,a5
  28:   40f2                    lw      ra,28(sp)
  2a:   4462                    lw      s0,24(sp)
  2c:   6105                    addi    sp,sp,32
  2e:   8082                    ret

[Bug target/110188] gcc for RISC-V stack aligned error

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110188

--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
This is at -O0. Maybe -O1 or -O2 will use the reduced stack size.

[Bug target/110188] gcc for RISC-V stack aligned error

[18761437418 at 163 dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110188

--- Comment #2 from 18761437418 at 163 dot com ---
thank you very much,

I have tried different optimization levels, but all occupy 32bytes.
O0, O1, O2, O3, Os all occupy 32bytes.
comand: riscv64-unknown-elf-gcc -c main.c -o main.o -march=rv32imac
-mpreferred-stack-boundary=4 -O3

O3 assembly code is following, it only use 2 words as stack, but still occupy
32bytes.
00000000 <main>:
   0:    1101                    addi    sp,sp,-32
   2:    47a5                    li    a5,9
   4:    c03e                    sw    a5,0(sp)
   6:    48a1                    li    a7,8
   8:    481d                    li    a6,7
   a:    4799                    li    a5,6
   c:    4715                    li    a4,5
   e:    4691                    li    a3,4
  10:    460d                    li    a2,3
  12:    4589                    li    a1,2
  14:    4505                    li    a0,1
  16:    ce06                    sw    ra,28(sp)
  18:    00000097              auipc    ra,0x0
  1c:    000080e7              jalr    ra # 18 <main+0x18>
  20:    40f2                    lw    ra,28(sp)
  22:    6105                    addi    sp,sp,32
  24:    8082                    ret


















At 2023-06-09 15:56:48, "pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
wrote:
>https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110188
>
>--- Comment #1 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
>This is at -O0. Maybe -O1 or -O2 will use the reduced stack size.
>
>-- 
>You are receiving this mail because:
>You reported the bug.

[Bug target/110188] gcc for RISC-V stack aligned error

[schwab@linux-m68k.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110188

--- Comment #3 from Andreas Schwab <schwab@linux-m68k.org> ---
According to riscv.h there is a difference between ABI and calling conventions:

/* The smallest supported stack boundary the calling convention supports.  */
#define STACK_BOUNDARY \
  (riscv_abi == ABI_ILP32E ? BITS_PER_WORD : 2 * BITS_PER_WORD)

/* The ABI stack alignment.  */
#define ABI_STACK_BOUNDARY (riscv_abi == ABI_ILP32E ? BITS_PER_WORD : 128)

[Bug target/110188] gcc for RISC-V stack aligned error

[18761437418 at 163 dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110188

--- Comment #4 from 18761437418 at 163 dot com ---
thank you very much.
according to the define, STACK_BOUNDARY is 8 bytes, ABI_STACK_BOUNDARY is 128,
just 16bytes, not 32bytes, but compiler allocate 32bytes to stack.














At 2023-06-09 16:20:16, "schwab@linux-m68k.org" <gcc-bugzilla@gcc.gnu.org>
wrote:
>https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110188
>
>--- Comment #3 from Andreas Schwab <schwab@linux-m68k.org> ---
>According to riscv.h there is a difference between ABI and calling conventions:
>
>/* The smallest supported stack boundary the calling convention supports.  */
>#define STACK_BOUNDARY \
>  (riscv_abi == ABI_ILP32E ? BITS_PER_WORD : 2 * BITS_PER_WORD)
>
>/* The ABI stack alignment.  */
>#define ABI_STACK_BOUNDARY (riscv_abi == ABI_ILP32E ? BITS_PER_WORD : 128)
>
>-- 
>You are receiving this mail because:
>You reported the bug.

[Bug target/110188] gcc for RISC-V stack aligned error

[kito at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110188

Kito Cheng <kito at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
                 CC|                            |kito at gcc dot gnu.org

--- Comment #5 from Kito Cheng <kito at gcc dot gnu.org> ---
Each stack area will align to 16 byte, that could be optimized in theory, but
will complicate the frame layout implementation.

----sp - 0
a9 / outgoing stack arguments area
----sp - 4
<unused> / outgoing stack arguments area
----sp - 8
<unused> / outgoing stack arguments area
----sp - 12
<unused> / outgoing stack arguments area
----sp - 16
<unused> / GPR save area
----sp - 20
<unused> / GPR save area
----sp - 24
<unused> / GPR save area
----sp - 28
ra       / GPR save area
----sp - 32



Complete layout has document in riscv.cc:

        +-------------------------------+
        |                               |
        |  incoming stack arguments     |
        |                               |
        +-------------------------------+ <-- incoming stack pointer
        |                               |
        |  callee-allocated save area   |
        |  for arguments that are       |
        |  split between registers and  |
        |  the stack                    |
        |                               |
        +-------------------------------+ <-- arg_pointer_rtx
        |                               |
        |  callee-allocated save area   |
        |  for register varargs         |
        |                               |
        +-------------------------------+ <-- hard_frame_pointer_rtx;
        |                               |     stack_pointer_rtx + gp_sp_offset
        |  GPR save area                |       + UNITS_PER_WORD
        |                               |
        +-------------------------------+ <-- stack_pointer_rtx + fp_sp_offset
        |                               |       + UNITS_PER_HWVALUE
        |  FPR save area                |
        |                               |
        +-------------------------------+ <-- frame_pointer_rtx (virtual)
        |                               |
        |  local variables              |
        |                               |
      P +-------------------------------+
        |                               |
        |  outgoing stack arguments     |
        |                               |
        +-------------------------------+ <-- stack_pointer_rtx

[Bug target/110188] gcc for RISC-V stack aligned error

[jzhgonha at 163 dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110188

--- Comment #6 from jzhgonha at 163 dot com ---
   thank you very much!

   发自我的小米在 "kito at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>，2023年6月9日
   下午9:51写道：

     https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110188

     Kito Cheng <kito at gcc dot gnu.org[1]> changed:

     What |Removed |Added
    
----------------------------------------------------------------------------
     CC| |kito at gcc dot gnu.org[1]

     --- Comment #5 from Kito Cheng <kito at gcc dot gnu.org[1]> ---
     Each stack area will align to 16 byte, that could be optimized in
     theory, but
     will complicate the frame layout implementation.

     ----sp - 0
     a9 / outgoing stack arguments area
     ----sp - 4
     <unused> / outgoing stack arguments area
     ----sp - 8
     <unused> / outgoing stack arguments area
     ----sp - 12
     <unused> / outgoing stack arguments area
     ----sp - 16
     <unused> / GPR save area
     ----sp - 20
     <unused> / GPR save area
     ----sp - 24
     <unused> / GPR save area
     ----sp - 28
     ra / GPR save area
     ----sp - 32



     Complete layout has document in riscv.cc[2]:

     +-------------------------------+
     | |
     | incoming stack arguments |
     | |
     +-------------------------------+ <-- incoming stack pointer
     | |
     | callee-allocated save area |
     | for arguments that are |
     | split between registers and |
     | the stack |
     | |
     +-------------------------------+ <-- arg_pointer_rtx
     | |
     | callee-allocated save area |
     | for register varargs |
     | |
     +-------------------------------+ <-- hard_frame_pointer_rtx;
     | | stack_pointer_rtx + gp_sp_offset
     | GPR save area | + UNITS_PER_WORD
     | |
     +-------------------------------+ <-- stack_pointer_rtx +
     fp_sp_offset
     | | + UNITS_PER_HWVALUE
     | FPR save area |
     | |
     +-------------------------------+ <-- frame_pointer_rtx (virtual)
     | |
     | local variables |
     | |
     P +-------------------------------+
     | |
     | outgoing stack arguments |
     | |
     +-------------------------------+ <-- stack_pointer_rtx

     --
     You are receiving this mail because:
     You reported the bug.



   1. http://gnu.org
   2. http://riscv.cc