[Bug target/110406] d: Wrong code-gen returning POD structs by value

["pinskia at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=110406

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Keywords|                            |ABI

--- Comment #6 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
(In reply to Andrew Pinski from comment #5)
> (In reply to ibuclaw from comment #3)
> > (In reply to Andrew Pinski from comment #2)
> > > >structs have been set the wrong mode
> > > 
> > > No, they don't have wrong mode, just the x86_64 backend is broken, see bug
> > > 102027 comment #7 specifically.
> > I think they do.
> > 
> > On 64-bit,  I expect the mode set by compute_record_mode to be TImode. 
> > However what I'm instead seeing is BLKmode. This tells me I might be calling
> > it too early, and some fields yet to have their DECL_SIZE set.
> 
> Unless the struct has the alignment of TImode, it should be BLKmode ...

here is a C testcase to get it returned into vector register (incorrectly due
to the alignment being set to 32):
```
typedef unsigned uint;
struct  cpuid_abcd_t
{
    uint eax;
    uint ebx;
    uint ecx;
    uint edx;
}  __attribute__((aligned(8*4)));

struct cpuid_abcd_t
cpuid_insn(const uint in_eax)
{
        struct cpuid_abcd_t ret={};

        asm (
            "cpuid"
            :
                "=a" ( ret.eax ),
                "=b" ( ret.ebx ),
                "=c" ( ret.ecx ),
                "=d" ( ret.edx )
            :
                "a"  ( in_eax )
            :
    );
        return ret;
}
```

Which itself is GCC 12+ regression too ...