[Bug middle-end/111384] New: missed optimization: GCC adds extra any extend when storing subreg#0 multiple times

[Bug middle-end/111384] New: missed optimization: GCC adds extra any extend when storing subreg#0 multiple times

[lis8215 at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111384

            Bug ID: 111384
           Summary: missed optimization: GCC adds extra any extend when
                    storing subreg#0 multiple times
           Product: gcc
           Version: unknown
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: middle-end
          Assignee: unassigned at gcc dot gnu.org
          Reporter: lis8215 at gmail dot com
  Target Milestone: ---

Simple example:

void store_hi_twice(uint32_t src, uint16_t *dst1, uint16_t *dst2)
{
    *dst1 = src;
    *dst2 = src;
}

shows that GCC can't opt out unnecessary zero extend of the src's low half
aimed to store two or more times. Many targets are affected, although x86-64
don't.

[Bug rtl-optimization/111384] missed optimization: GCC adds extra any extend when storing subreg#0 multiple times

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111384

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
            Version|unknown                     |14.0
          Component|middle-end                  |rtl-optimization

--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
can you name one of many?

[Bug rtl-optimization/111384] missed optimization: GCC adds extra any extend when storing subreg#0 multiple times

[lis8215 at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111384

--- Comment #2 from Siarhei Volkau <lis8215 at gmail dot com> ---
Well what the godbolt says with -O2 -fomit-frame-pointer.

ARM:
        uxth    r0, r0          @ << zero extend
        strh    r0, [r1]
        strh    r0, [r2]
        bx      lr

ARM64:
        and     w0, w0, 65535   @ << zero extend
        strh    w0, [x1]
        strh    w0, [x2]
        ret

MIPS64:
        andi    $4,$4,0xffff    @ << zero extend
        sh      $4,0($5)
        jr      $31
        sh      $4,0($6)

MRISC32:
        shuf    r1, r1, #2888   @ << zero extend
        sth     r1, [r2]
        sth     r1, [r3]
        ret

RISC-V:
        slli    a0,a0,16        @ << zero extend
        srli    a0,a0,16        @ << zero extend
        sh      a0,0(a1)
        sh      a0,0(a2)
        ret

RISC-V (64-bit):
        slli    a0,a0,48        @ << zero extend
        srli    a0,a0,48        @ << zero extend
        sh      a0,0(a1)
        sh      a0,0(a2)
        ret

Xtensa ESP32:
        entry   sp, 32
        extui   a2, a2, 0, 16   @ << zero extend
        s16i    a2, a3, 0
        s16i    a2, a4, 0
        retw.n

Loongarch64:
        bstrpick.w      $r4,$r4,15,0  @ << zero extend
        st.h    $r4,$r5,0
        st.h    $r4,$r6,0
        jr      $r1

MIPS:
        andi    $4,$4,0xffff    @ << zero extend
        sh      $4,0($5)
        jr      $31
        sh      $4,0($6)

SH:
        extu.w  r4,r4           @ << zero extend
        mov.w   r4,@r5
        rts     
        mov.w   r4,@r6


Other available at godbolt (x86-64/Power/Power64/s390) unaffected.

[Bug rtl-optimization/111384] missed optimization: GCC adds extra any extend when storing subreg#0 multiple times

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111384

Andrew Pinski <pinskia at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Severity|normal                      |enhancement

[Bug rtl-optimization/111384] missed optimization: GCC adds extra any extend when storing subreg#0 multiple times

[pinskia at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111384

--- Comment #3 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
I thought I saw/reported a similar bug but I can't find it right now.

[Bug rtl-optimization/111384] missed optimization: GCC adds extra any extend when storing subreg#0 multiple times

[law at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111384

Jeffrey A. Law <law at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
   Last reconfirmed|                            |2023-10-07
     Ever confirmed|0                           |1
             Status|UNCONFIRMED                 |NEW

--- Comment #4 from Jeffrey A. Law <law at gcc dot gnu.org> ---
So this is something we've been pondering over in rv64 land.  Joern has an
extension to DCE which tracks subobjects in an attempt to determine if bits set
by sign/zero extensions are never read.  If they aren't read, then the
extension can be eliminated.

[Bug rtl-optimization/111384] missed optimization: GCC adds extra any extend when storing subreg#0 multiple times

[lis8215 at gmail dot com]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111384

Siarhei Volkau <lis8215 at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |DUPLICATE
             Status|NEW                         |RESOLVED

--- Comment #5 from Siarhei Volkau <lis8215 at gmail dot com> ---
Dup of bug 104387.

*** This bug has been marked as a duplicate of bug 104387 ***