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From: "rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/111720] RISC-V: Ugly codegen in RVV Date: Mon, 06 Nov 2023 10:27:12 +0000 [thread overview] Message-ID: <bug-111720-4-8gGxabKzkn@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-111720-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111720 --- Comment #28 from Richard Biener <rguenth at gcc dot gnu.org> --- I tried to look up the requirements of __riscv_vle8_v_u8m2 in the vector intrinsic specs but besides listing all those intrinsics the spec doesn't contain _any_ documentation? The 2nd arg is named 'vl' which I interpret as vector length so that's so difficult for this intrinsic? Why isn't it just even a plain load? I read the specified 'vl' isn't exact but the intrinsics are still strongly typed, so a VLA typed gimple load should match here? And there should be a way to constrain the implementation somehow since 'arr' has limited size. Is the implementation constrained to use a vector length <= the specified 'vl'?
next prev parent reply other threads:[~2023-11-06 10:27 UTC|newest] Thread overview: 32+ messages / expand[flat|nested] mbox.gz Atom feed top 2023-10-07 22:28 [Bug c/111720] New: " juzhe.zhong at rivai dot ai 2023-10-07 22:34 ` [Bug target/111720] " juzhe.zhong at rivai dot ai 2023-10-07 22:36 ` pinskia at gcc dot gnu.org 2023-10-07 22:38 ` juzhe.zhong at rivai dot ai 2023-10-07 22:41 ` juzhe.zhong at rivai dot ai 2023-10-07 22:43 ` juzhe.zhong at rivai dot ai 2023-10-07 22:44 ` pinskia at gcc dot gnu.org 2023-10-07 22:44 ` pinskia at gcc dot gnu.org 2023-10-07 22:47 ` juzhe.zhong at rivai dot ai 2023-10-07 22:49 ` juzhe.zhong at rivai dot ai 2023-10-07 22:51 ` pinskia at gcc dot gnu.org 2023-10-07 22:55 ` juzhe.zhong at rivai dot ai 2023-10-07 23:09 ` juzhe.zhong at rivai dot ai 2023-10-17 8:26 ` juzhe.zhong at rivai dot ai 2023-10-18 3:29 ` pan2.li at intel dot com 2023-10-19 2:07 ` juzhe.zhong at rivai dot ai 2023-10-19 6:37 ` rguenth at gcc dot gnu.org 2023-10-19 7:45 ` juzhe.zhong at rivai dot ai 2023-10-19 11:16 ` rguenth at gcc dot gnu.org 2023-10-19 11:30 ` juzhe.zhong at rivai dot ai 2023-10-19 11:34 ` rguenther at suse dot de 2023-10-19 11:58 ` juzhe.zhong at rivai dot ai 2023-10-19 12:02 ` rguenther at suse dot de 2023-10-19 12:08 ` juzhe.zhong at rivai dot ai 2023-10-19 12:20 ` rguenther at suse dot de 2023-10-19 12:38 ` juzhe.zhong at rivai dot ai 2023-10-19 13:30 ` rguenther at suse dot de 2023-11-01 7:33 ` pan2.li at intel dot com 2023-11-06 10:27 ` rguenth at gcc dot gnu.org [this message] 2023-11-06 10:44 ` juzhe.zhong at rivai dot ai 2023-11-23 1:20 ` cvs-commit at gcc dot gnu.org 2023-11-23 1:29 ` pan2.li at intel dot com
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