[Bug c/111721] New: RISC-V: Failed to SLP for gather_load in RVV

[Bug c/111721] New: RISC-V: Failed to SLP for gather_load in RVV

[juzhe.zhong at rivai dot ai]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111721

            Bug ID: 111721
           Summary: RISC-V: Failed to SLP for gather_load in RVV
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: c
          Assignee: unassigned at gcc dot gnu.org
          Reporter: juzhe.zhong at rivai dot ai
  Target Milestone: ---

https://godbolt.org/z/d5TPa5e5s

void __attribute__((noipa))
f (int *restrict y, int *restrict x, int *restrict indices, int n)
{
  for (int i = 0; i < n; ++i)
    {
      y[i * 2] = x[indices[i * 2]] + 1;
      y[i * 2 + 1] = x[indices[i * 2 + 1]] + 2;
    }
}

RVV ASM:

f:
        ble     a3,zero,.L5
.L3:
        vsetvli a5,a3,e32,m1,ta,ma
        vlseg2e32.v     v2,(a2)                 ----> VEC_LOAD_LANES
        vsetivli        zero,4,e32,m1,ta,ma
        vsll.vi v4,v2,2
        vsll.vi v1,v3,2
        vsetvli zero,a5,e32,m1,ta,ma
        vluxei32.v      v4,(a1),v4
        vluxei32.v      v1,(a1),v1
        vsetivli        zero,4,e32,m1,ta,ma
        slli    a4,a5,3
        vadd.vi v2,v4,1
        vadd.vi v3,v1,2
        sub     a3,a3,a5
        vsetvli zero,a5,e32,m1,ta,ma
        vsseg2e32.v     v2,(a0)                  ----> VEC_STORE_LANES
        add     a2,a2,a4
        add     a0,a0,a4
        bne     a3,zero,.L3
.L5:
        ret

Comparing to aarch64 which can SLP, RVV geneates expensive
load_lanes/store_lanes.

This is because RVV is using MASK_LEN_GATHER_LOAD that we currently can didn't
support SLP for it.

[Bug target/111721] RISC-V: Failed to SLP for gather_load in RVV

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111721

--- Comment #1 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Pan Li <panli@gcc.gnu.org>:

https://gcc.gnu.org/g:60034ecf25597bd515f8152ea85832ff95a7563b

commit r14-5101-g60034ecf25597bd515f8152ea85832ff95a7563b
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date:   Fri Nov 3 14:41:13 2023 +0800

    VECT: Support SLP for MASK_LEN_GATHER_LOAD with dummy mask

    This patch fixes following FAILs for RVV:
    FAIL: gcc.dg/vect/vect-gather-1.c -flto -ffat-lto-objects  scan-tree-dump
vect "Loop contains only SLP stmts"
    FAIL: gcc.dg/vect/vect-gather-1.c scan-tree-dump vect "Loop contains only
SLP stmts"

    Bootstrap on X86 and regtest passed.

    Ok for trunk ?

            PR tree-optimization/111721

    gcc/ChangeLog:

            * tree-vect-slp.cc (vect_get_and_check_slp_defs): Support SLP for
dummy mask -1.
            * tree-vect-stmts.cc (vectorizable_load): Ditto.

[Bug target/111721] RISC-V: Failed to SLP for gather_load in RVV

[juzhe.zhong at rivai dot ai]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111721

JuzheZhong <juzhe.zhong at rivai dot ai> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|UNCONFIRMED                 |RESOLVED
         Resolution|---                         |FIXED

--- Comment #2 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
Fixed