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* [Bug c/111931] New: RISC-V: Trivial optimization of VSETVL PASS
@ 2023-10-23 9:26 juzhe.zhong at rivai dot ai
2023-11-02 22:47 ` [Bug target/111931] " juzhe.zhong at rivai dot ai
0 siblings, 1 reply; 2+ messages in thread
From: juzhe.zhong at rivai dot ai @ 2023-10-23 9:26 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111931
Bug ID: 111931
Summary: RISC-V: Trivial optimization of VSETVL PASS
Product: gcc
Version: 14.0
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: c
Assignee: unassigned at gcc dot gnu.org
Reporter: juzhe.zhong at rivai dot ai
Target Milestone: ---
#include "riscv_vector.h"
void foo9 (int8_t *base, int8_t* out, size_t vl, size_t m)
{
vint8mf8_t v0;
size_t avl = __riscv_vsetvl_e8mf8 (vl);
for (size_t i = 0; i < m; i++)
{
v0 = __riscv_vle8_v_i8mf8 (base + i, avl);
__riscv_vse8_v_i8mf8 (out + i, v0, avl);
}
}
ASM:
vsetvli a2,a2,e8,mf8,ta,ma
beq a3,zero,.L8
add a3,a0,a3
.L3:
vle8.v v1,0(a0)
addi a0,a0,1
vse8.v v1,0(a1)
addi a1,a1,1
bne a0,a3,.L3
.L8:
ret
The vsetvl should be optimized into "vsetvl zero, a2" instead of "vsetvl a2,a2"
The reason we failed to optimize it is because we set the entry block as
unknown block when computing reaching_def. So preds_has_same_avl_p is false.
As long as there are predecessors block before the user vsetvl, we can optimize
it.
This is an trivial issue. I will fix it if I find the time.
^ permalink raw reply [flat|nested] 2+ messages in thread
* [Bug target/111931] RISC-V: Trivial optimization of VSETVL PASS
2023-10-23 9:26 [Bug c/111931] New: RISC-V: Trivial optimization of VSETVL PASS juzhe.zhong at rivai dot ai
@ 2023-11-02 22:47 ` juzhe.zhong at rivai dot ai
0 siblings, 0 replies; 2+ messages in thread
From: juzhe.zhong at rivai dot ai @ 2023-11-02 22:47 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=111931
JuzheZhong <juzhe.zhong at rivai dot ai> changed:
What |Removed |Added
----------------------------------------------------------------------------
Resolution|--- |FIXED
Status|UNCONFIRMED |RESOLVED
--- Comment #1 from JuzheZhong <juzhe.zhong at rivai dot ai> ---
-g0 will fix this issue.
Close it.
^ permalink raw reply [flat|nested] 2+ messages in thread
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2023-10-23 9:26 [Bug c/111931] New: RISC-V: Trivial optimization of VSETVL PASS juzhe.zhong at rivai dot ai
2023-11-02 22:47 ` [Bug target/111931] " juzhe.zhong at rivai dot ai
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