[Bug target/112405] New: GCN: "gcc.dg/vect/vect-simd-clone-20.c:22:1: error: conversion of register to a different size in 'view_convert_expr'"

[Bug target/112405] New: GCN: "gcc.dg/vect/vect-simd-clone-20.c:22:1: error: conversion of register to a different size in 'view_convert_expr'"

[tschwinge at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112405

            Bug ID: 112405
           Summary: GCN: "gcc.dg/vect/vect-simd-clone-20.c:22:1: error:
                    conversion of register to a different size in
                    'view_convert_expr'"
           Product: gcc
           Version: 14.0
            Status: UNCONFIRMED
          Keywords: ice-on-valid-code, testsuite-fail
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: tschwinge at gcc dot gnu.org
                CC: ams at gcc dot gnu.org, avieira at gcc dot gnu.org,
                    jules at gcc dot gnu.org
  Target Milestone: ---
            Target: GCN

The test case 'gcc.dg/vect/vect-simd-clone-20.c' added in recent commit
r14-5113-gaed00696a01ac065e9ed327434ec29d1cf50179e "vect: allow using inbranch
simdclones for masked loops" ICEs for GCN target (tested '-march=gfx90a'):

    [...]/source-gcc/gcc/testsuite/gcc.dg/vect/vect-simd-clone-20.c: In
function 'masked':
    [...]/source-gcc/gcc/testsuite/gcc.dg/vect/vect-simd-clone-20.c:22:1:
error: conversion of register to a different size in 'view_convert_expr'
    VIEW_CONVERT_EXPR<vector(64) int>(loop_mask_1);

    _23 = VIEW_CONVERT_EXPR<vector(64) int>(loop_mask_1);
    during GIMPLE pass: vect
    dump file: ./vect-simd-clone-20.c.176t.vect
    [...]/source-gcc/gcc/testsuite/gcc.dg/vect/vect-simd-clone-20.c:22:1:
internal compiler error: verify_gimple failed
    0x1022708 verify_gimple_in_cfg(function*, bool, bool)
            [...]/source-gcc/gcc/tree-cfg.cc:5646
    0xe6edd7 execute_function_todo
            [...]/source-gcc/gcc/passes.cc:2088
    0xe6f6e5 execute_todo
            [...]/source-gcc/gcc/passes.cc:2142

[Bug target/112405] GCN: "gcc.dg/vect/vect-simd-clone-20.c:22:1: error: conversion of register to a different size in 'view_convert_expr'"

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112405

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
           Assignee|unassigned at gcc dot gnu.org      |rguenth at gcc dot gnu.org
   Last reconfirmed|                            |2023-11-06
             Status|UNCONFIRMED                 |ASSIGNED
     Ever confirmed|0                           |1

--- Comment #1 from Richard Biener <rguenth at gcc dot gnu.org> ---
I will have a look.

[Bug target/112405] GCN: "gcc.dg/vect/vect-simd-clone-20.c:22:1: error: conversion of register to a different size in 'view_convert_expr'"

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112405

--- Comment #2 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Richard Biener <rguenth@gcc.gnu.org>:

https://gcc.gnu.org/g:9125969086bfa1bf804b246ea574a2329b06d2c5

commit r14-5158-g9125969086bfa1bf804b246ea574a2329b06d2c5
Author: Richard Biener <rguenther@suse.de>
Date:   Mon Nov 6 14:34:07 2023 +0100

    tree-optimization/112405 - SIMD clone calls with (loop) mask

    The following fixes the mask argument generation for SIMD clone
    calls under either loop masking or when the actual call is not
    masked but only a inbranch simd clone is available.  The issue
    was that we tried to directly convert the vector mask to the
    call argument type but SIMD clone masks require 1 or 0 (which
    could be even float) values for mask elements so we have to
    resort to a VEC_COND_EXPR to generate them just like we do for
    regular passing of the mask.

            PR tree-optimization/112405
            * tree-vect-stmts.cc (vectorizable_simd_clone_call):
            Properly handle invariant and/or loop mask passing.

[Bug target/112405] GCN: "gcc.dg/vect/vect-simd-clone-20.c:22:1: error: conversion of register to a different size in 'view_convert_expr'"

[rguenth at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112405

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
             Status|ASSIGNED                    |RESOLVED
         Resolution|---                         |FIXED

--- Comment #3 from Richard Biener <rguenth at gcc dot gnu.org> ---
Fixed.