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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/112431] RISC-V GCC-15 feature: Support register overlap on widen RVV instructions
Date: Thu, 30 Nov 2023 10:50:42 +0000 [thread overview]
Message-ID: <bug-112431-4-7sR7MzBiDc@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-112431-4@http.gcc.gnu.org/bugzilla/>
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112431
--- Comment #7 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The trunk branch has been updated by Lehua Ding <lhtin@gcc.gnu.org>:
https://gcc.gnu.org/g:5a35152f87a36db480693884dfb27ff6a5d5d683
commit r14-6007-g5a35152f87a36db480693884dfb27ff6a5d5d683
Author: Juzhe-Zhong <juzhe.zhong@rivai.ai>
Date: Thu Nov 30 18:12:04 2023 +0800
RISC-V: Remove earlyclobber for wx/wf instructions.
While working on overlap for widening instructions, I realize that we set
vwadd.wx/vfwadd.wf as earlyclobber which is incorrect.
Since according to RVV ISA:
"The destination EEW equals the source EEW."
vwadd.vx widens the first source operand (i.e. 2 * source EEW = dest EEW)
while
vwadd.wx only widens the second/scalar source operand.
Therefore overlap is legal for wx but not for vx.
Before this patch (heave spillings):
csrr a5,vlenb
slli a5,a5,1
addi a5,a5,64
vfwadd.wf v2,v14,fs0
add a5,a5,sp
vs2r.v v2,0(a5)
vl2re32.v v2,0(a1)
vfwadd.wf v14,v12,fs0
vfwadd.wf v12,v10,fs0
vfwadd.wf v10,v8,fs0
vfwadd.wf v8,v6,fs0
vfwadd.wf v6,v4,fs0
vfwadd.wf v4,v2,fs0
vfwadd.wf v2,v16,fs0
vfwadd.wf v16,v18,fs0
vfwadd.wf v18,v20,fs0
vfwadd.wf v20,v22,fs0
vfwadd.wf v22,v24,fs0
vfwadd.wf v24,v26,fs0
vfwadd.wf v26,v28,fs0
vfwadd.wf v28,v30,fs0
vfwadd.wf v30,v0,fs0
nop
vsetvli zero,zero,e32,m2,ta,ma
csrr a5,vlenb
After this patch (no spillings):
vfwadd.wf v16,v16,fs0
vfwadd.wf v14,v14,fs0
vfwadd.wf v12,v12,fs0
vfwadd.wf v10,v10,fs0
vfwadd.wf v8,v8,fs0
vfwadd.wf v6,v6,fs0
vfwadd.wf v4,v4,fs0
vfwadd.wf v2,v2,fs0
vfwadd.wf v18,v18,fs0
vfwadd.wf v20,v20,fs0
vfwadd.wf v22,v22,fs0
vfwadd.wf v24,v24,fs0
vfwadd.wf v26,v26,fs0
vfwadd.wf v28,v28,fs0
vfwadd.wf v30,v30,fs0
vfwadd.wf v0,v0,fs0
Confirm the codegen above run successfully on both SPIKE/QEMU.
PR target/112431
gcc/ChangeLog:
* config/riscv/vector.md: Remove earlyclobber for wx/wf
instructions.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/base/pr112431-19.c: New test.
* gcc.target/riscv/rvv/base/pr112431-20.c: New test.
* gcc.target/riscv/rvv/base/pr112431-21.c: New test.
next prev parent reply other threads:[~2023-11-30 10:50 UTC|newest]
Thread overview: 17+ messages / expand[flat|nested] mbox.gz Atom feed top
2023-11-08 0:15 [Bug c/112431] New: " juzhe.zhong at rivai dot ai
2023-11-08 0:16 ` [Bug c/112431] " juzhe.zhong at rivai dot ai
2023-11-08 0:16 ` juzhe.zhong at rivai dot ai
2023-11-08 1:56 ` kito at gcc dot gnu.org
2023-11-12 21:18 ` pinskia at gcc dot gnu.org
2023-11-29 9:37 ` [Bug target/112431] " cvs-commit at gcc dot gnu.org
2023-11-30 1:16 ` cvs-commit at gcc dot gnu.org
2023-11-30 2:40 ` cvs-commit at gcc dot gnu.org
2023-11-30 10:50 ` cvs-commit at gcc dot gnu.org [this message]
2023-11-30 12:11 ` cvs-commit at gcc dot gnu.org
2023-12-01 12:09 ` cvs-commit at gcc dot gnu.org
2023-12-01 12:09 ` cvs-commit at gcc dot gnu.org
2023-12-04 10:45 ` cvs-commit at gcc dot gnu.org
2023-12-04 11:21 ` juzhe.zhong at rivai dot ai
2023-12-04 13:36 ` cvs-commit at gcc dot gnu.org
2023-12-04 13:48 ` cvs-commit at gcc dot gnu.org
2023-12-11 7:56 ` cvs-commit at gcc dot gnu.org
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