[Bug target/112773] [14 Regression] RISC-V ICE: in force_align_down_and_div, at poly-int.h:1828 on rv32gcv_zvl256b

["rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=112773

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
     Ever confirmed|0                           |1
             Status|UNCONFIRMED                 |NEW
   Last reconfirmed|                            |2023-12-01

--- Comment #10 from Richard Biener <rguenth at gcc dot gnu.org> ---
The issue might be we do not use vec_extract for memory arguments:

  /* Use vec_extract patterns for extracting parts of vectors whenever
     available.  If that fails, see whether the current modes and bitregion
     give a natural subreg.  */                  
  machine_mode outermode = GET_MODE (op0);
  if (VECTOR_MODE_P (outermode) && !MEM_P (op0))
    {   

and somehow the original reg operand got spilled inbetween.  That happens
here, after we could make vec_extract work for this.

  /* Make sure we are playing with integral modes.  Pun with subregs
     if we aren't.  */
  opt_scalar_int_mode op0_mode = int_mode_for_mode (GET_MODE (op0));
  scalar_int_mode imode;
  if (!op0_mode.exists (&imode) || imode != GET_MODE (op0))
    { 
...
      else
        {
          poly_int64 size = GET_MODE_SIZE (GET_MODE (op0));
          rtx mem = assign_stack_temp (GET_MODE (op0), size);
          emit_move_insn (mem, op0);
          op0 = adjust_bitfield_address_size (mem, BLKmode, 0, size);
        }

now, if we spilled we can elide the round-down I think (which is for
the fear of accessing invalid memory).  Thus like the following?

diff --git a/gcc/expmed.cc b/gcc/expmed.cc
index b294eabb08d..e2b38b87bdf 100644
--- a/gcc/expmed.cc
+++ b/gcc/expmed.cc
@@ -1856,7 +1856,7 @@ extract_bit_field_1 (rtx str_rtx, poly_uint64 bitsize,
poly_uint64 bitnum,
   /* If we have a memory source and a non-constant bit offset, restrict
      the memory to the referenced bytes.  This is a worst-case fallback
      but is useful for things like vector booleans.  */
-  if (MEM_P (op0) && !bitnum.is_constant ())
+  if (MEM_P (str_rtx) && !bitnum.is_constant ())
     {
       bytenum = bits_to_bytes_round_down (bitnum);
       bitnum = num_trailing_bits (bitnum);

but that defers the ICE to

during RTL pass: expand
t.c: In function 'e':
t.c:4:6: internal compiler error: in to_constant, at poly-int.h:588
    4 | void e(unsigned f) {
      |      ^
0x10ea530 poly_int<2u, unsigned long>::to_constant() const
        /home/rguenther/src/trunk/gcc/poly-int.h:588
0x13cec67 extract_bit_field_1
        /home/rguenther/src/trunk/gcc/expmed.cc:1872

so I guess we really need to match the vec_extract pattern.

So you need to debug why that doesn't match here.