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From: "cvs-commit at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451 Date: Thu, 11 Apr 2024 03:02:50 +0000 [thread overview] Message-ID: <bug-114639-4-4owJPA3mFZ@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-114639-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #14 from GCC Commits <cvs-commit at gcc dot gnu.org> --- The master branch has been updated by Pan Li <panli@gcc.gnu.org>: https://gcc.gnu.org/g:e40a3d86511efcea71e9eadde8fb9f96be52f790 commit r14-9908-ge40a3d86511efcea71e9eadde8fb9f96be52f790 Author: Pan Li <pan2.li@intel.com> Date: Thu Apr 11 09:39:44 2024 +0800 RISC-V: Bugfix ICE for the vector return arg in mode switch This patch would like to fix a ICE in mode sw for below example code. during RTL pass: mode_sw test.c: In function âvbool16_t j(vuint64m4_t)â: test.c:15:1: internal compiler error: in create_pre_exit, at mode-switching.cc:451 15 | } | ^ 0x3978f12 create_pre_exit __RISCV_BUILD__/../gcc/mode-switching.cc:451 0x3979e9e optimize_mode_switching __RISCV_BUILD__/../gcc/mode-switching.cc:849 0x397b9bc execute __RISCV_BUILD__/../gcc/mode-switching.cc:1324 extern size_t get_vl (); vbool16_t test (vuint64m4_t a) { unsigned long b; return __riscv_vmsne_vx_u64m4_b16 (a, b, get_vl ()); } The create_pre_exit would like to find a return value copy. If not, there will be a reason in assert but not available for above sample code when vector calling convension is enabled by default. This patch would like to override the TARGET_FUNCTION_VALUE_REGNO_P for vector register and then we will have hard_regno_nregs for copy_num, aka there is a return value copy. As a side-effect of allow vector in TARGET_FUNCTION_VALUE_REGNO_P, the TARGET_GET_RAW_RESULT_MODE will have vector mode and which is sizeless cannot be converted to fixed_size_mode. Thus override the hook TARGET_GET_RAW_RESULT_MODE and return VOIDmode when the regno is-not-a fixed_size_mode. The below tests are passed for this patch. * The fully riscv regression tests. * The reproducing test in bugzilla PR114639. PR target/114639 gcc/ChangeLog: * config/riscv/riscv.cc (riscv_function_value_regno_p): New func impl for hook TARGET_FUNCTION_VALUE_REGNO_P. (riscv_get_raw_result_mode): New func imple for hook TARGET_GET_RAW_RESULT_MODE. (TARGET_FUNCTION_VALUE_REGNO_P): Impl the hook. (TARGET_GET_RAW_RESULT_MODE): Ditto. * config/riscv/riscv.h (V_RETURN): New macro for vector return. (GP_RETURN_FIRST): New macro for the first GPR in return. (GP_RETURN_LAST): New macro for the last GPR in return. (FP_RETURN_FIRST): Diito but for FPR. (FP_RETURN_LAST): Ditto. (FUNCTION_VALUE_REGNO_P): Remove as deprecated and replace by TARGET_FUNCTION_VALUE_REGNO_P. gcc/testsuite/ChangeLog: * g++.target/riscv/rvv/base/pr114639-1.C: New test. * gcc.target/riscv/rvv/base/pr114639-1.c: New test. Signed-off-by: Pan Li <pan2.li@intel.com>
next prev parent reply other threads:[~2024-04-11 3:02 UTC|newest] Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-04-08 12:29 [Bug target/114639] New: " schwab@linux-m68k.org 2024-04-08 14:08 ` [Bug target/114639] " kito at gcc dot gnu.org 2024-04-08 18:13 ` pinskia at gcc dot gnu.org 2024-04-09 1:26 ` pan2.li at intel dot com 2024-04-09 1:28 ` kito at gcc dot gnu.org 2024-04-09 1:33 ` pan2.li at intel dot com 2024-04-09 1:37 ` juzhe.zhong at rivai dot ai 2024-04-09 3:45 ` pan2.li at intel dot com 2024-04-09 7:22 ` pan2.li at intel dot com 2024-04-09 8:05 ` ubizjak at gmail dot com 2024-04-09 8:32 ` pan2.li at intel dot com 2024-04-09 11:55 ` pan2.li at intel dot com 2024-04-09 15:30 ` pan2.li at intel dot com 2024-04-10 3:20 ` pan2.li at intel dot com 2024-04-11 3:02 ` cvs-commit at gcc dot gnu.org [this message] 2024-04-16 8:47 ` schwab@linux-m68k.org 2024-04-22 22:53 ` juzhe.zhong at rivai dot ai 2024-04-28 6:02 ` pan2.li at intel dot com 2024-04-28 6:22 ` juzhe.zhong at rivai dot ai 2024-04-28 6:51 ` pan2.li at intel dot com
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