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From: "pan2.li at intel dot com" <gcc-bugzilla@gcc.gnu.org> To: gcc-bugs@gcc.gnu.org Subject: [Bug target/114639] [riscv] ICE in create_pre_exit, at mode-switching.cc:451 Date: Tue, 09 Apr 2024 08:32:46 +0000 [thread overview] Message-ID: <bug-114639-4-fWFwyLBBUc@http.gcc.gnu.org/bugzilla/> (raw) In-Reply-To: <bug-114639-4@http.gcc.gnu.org/bugzilla/> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=114639 --- Comment #10 from Li Pan <pan2.li at intel dot com> --- The #define FUNCTION_VALUE_REGNO_P(N) ((N) == GP_RETURN || (N) == FP_RETURN) of the riscv backend doesn't honor vector mode. Then the below part 370 ................ if (!targetm.calls.function_value_regno_p (copy_start)) 371 ................ copy_num = 0; 372 ................ else 373 ................ copy_num = hard_regno_nregs (copy_start, 374 ................................................ GET_MODE (copy_reg)); will have copy_num == 0 and then went to a different code path. Let me run fully riscv regression test for this fix first.
next prev parent reply other threads:[~2024-04-09 8:32 UTC|newest] Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top 2024-04-08 12:29 [Bug target/114639] New: " schwab@linux-m68k.org 2024-04-08 14:08 ` [Bug target/114639] " kito at gcc dot gnu.org 2024-04-08 18:13 ` pinskia at gcc dot gnu.org 2024-04-09 1:26 ` pan2.li at intel dot com 2024-04-09 1:28 ` kito at gcc dot gnu.org 2024-04-09 1:33 ` pan2.li at intel dot com 2024-04-09 1:37 ` juzhe.zhong at rivai dot ai 2024-04-09 3:45 ` pan2.li at intel dot com 2024-04-09 7:22 ` pan2.li at intel dot com 2024-04-09 8:05 ` ubizjak at gmail dot com 2024-04-09 8:32 ` pan2.li at intel dot com [this message] 2024-04-09 11:55 ` pan2.li at intel dot com 2024-04-09 15:30 ` pan2.li at intel dot com 2024-04-10 3:20 ` pan2.li at intel dot com 2024-04-11 3:02 ` cvs-commit at gcc dot gnu.org 2024-04-16 8:47 ` schwab@linux-m68k.org 2024-04-22 22:53 ` juzhe.zhong at rivai dot ai 2024-04-28 6:02 ` pan2.li at intel dot com 2024-04-28 6:22 ` juzhe.zhong at rivai dot ai 2024-04-28 6:51 ` pan2.li at intel dot com
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