[Bug middle-end/61577] [4.9.0 Regression] can't compile on hp-ux v3 ia64

["dave.anglin at bell dot net" <gcc-bugzilla@gcc.gnu.org>]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61577

--- Comment #218 from dave.anglin at bell dot net ---
On 2021-05-20 5:19 a.m., jvb at cyberscience dot com wrote:
> https://gcc.gnu.org/bugzilla/show_bug.cgi?id=61577
>
> --- Comment #217 from John Buddery <jvb at cyberscience dot com> ---
> Thanks very much for adding the binutils patch.
>
> Sorry, I'm new to .md definitions, so I've probably got this wrong. Did you
> mean something like:
>
> (define_insn "call_nogp_longcall"
>   [(call (mem:DI (match_operand:DI 0 "call_operand" "?b,s"))
>          (const_int 0))
>    (clobber (match_operand:DI 1 "register_operand" "=b,b"))]
>   "TARGET_HPUX && ia64_tune == PROCESSOR_ITANIUM2"
>   "@
>    br.call%+.many %1 = %0
>    brl.call%+.many %1 = %0"
>   [(set_attr "itanium_class" "br,scall")])
>
> (define_insn "call_nogp"
>   [(call (mem:DI (match_operand:DI 0 "call_operand" "?b,s"))
>          (const_int 0))
>    (clobber (match_operand:DI 1 "register_operand" "=b,b"))]
>   ""
>   "br.call%+.many %1 = %0"
>   [(set_attr "itanium_class" "br,scall")])
>
> I assume you need a second instruction to catch the case where the condition
> doesn't match ?
Yes.  Note that the call_nogp pattern is output directly in a couple of places
in ia64.c.  These
will need adjustment for hpux.

I'm not a ia64 maintainer.  I can only apply changes specific to hpux.

I have limited knowledge of the ia64 instruction set.  In the above, the
"brl.call" alternative
apples to the "s" constraint for operand 0.  Is that what you want?  The
"br.call" form is used
for the disparaged "b" constraint for operand 0.

I'm not sure that the scall call attribute is correct for brl.
>
> Itanium 1 support seems to have been dropped at some point, so -mtune only
> accepts options mapping to Itanium2. So, I couldn't test the br case on HP.
Then, we don't need to check the ia64_tune in the above.