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* [Bug rtl-optimization/91838] [8/9 Regression] incorrect use of shr and shrx to shift by 64, missed optimization of vector shift
       [not found] <bug-91838-4@http.gcc.gnu.org/bugzilla/>
@ 2023-05-19  8:04 ` ubizjak at gmail dot com
  2023-06-02  2:18 ` pinskia at gcc dot gnu.org
                   ` (6 subsequent siblings)
  7 siblings, 0 replies; 8+ messages in thread
From: ubizjak at gmail dot com @ 2023-05-19  8:04 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91838

Uroš Bizjak <ubizjak at gmail dot com> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|FIXED                       |---
             Status|RESOLVED                    |REOPENED

--- Comment #15 from Uroš Bizjak <ubizjak at gmail dot com> ---
This test returns different results, depending on whether V8QImode shift
pattern is present in target *.md files. For x86, if the following expander is
added:

+(define_expand "<insn>v8qi3"
+  [(set (match_operand:V8QI 0 "register_operand")
+       (any_shift:V8QI (match_operand:V8QI 1 "register_operand")
+                       (match_operand:DI 2 "nonmemory_operand")))]
+  "TARGET_MMX_WITH_SSE"
+{
+  ix86_expand_vecop_qihi_partial (<CODE>, operands[0],
+                                 operands[1], operands[2]);
+  DONE;
+})

then the tree optimizers produce:

V f (V x)
{
  V _2;

  <bb 2> [local count: 1073741824]:
  _2 = x_1(D) >> 8;
  return _2;

}

otherwise, without the named expander:

V f (V x)
{
  <bb 2> [local count: 1073741824]:
  return { 0, 0, 0, 0, 0, 0, 0, 0 };

}

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [Bug rtl-optimization/91838] [8/9 Regression] incorrect use of shr and shrx to shift by 64, missed optimization of vector shift
       [not found] <bug-91838-4@http.gcc.gnu.org/bugzilla/>
  2023-05-19  8:04 ` [Bug rtl-optimization/91838] [8/9 Regression] incorrect use of shr and shrx to shift by 64, missed optimization of vector shift ubizjak at gmail dot com
@ 2023-06-02  2:18 ` pinskia at gcc dot gnu.org
  2023-07-27 11:11 ` rguenth at gcc dot gnu.org
                   ` (5 subsequent siblings)
  7 siblings, 0 replies; 8+ messages in thread
From: pinskia at gcc dot gnu.org @ 2023-06-02  2:18 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91838

--- Comment #16 from Andrew Pinski <pinskia at gcc dot gnu.org> ---
So the testcase g++.dg/opt/pr91838.C depends on the out come of the discussion
at:
https://gcc.gnu.org/pipermail/gcc-patches/2023-June/620378.html

Which I think is saying this testcase is undefined really.

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [Bug rtl-optimization/91838] [8/9 Regression] incorrect use of shr and shrx to shift by 64, missed optimization of vector shift
       [not found] <bug-91838-4@http.gcc.gnu.org/bugzilla/>
  2023-05-19  8:04 ` [Bug rtl-optimization/91838] [8/9 Regression] incorrect use of shr and shrx to shift by 64, missed optimization of vector shift ubizjak at gmail dot com
  2023-06-02  2:18 ` pinskia at gcc dot gnu.org
@ 2023-07-27 11:11 ` rguenth at gcc dot gnu.org
  2023-07-27 11:38 ` ubizjak at gmail dot com
                   ` (4 subsequent siblings)
  7 siblings, 0 replies; 8+ messages in thread
From: rguenth at gcc dot gnu.org @ 2023-07-27 11:11 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91838

--- Comment #17 from Richard Biener <rguenth at gcc dot gnu.org> ---
Interestingly even with -mno-sse we somehow have a shift for V2QImode.  When
a scalar shift by precision is in the IL (for example via veclower) then
it's CCPs bit value tracking that makes it zero, if that's disabled then
VRP will compute it zero.  But we don't have any pattern that would
consistently do this.

I'm going to add one.

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [Bug rtl-optimization/91838] [8/9 Regression] incorrect use of shr and shrx to shift by 64, missed optimization of vector shift
       [not found] <bug-91838-4@http.gcc.gnu.org/bugzilla/>
                   ` (2 preceding siblings ...)
  2023-07-27 11:11 ` rguenth at gcc dot gnu.org
@ 2023-07-27 11:38 ` ubizjak at gmail dot com
  2023-07-27 13:56 ` cvs-commit at gcc dot gnu.org
                   ` (3 subsequent siblings)
  7 siblings, 0 replies; 8+ messages in thread
From: ubizjak at gmail dot com @ 2023-07-27 11:38 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91838

--- Comment #18 from Uroš Bizjak <ubizjak at gmail dot com> ---
(In reply to Richard Biener from comment #17)
> Interestingly even with -mno-sse we somehow have a shift for V2QImode.
This is implemented by a combination of shl rl,cl and shl rh,cl, so no XMM
registers are needed.

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [Bug rtl-optimization/91838] [8/9 Regression] incorrect use of shr and shrx to shift by 64, missed optimization of vector shift
       [not found] <bug-91838-4@http.gcc.gnu.org/bugzilla/>
                   ` (3 preceding siblings ...)
  2023-07-27 11:38 ` ubizjak at gmail dot com
@ 2023-07-27 13:56 ` cvs-commit at gcc dot gnu.org
  2023-07-27 13:57 ` rguenth at gcc dot gnu.org
                   ` (2 subsequent siblings)
  7 siblings, 0 replies; 8+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2023-07-27 13:56 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91838

--- Comment #19 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Richard Biener <rguenth@gcc.gnu.org>:

https://gcc.gnu.org/g:d1c072a1c3411a6fe29900750b38210af8451eeb

commit r14-2821-gd1c072a1c3411a6fe29900750b38210af8451eeb
Author: Richard Biener <rguenther@suse.de>
Date:   Thu Jul 27 13:08:32 2023 +0200

    tree-optimization/91838 - fix FAIL of g++.dg/opt/pr91838.C

    The following fixes the lack of simplification of a vector shift
    by an out-of-bounds shift value.  For scalars this is done both
    by CCP and VRP but vectors are not handled there.  This results
    in PR91838 differences in outcome dependent on whether a vector
    shift ISA is available and thus vector lowering does or does not
    expose scalar shifts here.

    The following adds a match.pd pattern to catch uniform out-of-bound
    shifts, simplifying them to zero when not sanitizing shift amounts.

            PR tree-optimization/91838
            * gimple-match-head.cc: Include attribs.h and asan.h.
            * generic-match-head.cc: Likewise.
            * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [Bug rtl-optimization/91838] [8/9 Regression] incorrect use of shr and shrx to shift by 64, missed optimization of vector shift
       [not found] <bug-91838-4@http.gcc.gnu.org/bugzilla/>
                   ` (4 preceding siblings ...)
  2023-07-27 13:56 ` cvs-commit at gcc dot gnu.org
@ 2023-07-27 13:57 ` rguenth at gcc dot gnu.org
  2024-03-26 14:58 ` cvs-commit at gcc dot gnu.org
  2024-03-26 15:05 ` cvs-commit at gcc dot gnu.org
  7 siblings, 0 replies; 8+ messages in thread
From: rguenth at gcc dot gnu.org @ 2023-07-27 13:57 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91838

Richard Biener <rguenth at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|REOPENED                    |RESOLVED

--- Comment #20 from Richard Biener <rguenth at gcc dot gnu.org> ---
The testcase is again fixed in GCC 14.

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [Bug rtl-optimization/91838] [8/9 Regression] incorrect use of shr and shrx to shift by 64, missed optimization of vector shift
       [not found] <bug-91838-4@http.gcc.gnu.org/bugzilla/>
                   ` (5 preceding siblings ...)
  2023-07-27 13:57 ` rguenth at gcc dot gnu.org
@ 2024-03-26 14:58 ` cvs-commit at gcc dot gnu.org
  2024-03-26 15:05 ` cvs-commit at gcc dot gnu.org
  7 siblings, 0 replies; 8+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2024-03-26 14:58 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91838

--- Comment #21 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-13 branch has been updated by Andre Simoes Dias Vieira
<avieira@gcc.gnu.org>:

https://gcc.gnu.org/g:c6e171ff827f8ff1bd160babac0dd24933972664

commit r13-8498-gc6e171ff827f8ff1bd160babac0dd24933972664
Author: Richard Biener <rguenther@suse.de>
Date:   Thu Jul 27 13:08:32 2023 +0200

    tree-optimization/91838 - fix FAIL of g++.dg/opt/pr91838.C

    The following fixes the lack of simplification of a vector shift
    by an out-of-bounds shift value.  For scalars this is done both
    by CCP and VRP but vectors are not handled there.  This results
    in PR91838 differences in outcome dependent on whether a vector
    shift ISA is available and thus vector lowering does or does not
    expose scalar shifts here.

    The following adds a match.pd pattern to catch uniform out-of-bound
    shifts, simplifying them to zero when not sanitizing shift amounts.

            PR tree-optimization/91838
            * gimple-match-head.cc: Include attribs.h and asan.h.
            * generic-match-head.cc: Likewise.
            * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.

    (cherry picked from commit d1c072a1c3411a6fe29900750b38210af8451eeb)

^ permalink raw reply	[flat|nested] 8+ messages in thread

* [Bug rtl-optimization/91838] [8/9 Regression] incorrect use of shr and shrx to shift by 64, missed optimization of vector shift
       [not found] <bug-91838-4@http.gcc.gnu.org/bugzilla/>
                   ` (6 preceding siblings ...)
  2024-03-26 14:58 ` cvs-commit at gcc dot gnu.org
@ 2024-03-26 15:05 ` cvs-commit at gcc dot gnu.org
  7 siblings, 0 replies; 8+ messages in thread
From: cvs-commit at gcc dot gnu.org @ 2024-03-26 15:05 UTC (permalink / raw)
  To: gcc-bugs

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=91838

--- Comment #22 from GCC Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-12 branch has been updated by Andre Simoes Dias Vieira
<avieira@gcc.gnu.org>:

https://gcc.gnu.org/g:1ddd9f9e53bd649d3d236f7941106d8cc46e7358

commit r12-10293-g1ddd9f9e53bd649d3d236f7941106d8cc46e7358
Author: Richard Biener <rguenther@suse.de>
Date:   Thu Jul 27 13:08:32 2023 +0200

    tree-optimization/91838 - fix FAIL of g++.dg/opt/pr91838.C

    The following fixes the lack of simplification of a vector shift
    by an out-of-bounds shift value.  For scalars this is done both
    by CCP and VRP but vectors are not handled there.  This results
    in PR91838 differences in outcome dependent on whether a vector
    shift ISA is available and thus vector lowering does or does not
    expose scalar shifts here.

    The following adds a match.pd pattern to catch uniform out-of-bound
    shifts, simplifying them to zero when not sanitizing shift amounts.

            PR tree-optimization/91838
            * gimple-match-head.cc: Include attribs.h and asan.h.
            * generic-match-head.cc: Likewise.
            * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.

    (cherry picked from commit d1c072a1c3411a6fe29900750b38210af8451eeb)

^ permalink raw reply	[flat|nested] 8+ messages in thread

end of thread, other threads:[~2024-03-26 15:05 UTC | newest]

Thread overview: 8+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
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2023-05-19  8:04 ` [Bug rtl-optimization/91838] [8/9 Regression] incorrect use of shr and shrx to shift by 64, missed optimization of vector shift ubizjak at gmail dot com
2023-06-02  2:18 ` pinskia at gcc dot gnu.org
2023-07-27 11:11 ` rguenth at gcc dot gnu.org
2023-07-27 11:38 ` ubizjak at gmail dot com
2023-07-27 13:56 ` cvs-commit at gcc dot gnu.org
2023-07-27 13:57 ` rguenth at gcc dot gnu.org
2024-03-26 14:58 ` cvs-commit at gcc dot gnu.org
2024-03-26 15:05 ` cvs-commit at gcc dot gnu.org

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