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* [Bug target/92071] [10 regression][ARM] ice in gen_movsi, at config/arm/arm.md:5378
[not found] <bug-92071-4@http.gcc.gnu.org/bugzilla/>
@ 2020-03-12 11:51 ` ebotcazou at gcc dot gnu.org
2020-03-12 22:10 ` [Bug middle-end/92071] " ebotcazou at gcc dot gnu.org
` (2 subsequent siblings)
3 siblings, 0 replies; 4+ messages in thread
From: ebotcazou at gcc dot gnu.org @ 2020-03-12 11:51 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92071
--- Comment #13 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
I'm leaning towards calling extract_bit_field instead of operand_subword_force
on the value from store_integral_bit_field in order to generate the unaligned
load.
However, this triggers bad memories (see PR middle-end/50325).
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Bug middle-end/92071] [10 regression][ARM] ice in gen_movsi, at config/arm/arm.md:5378
[not found] <bug-92071-4@http.gcc.gnu.org/bugzilla/>
2020-03-12 11:51 ` [Bug target/92071] [10 regression][ARM] ice in gen_movsi, at config/arm/arm.md:5378 ebotcazou at gcc dot gnu.org
@ 2020-03-12 22:10 ` ebotcazou at gcc dot gnu.org
2020-03-13 8:26 ` [Bug middle-end/92071] [10 regression] ICE " ebotcazou at gcc dot gnu.org
2020-03-13 9:11 ` marxin at gcc dot gnu.org
3 siblings, 0 replies; 4+ messages in thread
From: ebotcazou at gcc dot gnu.org @ 2020-03-12 22:10 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92071
Eric Botcazou <ebotcazou at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Component|target |middle-end
--- Comment #14 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
Recategorizing
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Bug middle-end/92071] [10 regression] ICE in gen_movsi, at config/arm/arm.md:5378
[not found] <bug-92071-4@http.gcc.gnu.org/bugzilla/>
2020-03-12 11:51 ` [Bug target/92071] [10 regression][ARM] ice in gen_movsi, at config/arm/arm.md:5378 ebotcazou at gcc dot gnu.org
2020-03-12 22:10 ` [Bug middle-end/92071] " ebotcazou at gcc dot gnu.org
@ 2020-03-13 8:26 ` ebotcazou at gcc dot gnu.org
2020-03-13 9:11 ` marxin at gcc dot gnu.org
3 siblings, 0 replies; 4+ messages in thread
From: ebotcazou at gcc dot gnu.org @ 2020-03-13 8:26 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92071
Eric Botcazou <ebotcazou at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
Status|ASSIGNED |RESOLVED
Summary|[10 regression][ARM] ice in |[10 regression] ICE in
|gen_movsi, at |gen_movsi, at
|config/arm/arm.md:5378 |config/arm/arm.md:5378
URL| |https://gcc.gnu.org/piperma
| |il/gcc-cvs/2020-March/27168
| |1.html
Resolution|--- |FIXED
--- Comment #15 from Eric Botcazou <ebotcazou at gcc dot gnu.org> ---
Fixed in r10-7151.
^ permalink raw reply [flat|nested] 4+ messages in thread
* [Bug middle-end/92071] [10 regression] ICE in gen_movsi, at config/arm/arm.md:5378
[not found] <bug-92071-4@http.gcc.gnu.org/bugzilla/>
` (2 preceding siblings ...)
2020-03-13 8:26 ` [Bug middle-end/92071] [10 regression] ICE " ebotcazou at gcc dot gnu.org
@ 2020-03-13 9:11 ` marxin at gcc dot gnu.org
3 siblings, 0 replies; 4+ messages in thread
From: marxin at gcc dot gnu.org @ 2020-03-13 9:11 UTC (permalink / raw)
To: gcc-bugs
https://gcc.gnu.org/bugzilla/show_bug.cgi?id=92071
Martin Liška <marxin at gcc dot gnu.org> changed:
What |Removed |Added
----------------------------------------------------------------------------
CC| |marxin at gcc dot gnu.org
--- Comment #16 from Martin Liška <marxin at gcc dot gnu.org> ---
commit r10-7151-g82f620e2ba4c440c5e89bb1f73d10a11ed0f2eb4
Author: Eric Botcazou <ebotcazou@gcc.gnu.org>
Date: Fri Mar 13 09:16:29 2020 +0100
Fix unaligned load with small memcpy on the ARM
store_integral_bit_field is ready to handle BLKmode fields, there is
even a subtlety with their handling on big-endian targets, see e.g.
PR middle-end/50325, but not if they are unaligned, so the fix is
simply to call extract_bit_field for them in order to generate an
unaligned load. As a bonus, this subsumes the big-endian specific
path that was added under PR middle-end/50325.
PR middle-end/92071
* expmed.c (store_integral_bit_field): For fields larger than a
word, call extract_bit_field on the value if the mode is BLKmode.
Remove specific path for big-endian targets and tidy things up a
little bit.
^ permalink raw reply [flat|nested] 4+ messages in thread
end of thread, other threads:[~2020-03-13 9:11 UTC | newest]
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2020-03-12 11:51 ` [Bug target/92071] [10 regression][ARM] ice in gen_movsi, at config/arm/arm.md:5378 ebotcazou at gcc dot gnu.org
2020-03-12 22:10 ` [Bug middle-end/92071] " ebotcazou at gcc dot gnu.org
2020-03-13 8:26 ` [Bug middle-end/92071] [10 regression] ICE " ebotcazou at gcc dot gnu.org
2020-03-13 9:11 ` marxin at gcc dot gnu.org
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