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From: "rguenth at gcc dot gnu.org" <gcc-bugzilla@gcc.gnu.org>
To: gcc-bugs@gcc.gnu.org
Subject: [Bug target/99648] [11 regression] gcc.dg/torture/pr71522.c fails starting with r11-165 for 32 bits
Date: Mon, 12 Apr 2021 06:44:25 +0000	[thread overview]
Message-ID: <bug-99648-4-of3IPQLoRX@http.gcc.gnu.org/bugzilla/> (raw)
In-Reply-To: <bug-99648-4@http.gcc.gnu.org/bugzilla/>

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99648

--- Comment #8 from Richard Biener <rguenth at gcc dot gnu.org> ---
(In reply to Jakub Jelinek from comment #7)
> --- gcc/simplify-rtx.c.jj	2021-04-09 16:18:24.275668496 +0200
> +++ gcc/simplify-rtx.c	2021-04-09 19:26:24.963134240 +0200
> @@ -7059,12 +7059,19 @@ simplify_immed_subreg (fixed_size_mode o
>        while (buffer.length () < buffer_bytes)
>  	buffer.quick_push (filler);
>      }
> -  else
> +  else if (!native_encode_rtx (innermode, x, buffer, first_byte,
> inner_bytes))
> +    return NULL_RTX;
> +  rtx ret = native_decode_rtx (outermode, buffer, 0);
> +  if (ret && MODE_COMPOSITE_P (outermode))
>      {
> -      if (!native_encode_rtx (innermode, x, buffer, first_byte,
> inner_bytes))
> +      auto_vec<target_unit, 128> buffer2 (buffer_bytes);
> +      if (!native_encode_rtx (outermode, ret, buffer2, 0, buffer_bytes))
>  	return NULL_RTX;
> -      }
> -  return native_decode_rtx (outermode, buffer, 0);
> +      for (unsigned int i = 0; i < buffer_bytes; ++i)
> +	if (buffer[i] != buffer2[i])
> +	  return NULL_RTX;
> +    }
> +  return ret;
>  }
>  
>  /* Simplify SUBREG:OUTERMODE(OP:INNERMODE, BYTE)

I think this makes sense from a consistency point of view.

> Makes simplify_subreg fail when trying to subreg a constant into a composite
> floating mode that doesn't decode back.
> Unfortunately, this causes ICE:
> pr71522.c: In function ‘main’:
> pr71522.c:27:1: error: unrecognizable insn:
>    27 | }
>       | ^
> (insn 5 2 6 2 (set (reg/v:TF 118 [ d ])
>         (subreg:TF (const_vector:V16QI [
>                     (const_int 65 [0x41]) repeated x15
>                     (const_int 0 [0])
>                 ]) 0)) "pr71522.c":20:3 -1
>      (nil))
> during RTL pass: vregs
> 
> store_bit_field_1 calls simplify_gen_subreg and that when
> simplify_immed_subreg fails will happily create the above subreg.
> So I'm quite afraid the above change could break quite a lot and so might be
> better to defer it for GCC12.

Hmm, yeah.  I suppose we can force the constant to memory and do the subreg
via a load?

  parent reply	other threads:[~2021-04-12  6:44 UTC|newest]

Thread overview: 15+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2021-03-18 15:31 [Bug other/99648] New: " seurer at gcc dot gnu.org
2021-03-18 16:42 ` [Bug other/99648] " jakub at gcc dot gnu.org
2021-03-19  7:39 ` [Bug target/99648] " rguenth at gcc dot gnu.org
2021-03-30 20:01 ` seurer at gcc dot gnu.org
2021-03-30 20:06 ` seurer at gcc dot gnu.org
2021-03-31  7:41 ` rguenth at gcc dot gnu.org
2021-04-09 16:48 ` jakub at gcc dot gnu.org
2021-04-09 17:42 ` jakub at gcc dot gnu.org
2021-04-12  6:44 ` rguenth at gcc dot gnu.org [this message]
2021-04-12  9:10 ` jakub at gcc dot gnu.org
2021-04-12 10:27 ` jakub at gcc dot gnu.org
2021-04-12 11:30 ` rguenth at gcc dot gnu.org
2021-04-12 11:34 ` jakub at gcc dot gnu.org
2021-04-13  7:42 ` cvs-commit at gcc dot gnu.org
2021-04-13  7:42 ` jakub at gcc dot gnu.org

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