[Bug target/99748] New: MVE: Wrong code at -O0 with float to integer conversion

[Bug target/99748] New: MVE: Wrong code at -O0 with float to integer conversion

[acoplan at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99748

            Bug ID: 99748
           Summary: MVE: Wrong code at -O0 with float to integer
                    conversion
           Product: gcc
           Version: 11.0
            Status: UNCONFIRMED
          Severity: normal
          Priority: P3
         Component: target
          Assignee: unassigned at gcc dot gnu.org
          Reporter: acoplan at gcc dot gnu.org
  Target Milestone: ---

GCC miscompiles the following testcase:

int main() {
  float a = 1.0f;
  return (int)a != 1;
}

with -march=armv8.1-m.main+mve -mfloat-abi=hard. The program should return 0
but returns 1 when compiled with these options. Looking at the generated code:

main:
        @ args = 0, pretend = 0, frame = 8
        @ frame_needed = 1, uses_anonymous_args = 0
        push    {r7, lr}
        sub     sp, sp, #8
        add     r7, sp, #0
        mov     r3, #1065353216
        str     r3, [r7, #4]    @ float
        vldr.32 s0, [r7, #4]
        bl      __aeabi_f2iz
        mov     r3, r0
        cmp     r3, #1
        ite     ne
        movne   r3, #1
        moveq   r3, #0
        uxtb    r3, r3
        mov     r0, r3
        adds    r7, r7, #8
        mov     sp, r7
        @ sp needed
        pop     {r7, pc}
        .size   main, .-main

we use the aeabi_f2iz libcall to do the float to integer conversion, passing
the argument in the s0 (VFP) register. However, looking at the implementation
of aeabi_f2iz in libgcc/config/arm/ieee754-sf.S, the function appears to be
expecting its argument in the GPR r0. So we do the conversion on whatever
happens to be in r0 when the libcall is made.

[Bug target/99748] MVE: Wrong code at -O0 with float to integer conversion

[acoplan at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99748

--- Comment #1 from Alex Coplan <acoplan at gcc dot gnu.org> ---
I should have mentioned, I found this because a number of the execution tests
are failing when testing with --with-arch=armv8.1-m.main+mve --with-float=hard.

[Bug target/99748] MVE: Wrong code at -O0 with float to integer conversion

[acoplan at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99748

--- Comment #2 from Alex Coplan <acoplan at gcc dot gnu.org> ---
GCC 10 also has the issue, so not a regression.

[Bug target/99748] MVE: Wrong code at -O0 with float to integer conversion

[acoplan at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99748

Alex Coplan <acoplan at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
     Ever confirmed|0                           |1
           Assignee|unassigned at gcc dot gnu.org      |acoplan at gcc dot gnu.org
   Last reconfirmed|                            |2021-03-31
             Status|UNCONFIRMED                 |ASSIGNED

--- Comment #3 from Alex Coplan <acoplan at gcc dot gnu.org> ---
I'm taking a look.

[Bug target/99748] MVE: Wrong code at -O0 with float to integer conversion

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99748

--- Comment #4 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The master branch has been updated by Alex Coplan <acoplan@gcc.gnu.org>:

https://gcc.gnu.org/g:16ea7f57891d3fe885ee55b2917208695e184714

commit r11-7999-g16ea7f57891d3fe885ee55b2917208695e184714
Author: Alex Coplan <alex.coplan@arm.com>
Date:   Tue Apr 6 09:06:27 2021 +0100

    arm: Fix PCS for SFmode -> SImode libcalls [PR99748]

    This patch fixes PR99748 which shows us trying to pass the argument to
    __aeabi_f2iz in the VFP register s0 when the library function is
    expecting to use the GPR r0. It also fixes the __aeabi_f2uiz case which
    was broken in the same way.

    For the testcase in the PR, here is the code we generate before the
    patch (with -mfloat-abi=hard -march=armv8.1-m.main+mve -O0):

    main:
        push    {r7, lr}
        sub     sp, sp, #8
        add     r7, sp, #0
        mov     r3, #1065353216
        str     r3, [r7, #4]    @ float
        vldr.32 s0, [r7, #4]
        bl      __aeabi_f2iz
        mov     r3, r0
        cmp     r3, #1
        [...]

    This becomes:

    main:
        push    {r7, lr}
        sub     sp, sp, #8
        add     r7, sp, #0
        mov     r3, #1065353216
        str     r3, [r7, #4]    @ float
        ldr     r0, [r7, #4]    @ float
        bl      __aeabi_f2iz
        mov     r3, r0
        cmp     r3, #1
        [...]

    after the patch. We see a similar change for the same testcase with a
    cast to unsigned instead of int.

    gcc/ChangeLog:

            PR target/99748
            * config/arm/arm.c (arm_libcall_uses_aapcs_base): Also use base
            PCS for [su]fix_optab.

[Bug target/99748] MVE: Wrong code at -O0 with float to integer conversion

[acoplan at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99748

--- Comment #5 from Alex Coplan <acoplan at gcc dot gnu.org> ---
Fixed on trunk so far, needs a backport to GCC 10.

[Bug target/99748] MVE: Wrong code at -O0 with float to integer conversion

[cvs-commit at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99748

--- Comment #6 from CVS Commits <cvs-commit at gcc dot gnu.org> ---
The releases/gcc-10 branch has been updated by Alex Coplan
<acoplan@gcc.gnu.org>:

https://gcc.gnu.org/g:283367662c25057fd7c9c98257cca858f85b75fc

commit r10-9755-g283367662c25057fd7c9c98257cca858f85b75fc
Author: Alex Coplan <alex.coplan@arm.com>
Date:   Tue Apr 6 09:06:27 2021 +0100

    arm: Fix PCS for SFmode -> SImode libcalls [PR99748]

    This patch fixes PR99748 which shows us trying to pass the argument to
    __aeabi_f2iz in the VFP register s0 when the library function is
    expecting to use the GPR r0. It also fixes the __aeabi_f2uiz case which
    was broken in the same way.

    For the testcase in the PR, here is the code we generate before the
    patch (with -mfloat-abi=hard -march=armv8.1-m.main+mve -O0):

    main:
        push    {r7, lr}
        sub     sp, sp, #8
        add     r7, sp, #0
        mov     r3, #1065353216
        str     r3, [r7, #4]    @ float
        vldr.32 s0, [r7, #4]
        bl      __aeabi_f2iz
        mov     r3, r0
        cmp     r3, #1
        [...]

    This becomes:

    main:
        push    {r7, lr}
        sub     sp, sp, #8
        add     r7, sp, #0
        mov     r3, #1065353216
        str     r3, [r7, #4]    @ float
        ldr     r0, [r7, #4]    @ float
        bl      __aeabi_f2iz
        mov     r3, r0
        cmp     r3, #1
        [...]

    after the patch. We see a similar change for the same testcase with a
    cast to unsigned instead of int.

    gcc/ChangeLog:

            PR target/99748
            * config/arm/arm.c (arm_libcall_uses_aapcs_base): Also use base
            PCS for [su]fix_optab.

    (cherry picked from commit 16ea7f57891d3fe885ee55b2917208695e184714)

[Bug target/99748] MVE: Wrong code at -O0 with float to integer conversion

[acoplan at gcc dot gnu.org]

https://gcc.gnu.org/bugzilla/show_bug.cgi?id=99748

Alex Coplan <acoplan at gcc dot gnu.org> changed:

           What    |Removed                     |Added
----------------------------------------------------------------------------
         Resolution|---                         |FIXED
             Status|ASSIGNED                    |RESOLVED

--- Comment #7 from Alex Coplan <acoplan at gcc dot gnu.org> ---
Fixed for 10.4, so fixed everywhere.