[gcc(refs/users/meissner/heads/work047)] Update ChangeLog.meissner.

[gcc(refs/users/meissner/heads/work047)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:8350d6886cbe960084723438dc55bbb4531c8c3f

commit 8350d6886cbe960084723438dc55bbb4531c8c3f
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Apr 13 14:06:52 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
    2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 47 ++++++++++++++++++++++++++++++++++++++++
 gcc/testsuite/ChangeLog.meissner |  9 ++++++++
 2 files changed, 56 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 4bd699fde04..80756b91acb 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,50 @@
+work047.patch016:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/altivec.me (UNSPEC_XXSPLTI32DX): Move to vsx.md.
+	(xxsplti32dx_v4si): Move to vsx.md.
+	(xxsplti32dx_v4si_inst): Move to vsx.md.
+	(xxsplti32dx_v4sf): Move to vsx.md.
+	(xxsplti32dx_v4sf_inst): Move to vsx.md.
+	* config/rs6000/contraints.md (eD): New constraint.
+	* config/rs6000/predicates.md (easy_fp_constant): If we can load
+	the constant with a pair of XXSPLTI32DX instructions, it is easy.
+	(xxsplti32dx_operand): New predicate.
+	(easy_vector_constant): If we can load the constant with a pair of
+	XXSPLTI32DX instructions, it is easy.
+	* config/rs6000/rs6000-cpus.def (OTHER_POWER10_MASKS): Add
+	-mxxsplti32dx.
+	(POWERPC_MASKS): Add -mxxsplti32dx.
+	* config/rs6000/rs6000-protos.h (xxsplti32dx_constant_p): New
+	declaration.
+	* config/rs6000/rs6000.c (rs6000_option_override_internal): Add
+	-mxxsplti32dx support.
+	(xxsplti32dx_constant_p): New helper function.
+	(output_vec_const_move): Split constants that need XXSPLTI32DX.
+	(rs6000_opt_masks): Add -mxxsplti32dx.
+	* config/rs6000/rs6000.md (movsf_hardfloat): Add support for
+	loading constants with XXSPLTI32DX.
+	(mov<mode>_hardfloat32, FMOVE64 iterator): Add support for loading
+	constants with XXSPLTI32DX.
+	(mov<mode>_hardfloat64, FMOVE64 iterator): Add support for loading
+	constants with XXSPLTI32DX.
+	* config/rs6000/rs6000.opt (-mxxsplti32dx): New switch.
+	* config/rs6000/vsx.md (UNSPEC_XXSPLTI32DX): Move unspec here from
+	altivec.md.
+	(UNSPEC_XXSPLTI32DX_CONST): New unspec.
+	(vsx_mov<mode>_64bit): Bump up size of 'W' vector constants to
+	accomidate a pair of XXSPLTI32DX instructions.
+	(vsx_mov<mode>_32bit): Bump up size of 'W' vector constants to
+	accomidate a pair of XXSPLTI32DX instructions.
+	(XXSPLTI32DX): New mode iterator.
+	(xxsplti32dx_<mode>): New insn and splits.
+	(xxsplti32dx_<mode>_first): New insns.
+	(xxsplti32dx_<mode>_second): New insns.
+	(xxsplti32dx_v4si): Move here from altivec.md.
+	(xxsplti32dx_v4si_inst): Move here from altivec.md.
+	(xxsplti32dx_v4sf): Move here from altivec.md.
+	(xxsplti32dx_v4sf_inst): Move here from altivec.md.
+
 work047.patch014:
 2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
 
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index 25ef1654c30..b61a37d9e59 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,12 @@
+work047.patch016:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/vec-splati-runnable.c: Update insn count.
+	* gcc.target/powerpc/vec-splat-constant-sf.c: Update insn count.
+	* gcc.target/powerpc/vec-splat-constant-df.c: Update insn count.
+	* gcc.target/powerpc/vec-splat-constant-v2df.c: Update insn
+	count.
+
 work047.patch015:
 2021-04-13  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work047)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:b75435a274bcbd4d2130cbfce8f6a42fb236ca46

commit b75435a274bcbd4d2130cbfce8f6a42fb236ca46
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Apr 13 18:18:45 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 26 +++++++++++++++++++++++---
 1 file changed, 23 insertions(+), 3 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index fc0a066b6db..33928740e51 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,10 +1,26 @@
+work047.patch019:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/altivec.md (UNSPEC_XXBLEND): Move to vsx.md.
+	(VM3): Move to vsx.md and rename to VBLEND.
+	(VM3_char): Move to vsx.md and rename to VBLEND_char.
+	(xxblend_<mode>): Move to vsx.md.
+	* config/rs6000/vsx.md (UNSPEC_XXEVAL): Move from altivec.md.
+	(VBLEND): Move from altivec.md and rename VM3 to VBLEND.
+	(VBLEND_char): Move from altivec.md and rename VM3_char to
+	VBLEND_char.
+	(xxblend_<mode>): Move from altivec.md.  Use vsx_register_operand
+	instead of register operand.  Change the insn type from vecsimple
+	to vecperm.
+
 work047.patch018:
 2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
 
 	* config/rs6000/altivec.md (UNSPEC_XXEVAL): Move to vsx.md.
 	(xxeval): Move to vsx.md.
 	* config/rs6000/vsx.md (UNSPEC_XXEVAL): Move from altivec.md.
-	(xxeval): Move from altivec.md.
+	(xxeval): Move from altivec.md.  Change altivec_register_operand
+	to vsx_register_operand.  Change insn type to vecperm.
 
 work047.patch017:
 2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
@@ -13,8 +29,12 @@ work047.patch017:
 	(xxpermx): Move to vsx.md.
 	(xxpermx_inst): Move to vsx.md.
 	* config/rs6000/vsx.md (UNSPEC_XXPERMX): Move from altivec.md.
-	(xxpermx): Move from altivec.md.
-	(xxpermx_inst): Move from altivec.md.
+	(xxpermx): Move from altivec.md.  Use vsx_register_operand
+	instead of register_operand.  Remove setting the insn attribute
+	"type" on the expander.
+	(xxpermx_inst): Move from altivec.md.  Use vsx_register_operand
+	instead of register_operand.  Change the constraint from "v" to
+	"wa" to match the instruction.  Change insn type to vecperm.
 
 work047.patch016:
 2021-04-13  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work047)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:1787e7dd73c867c67eefc6a3541c10c4506dbe00

commit 1787e7dd73c867c67eefc6a3541c10c4506dbe00
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Apr 13 15:54:51 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 18 ++++++++++++++++++
 1 file changed, 18 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 80756b91acb..fc0a066b6db 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,21 @@
+work047.patch018:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/altivec.md (UNSPEC_XXEVAL): Move to vsx.md.
+	(xxeval): Move to vsx.md.
+	* config/rs6000/vsx.md (UNSPEC_XXEVAL): Move from altivec.md.
+	(xxeval): Move from altivec.md.
+
+work047.patch017:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/altivec.md (UNSPEC_XXPERMX): Move to vsx.md.
+	(xxpermx): Move to vsx.md.
+	(xxpermx_inst): Move to vsx.md.
+	* config/rs6000/vsx.md (UNSPEC_XXPERMX): Move from altivec.md.
+	(xxpermx): Move from altivec.md.
+	(xxpermx_inst): Move from altivec.md.
+
 work047.patch016:
 2021-04-13  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work047)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:545088c880b36c99f98a4abcd79281a756cd54df

commit 545088c880b36c99f98a4abcd79281a756cd54df
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Apr 13 13:19:05 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
    2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 39 +++++++++++++++++++++++++++++++++++++++
 gcc/testsuite/ChangeLog.meissner |  7 +++++++
 2 files changed, 46 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 8694b8b405a..4bd699fde04 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,42 @@
+work047.patch014:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/altivec.md (UNSPEC_XXSPLTID): Move to vsx.md and
+	rename to UNSPEC_XXSPLTID.
+	(xxspltidp_v2df): Move to vsx.md and re-implement.
+	(xxspltidp_v2df_inst): Move to vsx.md and re-implement.
+	* config/rs6000/constraints.md (eF): New constraint.
+	* config/rs6000/predicates.md (easy_fp_constant): If we can load
+	the scalar constant with XXSPLTIDP, return true.
+	(xxspltidp_operand): New predicate.
+	(easy_vector_constant): If we can generate XXSPLTIDP, mark the
+	vector constant as easy.
+	* config/rs6000/rs6000-cpus.def (OTHER_POWER10_MASKS): Add
+	-mxxspltidp support.
+	(POWERPC_MASKS): Add -mxxspltidp support.
+	* config/rs6000/rs6000-protos.h (xxspltidp_constant_p): New
+	declaration.
+	* config/rs6000/rs6000.c (rs6000_option_override_internal): Add
+	-mxxspltidp support.
+	(xxspltidp_constant_p): New function.
+	(output_vec_const_move): Add support for XXSPLTIDP.
+	(rs6000_opt_masks): Add -mxxspltidp support.
+	(rs6000_emit_xxspltidp_v2df): Change function to implement the
+	XXSPLTIDP instruction.
+	* config/rs6000/rs6000.md (movsf_hardfloat): Add XXSPLTIDP
+	support.
+	(mov<mode>_hardfloat32, FMOVE64 iterator): Add XXSPLTIDP support.
+	(mov<mode>_hardfloat64, FMOVE64 iterator): Add XXSPLTIDP support.
+	* config/rs6000/rs6000.opt (-mxxspltidp): New switch.
+	* config/rs6000/vsx.md (UNSPEC_XXSPLTIDP): Move here from
+	altivec.md.  Rename it to UNSPEC_XXSPLTIDP to match the
+	instruction.
+	(XXSPLTIDP): New mode iterator.
+	(xxspltidp_<mode>_internal1): New define_insn_and_split.
+	(xxspltidp_<mode>_internal2): New define_insn.
+	(xxspltidp_v2df): Move to vsx.md from altivec.md.  Re-implement to
+	use the new constant format.
+
 work047.patch012:
 2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
 
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index 4ce0292ca93..25ef1654c30 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,10 @@
+work047.patch015:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/vec-splat-constant-sf.c: New test.
+	* gcc.target/powerpc/vec-splat-constant-df.c: New test.
+	* gcc.target/powerpc/vec-splat-constant-v2df.c: New test.
+
 work047.patch013:
 2021-04-13  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work047)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:6d106de793e3933f94d5eb4b82a2536a2d315be7

commit 6d106de793e3933f94d5eb4b82a2536a2d315be7
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Apr 13 12:37:37 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
    2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 29 +++++++++++++++++++++++++++++
 gcc/testsuite/ChangeLog.meissner |  9 +++++++++
 2 files changed, 38 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index c4c81dc8a15..8694b8b405a 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,32 @@
+work047.patch012:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/altivec.md (UNSPEC_XXSPLTIW): Delete.
+	(xxspltiw_v4si): Move to vsx.md and rewrite.
+	(xxspltiw_v4sf): Move to vsx.md and rewrite.
+	(xxspltiw_v4sf_inst): Delete.
+	* config/rs6000/predicates.md (xxspltiw_operand): New predicate.
+	(easy_vector_constant): If we can use XXSPLTIW, the vector
+	constant is easy.
+	* config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Add
+	-mxxspltiw support.
+	(POWERPC_MASKS): Add -mxxspltiw support.
+	* config/rs6000/rs6000.c (rs6000_option_override_internal): Add
+	-mxxspltiw support.
+	(xxspltib_constant_p): If we can generate XXSPLTIW, don't generate
+	a XXSPLTIB and an extend instruction.
+	(output_vec_const_move): Add support for XXSPLTIW vector
+	constants.
+	(rs6000_opt_masks): Add -mxxspltiw.
+	* config/rs6000/rs6000.opt (-mxxspltiw): New debug switch.
+	* config/rs6000/vsx.md (xxspltiw_v8hi): New insn.
+	(xxspltiw_v4si): Move from altivec.md and reimplement to use
+	VEC_DUPLICATE.
+	(xxspltiw_v4sf): Move from altivec.md and reimplement to use
+	VEC_DUPLICATE.
+	(XXSPLTIW): New mode iterator.
+	(XXSPLTIW splitter): New insn splitter for XXSPLTIW.
+
 work047.patch011:
 2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
 
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index 9854968bf0d..4ce0292ca93 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,12 @@
+work047.patch013:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/vec-splati-runnable.c: Set optimization level
+	to -O2.  Add missing abort call.  Update insn counts.
+	* gcc.target/powerpc/vec-splat-constant-v4sf.c: New test.
+	* gcc.target/powerpc/vec-splat-constant-v4si.c: New test.
+	* gcc.target/powerpc/vec-splat-constant-v8hi.c: New test.
+
 work047.patch005:
 2021-04-01  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work047)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:cc5b7adca9d1ee22127e69608191cc89bad9dcdf

commit cc5b7adca9d1ee22127e69608191cc89bad9dcdf
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Apr 13 09:54:09 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    libgcc/
    2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner    | 7 +++++++
 libgcc/ChangeLog.meissner | 7 +++++++
 2 files changed, 14 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 9cb7661756e..c4c81dc8a15 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,10 @@
+work047.patch011:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config.gcc (powerpc*-*-*, rs6000-*-*): Do not set
+	LINK_OS_EXTRA_SPEC664 for the Advance Toolchain.  Continue to set
+	LINK_OS_EXTRA_SPEC32.
+
 work047.patch009:
 2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
 
diff --git a/libgcc/ChangeLog.meissner b/libgcc/ChangeLog.meissner
index e80835e9fcf..b21473172ce 100644
--- a/libgcc/ChangeLog.meissner
+++ b/libgcc/ChangeLog.meissner
@@ -1,3 +1,10 @@
+work047.patch010:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	PR target/98952
+	* config/rs6000/tramp.S (__trampoline_setup): Fix trampoline size
+	comparison in 32-bit.
+
 work047.patch008:
 2021-04-13  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work047)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:484fddd88ac2963ba0d1b3c30ac9031d21df001a

commit 484fddd88ac2963ba0d1b3c30ac9031d21df001a
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Apr 13 09:37:33 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
    2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    libgcc/
    2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 61 ++++++++++++++++++++++++++++++++++++++++
 gcc/testsuite/ChangeLog.meissner | 42 +++++++++++++++++++++++++++
 libgcc/ChangeLog.meissner        |  6 ++++
 3 files changed, 109 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 7ccc7ca21b7..9cb7661756e 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,64 @@
+work047.patch009:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000-protos.h (rs6000_const_f32_to_i32): Change
+	return type to long.
+	* config/rs6000/rs6000.c (rs6000_const_f32_to_i32): Change return
+	type to long.
+
+work047.patch007:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000-builtin.def (BU_IBM128_2): Rename
+	RS6000_BTM_IBM128 from RS6000_BTM_FLOAT128.
+	* config/rs6000/rs6000-call.c (rs6000_invalid_builtin): Update
+	error message for __ibm128 built-in functions.
+	(rs6000_init_builtins): Create the __ibm128 keyword on older
+	systems where long double uses the IBM extended double format,
+	even if they don't support IEEE 128-bit floating point.
+	* config/rs6000/rs6000.c (rs6000_builtin_mask_calculate): Rename
+	RS6000_BTM_IBM128 from RS6000_BTM_FLOAT128.
+	(rs6000_builtin_mask_names): Rename RS6000_BTM_IBM128 from
+	RS6000_BTM_FLOAT128.
+	* config/rs6000/rs6000.h (TARGET_IBM128): New macro.
+	(RS6000_BTM_IBM128): Rename from RS6000_BTM_FLOAT128.
+	(RS6000_BTM_COMMON): Rename RS6000_BTM_IBM128 from
+	RS6000_BTM_FLOAT128.
+
+work047.patch006:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
+	double is IEEE-128 map the nanq built-in functions to the long
+	double function, not the f128 function.
+
+work047.patch002:
+2021-04-13 Michael Meissner  <meissner@linux.ibm.com>
+
+        * config/rs6000/rs6000.c (have_compare_and_set_mask): Add IEEE
+        128-bit floating point types.
+        * config/rs6000/rs6000.md (FPMASK): New iterator.
+        (FPMASK2): New iterator.
+        (Fv mode attribute): Add KFmode and TFmode.
+        (mov<FPMASK:mode><FPMASK2:mode>cc_fpmask): Replace
+        mov<SFDF:mode><SFDF2:mode>cc_p9.  Add IEEE 128-bit fp support.
+        (mov<FPMASK:mode><FPMASK2:mode>cc_invert_fpmask): Replace
+        mov<SFDF:mode><SFDF2:mode>cc_invert_p9.  Add IEEE 128-bit fp
+        support.
+        (fpmask<mode>): Add IEEE 128-bit fp support.  Enable generator to
+        build te RTL.
+        (xxsel<mode>): Add IEEE 128-bit fp support.  Enable generator to
+        build te RTL.
+
+work047.patch001:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000.c (rs6000_emit_minmax): Add support for ISA
+	3.1 IEEE 128-bit floating point xsmaxcqp and xsmincqp instructions.
+	* config/rs6000/rs60000.h (FLOAT128_MIN_MAX_FPMASK_P): New macro.
+	* config/rs6000/rs6000.md (s<minmax><mode>3): Add support for the
+	ISA 3.1 IEEE 128-bit minimum and maximum instructions.
+
 2021-04-13   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index 7ccc7ca21b7..9854968bf0d 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,45 @@
+work047.patch005:
+2021-04-01  Michael Meissner  <meissner@linux.ibm.com>
+
+	* c-c++-common/dfp/convert-bfp-11.c: Force using IBM 128-bit long
+	double.  Remove check for 64-bit long double.
+
+work047.patch004:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	PR target/70117
+	* gcc.target/powerpc/pr70117.c: Force the long double type to use
+	the IBM 128-bit format.
+
+work047.patch003:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	* lib/target-supports.exp
+	(check_effective_target_ppc_long_double_ibm128): New function.
+	(check_effective_target_ppc_long_double_ieee128): New function.
+	(check_effective_target_ppc_long_double_64bit): New function.
+	(add_options_for_ppc_long_double_override_ibm128): New function.
+	(check_effective_target_ppc_long_double_override_ibm128): New
+	function.
+	(add_options_for_ppc_long_double_override_ieee128): New function.
+	(check_effective_target_ppc_long_double_override_ieee128): New
+	function.
+	(add_options_for_ppc_long_double_override_64bit): New function.
+	(check_effective_target_ppc_long_double_override_64bit): New
+	function.
+
+work047.patch002:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+        * gcc.target/powerpc/float128-cmove.c: New test.
+        * gcc.target/powerpc/float128-minmax-3.c: New test.
+
+work047.patch001:
+gcc/testsuite/
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/float128-minmax-2.c: New test.
+
 2021-04-13   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch
diff --git a/libgcc/ChangeLog.meissner b/libgcc/ChangeLog.meissner
index 7ccc7ca21b7..e80835e9fcf 100644
--- a/libgcc/ChangeLog.meissner
+++ b/libgcc/ChangeLog.meissner
@@ -1,3 +1,9 @@
+work047.patch008:
+2021-04-13  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/ibm-ldouble.c (pack_ldouble): Use
+	__builtin_pack_ibm128 instead of __builtin_pack_longdouble.
+
 2021-04-13   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch