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* [gcc(refs/users/wschmidt/heads/builtins10)] rs6000: Add Cell builtins
@ 2021-06-15 17:19 William Schmidt
0 siblings, 0 replies; 7+ messages in thread
From: William Schmidt @ 2021-06-15 17:19 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:01ce8a6eea5eb6529abe987eea3c7e4c053fa64c
commit 01ce8a6eea5eb6529abe987eea3c7e4c053fa64c
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Mon Jun 7 16:09:15 2021 -0500
rs6000: Add Cell builtins
2021-06-07 Bill Schmidt <wschmidt@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtin-new.def: Add cell stanza.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index c2e5c5b0916..b7a72e65d6a 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1102,6 +1102,33 @@
VEC_SET_V8HI nothing {set}
+; Cell builtins.
+[cell]
+ pure vsc __builtin_altivec_lvlx (signed long, const void *);
+ LVLX altivec_lvlx {ldvec}
+
+ pure vsc __builtin_altivec_lvlxl (signed long, const void *);
+ LVLXL altivec_lvlxl {ldvec}
+
+ pure vsc __builtin_altivec_lvrx (signed long, const void *);
+ LVRX altivec_lvrx {ldvec}
+
+ pure vsc __builtin_altivec_lvrxl (signed long, const void *);
+ LVRXL altivec_lvrxl {ldvec}
+
+ void __builtin_altivec_stvlx (vsc, signed long, void *);
+ STVLX altivec_stvlx {stvec}
+
+ void __builtin_altivec_stvlxl (vsc, signed long, void *);
+ STVLXL altivec_stvlxl {stvec}
+
+ void __builtin_altivec_stvrx (vsc, signed long, void *);
+ STVRX altivec_stvrx {stvec}
+
+ void __builtin_altivec_stvrxl (vsc, signed long, void *);
+ STVRXL altivec_stvrxl {stvec}
+
+
; VSX builtins.
[vsx]
pure vd __builtin_altivec_lvx_v2df (signed long, const void *);
^ permalink raw reply [flat|nested] 7+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins10)] rs6000: Add Cell builtins
@ 2021-07-29 14:45 William Schmidt
0 siblings, 0 replies; 7+ messages in thread
From: William Schmidt @ 2021-07-29 14:45 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:34c9cc3a0e7790c19c3ccd188f13227163d8d8df
commit 34c9cc3a0e7790c19c3ccd188f13227163d8d8df
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Mon Jun 7 16:09:15 2021 -0500
rs6000: Add Cell builtins
2021-06-07 Bill Schmidt <wschmidt@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtin-new.def: Add cell stanza.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 805bdc87acd..322dbe1f713 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1102,6 +1102,33 @@
VEC_SET_V8HI nothing {set}
+; Cell builtins.
+[cell]
+ pure vsc __builtin_altivec_lvlx (signed long, const void *);
+ LVLX altivec_lvlx {ldvec}
+
+ pure vsc __builtin_altivec_lvlxl (signed long, const void *);
+ LVLXL altivec_lvlxl {ldvec}
+
+ pure vsc __builtin_altivec_lvrx (signed long, const void *);
+ LVRX altivec_lvrx {ldvec}
+
+ pure vsc __builtin_altivec_lvrxl (signed long, const void *);
+ LVRXL altivec_lvrxl {ldvec}
+
+ void __builtin_altivec_stvlx (vsc, signed long, void *);
+ STVLX altivec_stvlx {stvec}
+
+ void __builtin_altivec_stvlxl (vsc, signed long, void *);
+ STVLXL altivec_stvlxl {stvec}
+
+ void __builtin_altivec_stvrx (vsc, signed long, void *);
+ STVRX altivec_stvrx {stvec}
+
+ void __builtin_altivec_stvrxl (vsc, signed long, void *);
+ STVRXL altivec_stvrxl {stvec}
+
+
; VSX builtins.
[vsx]
pure vd __builtin_altivec_lvx_v2df (signed long, const void *);
^ permalink raw reply [flat|nested] 7+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins10)] rs6000: Add Cell builtins
@ 2021-06-25 16:17 William Schmidt
0 siblings, 0 replies; 7+ messages in thread
From: William Schmidt @ 2021-06-25 16:17 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:38e894d88c39f1639c544abb94a8fbf56fb57e81
commit 38e894d88c39f1639c544abb94a8fbf56fb57e81
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Mon Jun 7 16:09:15 2021 -0500
rs6000: Add Cell builtins
2021-06-07 Bill Schmidt <wschmidt@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtin-new.def: Add cell stanza.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index b6f4b604383..4b640cac654 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1102,6 +1102,33 @@
VEC_SET_V8HI nothing {set}
+; Cell builtins.
+[cell]
+ pure vsc __builtin_altivec_lvlx (signed long, const void *);
+ LVLX altivec_lvlx {ldvec}
+
+ pure vsc __builtin_altivec_lvlxl (signed long, const void *);
+ LVLXL altivec_lvlxl {ldvec}
+
+ pure vsc __builtin_altivec_lvrx (signed long, const void *);
+ LVRX altivec_lvrx {ldvec}
+
+ pure vsc __builtin_altivec_lvrxl (signed long, const void *);
+ LVRXL altivec_lvrxl {ldvec}
+
+ void __builtin_altivec_stvlx (vsc, signed long, void *);
+ STVLX altivec_stvlx {stvec}
+
+ void __builtin_altivec_stvlxl (vsc, signed long, void *);
+ STVLXL altivec_stvlxl {stvec}
+
+ void __builtin_altivec_stvrx (vsc, signed long, void *);
+ STVRX altivec_stvrx {stvec}
+
+ void __builtin_altivec_stvrxl (vsc, signed long, void *);
+ STVRXL altivec_stvrxl {stvec}
+
+
; VSX builtins.
[vsx]
pure vd __builtin_altivec_lvx_v2df (signed long, const void *);
^ permalink raw reply [flat|nested] 7+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins10)] rs6000: Add Cell builtins
@ 2021-04-26 20:51 William Schmidt
0 siblings, 0 replies; 7+ messages in thread
From: William Schmidt @ 2021-04-26 20:51 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:f34acd4b69e2a71eefafbcee73b9ebb32bc7e9c7
commit f34acd4b69e2a71eefafbcee73b9ebb32bc7e9c7
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Thu Apr 1 14:19:46 2021 -0500
rs6000: Add Cell builtins
2021-04-01 Bill Schmidt <wschmidt@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtin-new.def: Add cell stanza.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 05bff08db36..5609e29affd 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1099,6 +1099,33 @@
VEC_SET_V8HI nothing {set}
+; Cell builtins.
+[cell]
+ pure vsc __builtin_altivec_lvlx (signed long, const void *);
+ LVLX altivec_lvlx {ldvec}
+
+ pure vsc __builtin_altivec_lvlxl (signed long, const void *);
+ LVLXL altivec_lvlxl {ldvec}
+
+ pure vsc __builtin_altivec_lvrx (signed long, const void *);
+ LVRX altivec_lvrx {ldvec}
+
+ pure vsc __builtin_altivec_lvrxl (signed long, const void *);
+ LVRXL altivec_lvrxl {ldvec}
+
+ void __builtin_altivec_stvlx (vsc, signed long, void *);
+ STVLX altivec_stvlx {stvec}
+
+ void __builtin_altivec_stvlxl (vsc, signed long, void *);
+ STVLXL altivec_stvlxl {stvec}
+
+ void __builtin_altivec_stvrx (vsc, signed long, void *);
+ STVRX altivec_stvrx {stvec}
+
+ void __builtin_altivec_stvrxl (vsc, signed long, void *);
+ STVRXL altivec_stvrxl {stvec}
+
+
; VSX builtins.
[vsx]
pure vsq __builtin_altivec_lvx_v1ti (signed long, const void *);
^ permalink raw reply [flat|nested] 7+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins10)] rs6000: Add Cell builtins
@ 2021-04-02 22:11 William Schmidt
0 siblings, 0 replies; 7+ messages in thread
From: William Schmidt @ 2021-04-02 22:11 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:e0ff385d79fefb71b7daad111082307e3cb924b4
commit e0ff385d79fefb71b7daad111082307e3cb924b4
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Thu Apr 1 14:19:46 2021 -0500
rs6000: Add Cell builtins
2021-04-01 Bill Schmidt <wschmidt@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtin-new.def: Add cell stanza.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 05bff08db36..5609e29affd 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1099,6 +1099,33 @@
VEC_SET_V8HI nothing {set}
+; Cell builtins.
+[cell]
+ pure vsc __builtin_altivec_lvlx (signed long, const void *);
+ LVLX altivec_lvlx {ldvec}
+
+ pure vsc __builtin_altivec_lvlxl (signed long, const void *);
+ LVLXL altivec_lvlxl {ldvec}
+
+ pure vsc __builtin_altivec_lvrx (signed long, const void *);
+ LVRX altivec_lvrx {ldvec}
+
+ pure vsc __builtin_altivec_lvrxl (signed long, const void *);
+ LVRXL altivec_lvrxl {ldvec}
+
+ void __builtin_altivec_stvlx (vsc, signed long, void *);
+ STVLX altivec_stvlx {stvec}
+
+ void __builtin_altivec_stvlxl (vsc, signed long, void *);
+ STVLXL altivec_stvlxl {stvec}
+
+ void __builtin_altivec_stvrx (vsc, signed long, void *);
+ STVRX altivec_stvrx {stvec}
+
+ void __builtin_altivec_stvrxl (vsc, signed long, void *);
+ STVRXL altivec_stvrxl {stvec}
+
+
; VSX builtins.
[vsx]
pure vsq __builtin_altivec_lvx_v1ti (signed long, const void *);
^ permalink raw reply [flat|nested] 7+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins10)] rs6000: Add Cell builtins
@ 2021-04-01 19:49 William Schmidt
0 siblings, 0 replies; 7+ messages in thread
From: William Schmidt @ 2021-04-01 19:49 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:c2b96075fe3c03a4ac59ae352786ead671e803e9
commit c2b96075fe3c03a4ac59ae352786ead671e803e9
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Thu Apr 1 14:19:46 2021 -0500
rs6000: Add Cell builtins
2021-04-01 Bill Schmidt <wschmidt@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtin-new.def: Add cell stanza.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 5b2813d8d66..d320d9af700 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1096,6 +1096,33 @@
VEC_SET_V8HI nothing {set}
+; Cell builtins.
+[cell]
+ pure vsc __builtin_altivec_lvlx (signed long, const void *);
+ LVLX altivec_lvlx {ldvec}
+
+ pure vsc __builtin_altivec_lvlxl (signed long, const void *);
+ LVLXL altivec_lvlxl {ldvec}
+
+ pure vsc __builtin_altivec_lvrx (signed long, const void *);
+ LVRX altivec_lvrx {ldvec}
+
+ pure vsc __builtin_altivec_lvrxl (signed long, const void *);
+ LVRXL altivec_lvrxl {ldvec}
+
+ void __builtin_altivec_stvlx (vsc, signed long, void *);
+ STVLX altivec_stvlx {stvec}
+
+ void __builtin_altivec_stvlxl (vsc, signed long, void *);
+ STVLXL altivec_stvlxl {stvec}
+
+ void __builtin_altivec_stvrx (vsc, signed long, void *);
+ STVRX altivec_stvrx {stvec}
+
+ void __builtin_altivec_stvrxl (vsc, signed long, void *);
+ STVRXL altivec_stvrxl {stvec}
+
+
; VSX builtins.
[vsx]
pure vsq __builtin_altivec_lvx_v1ti (signed long, const void *);
^ permalink raw reply [flat|nested] 7+ messages in thread
* [gcc(refs/users/wschmidt/heads/builtins10)] rs6000: Add Cell builtins
@ 2021-03-25 15:47 William Schmidt
0 siblings, 0 replies; 7+ messages in thread
From: William Schmidt @ 2021-03-25 15:47 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:e14a4e249ded341f9e238d0a0cba89e185942e42
commit e14a4e249ded341f9e238d0a0cba89e185942e42
Author: Bill Schmidt <wschmidt@linux.ibm.com>
Date: Wed Mar 24 15:56:55 2021 -0500
rs6000: Add Cell builtins
2021-03-24 Bill Schmidt <wschmidt@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtin-new.def: Add cell stanza.
Diff:
---
gcc/config/rs6000/rs6000-builtin-new.def | 27 +++++++++++++++++++++++++++
1 file changed, 27 insertions(+)
diff --git a/gcc/config/rs6000/rs6000-builtin-new.def b/gcc/config/rs6000/rs6000-builtin-new.def
index 654ce9776e3..62406d68c14 100644
--- a/gcc/config/rs6000/rs6000-builtin-new.def
+++ b/gcc/config/rs6000/rs6000-builtin-new.def
@@ -1096,6 +1096,33 @@
VEC_SET_V8HI nothing {set}
+; Cell builtins.
+[cell]
+ pure vsc __builtin_altivec_lvlx (signed long, const void *);
+ LVLX altivec_lvlx {ldvec}
+
+ pure vsc __builtin_altivec_lvlxl (signed long, const void *);
+ LVLXL altivec_lvlxl {ldvec}
+
+ pure vsc __builtin_altivec_lvrx (signed long, const void *);
+ LVRX altivec_lvrx {ldvec}
+
+ pure vsc __builtin_altivec_lvrxl (signed long, const void *);
+ LVRXL altivec_lvrxl {ldvec}
+
+ void __builtin_altivec_stvlx (vsc, signed long, void *);
+ STVLX altivec_stvlx {stvec}
+
+ void __builtin_altivec_stvlxl (vsc, signed long, void *);
+ STVLXL altivec_stvlxl {stvec}
+
+ void __builtin_altivec_stvrx (vsc, signed long, void *);
+ STVRX altivec_stvrx {stvec}
+
+ void __builtin_altivec_stvrxl (vsc, signed long, void *);
+ STVRXL altivec_stvrxl {stvec}
+
+
; VSX builtins.
[vsx]
pure vsq __builtin_altivec_lvx_v1ti (signed long long, const void *);
^ permalink raw reply [flat|nested] 7+ messages in thread
end of thread, other threads:[~2021-07-29 14:45 UTC | newest]
Thread overview: 7+ messages (download: mbox.gz / follow: Atom feed)
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