[gcc(refs/users/meissner/heads/work066)] Update ChangeLog.meissner.

[gcc(refs/users/meissner/heads/work066)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:b14e91d93004aaebe1466fd388634fb360dbec48

commit b14e91d93004aaebe1466fd388634fb360dbec48
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Sep 1 23:53:58 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-09-01  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 82bbd17b44f..4f0d8c8c9cb 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,9 @@
+work066.patch012:
+2021-09-01  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000.c (xxspltiw_constant_p): Add tests for
+	being able to generate VSPLTISH or VSPLTISW.
+
 work066.patch011:
 2021-08-29  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work066)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:f20c794c02e1efffcccaf5ad80ee9cbb4f2d75a5

commit f20c794c02e1efffcccaf5ad80ee9cbb4f2d75a5
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Sun Aug 29 16:28:27 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-08-29  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 6a015d383c6..82bbd17b44f 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,8 @@
+work066.patch011:
+2021-08-29  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000.opt (-mxxspltiw): Disable by default.
+
 work066.patch010:
 2021-08-28  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work066)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:8ce0e45a708ce1e361509d849350d96dd8c31cdd

commit 8ce0e45a708ce1e361509d849350d96dd8c31cdd
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Sat Aug 28 12:50:15 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-08-28  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
    2021-08-28  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 19 ++++++++++++-------
 gcc/testsuite/ChangeLog.meissner | 14 +++++++-------
 2 files changed, 19 insertions(+), 14 deletions(-)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 7fc39726cd8..6a015d383c6 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,14 +1,19 @@
-work066.patch09:
+work066.patch010:
+2021-08-28  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000.opt (-mlxvkq): Enable by default.
+
+work066.patch009:
 2021-08-25  Michael Meissner  <meissner@linux.ibm.com>
 
 	* config/rs6000/rs6000.c (xxspltiw_constant_p): Fix typo.
 
-work066.patch08:
+work066.patch008:
 2021-08-25  Michael Meissner  <meissner@linux.ibm.com>
 
 	* config/rs6000/rs6000.opt (-mlxvkq): Disable by default.
 
-work066.patch07:
+work066.patch007:
 2021-08-25  Michael Meissner  <meissner@linux.ibm.com>
 
 	* config/rs6000/constraint.md (eD): New constraint.
@@ -39,7 +44,7 @@ work066.patch07:
 	(xxsplti32dx_<mode>_first): New insn.
 	(xxsplti32dx_<mode>_second): New insn.
 
-work066.patch05:
+work066.patch005:
 2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
 
 	* config/rs6000/constraints.md (eW): New constraint.
@@ -64,7 +69,7 @@ work066.patch05:
 	(vsx_splat_v4si_xxspltiw): New insn.
 	(vsx_splat_v4sf_xxspltiw): New insn.
 
-work066.patch04:
+work066.patch004:
 2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
 
 	* config/rs6000/constraints.md (eQ): New constraint.
@@ -81,7 +86,7 @@ work066.patch04:
 	LXVKQ.
 	(vsx_mov<mode>_32bit): Likewise.
 
-work066.patch03:
+work066.patch003:
 2021-08-18  Michael Meissner  <meissner@linux.ibm.com>
 
 	* config/rs6000/constraints.md (eF): New constraint.
@@ -112,7 +117,7 @@ work066.patch03:
 	(xxspltidp_<mode>_inst): Replace xxspltidp_v2df_inst with an
 	iterated form that also does SFmode, and DFmode.
 
-work066.patch02:
+work066.patch002:
 2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
 
 	* config/rs6000/vsx.md (UNSPEC_XXSPLTIDP): Rename from
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index 7d435248a5c..89ce84ce72a 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,9 +1,9 @@
-work066.patch08:
+work066.patch008:
 2021-08-25  Michael Meissner  <meissner@linux.ibm.com>
 
 	* gcc.target/powerpc/float128-constant.c: Add -mlxvkq option.
 
-work066.patch07:
+work066.patch007:
 2021-08-25  Michael Meissner  <meissner@linux.ibm.com>
 
 	* gcc.target/powerpc/pr86731-fwrapv-longlong.c: Update insn
@@ -13,13 +13,13 @@ work066.patch07:
 	* gcc.target/powerpc/vec-splat-constant-df.c: Likewise.
 	* gcc.target/powerpc/vec-splat-constant-v2df.c: Likewise.
 
-work066.patch06:
+work066.patch006:
 2021-08-25  Michael Meissner  <meissner@linux.ibm.com>
 
 	* gcc.target/powerpc/float128-call.c: Fix test for IEEE 128-bit
 	long double and power10.
 
-work066.patch05:
+work066.patch005:
 2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
 
 	* gcc.target/powerpc/vec-splat-constant-v16qi.c: New test.
@@ -28,19 +28,19 @@ work066.patch05:
 	* gcc.target/powerpc/vec-splat-constant-v8hi.c: New test.
 	* gcc.target/powerpc/vec-splati-runnable.c: Update insn counts.
 
-work066.patch04:
+work066.patch004:
 2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
 
 	* gcc.target/powerpc/float128-constant.c: New test.
 
-work066.patch03:
+work066.patch003:
 2021-08-18  Michael Meissner  <meissner@linux.ibm.com>
 
 	* gcc.target/powerpc/vec-splat-constant-sf.c: New test.
 	* gcc.target/powerpc/vec-splat-constant-df.c: New test.
 	* gcc.target/powerpc/vec-splat-constant-v2df.c: New test.
 
-work066.patch01:
+work066.patch001:
 2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
 
 	PR target/94630

[gcc(refs/users/meissner/heads/work066)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:2ac7ec6174d78fcbc23da6d1aebb4113cb8ae939

commit 2ac7ec6174d78fcbc23da6d1aebb4113cb8ae939
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Sat Aug 28 12:45:02 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-08-28  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 733b999a6d3..7fc39726cd8 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,8 @@
+work066.patch09:
+2021-08-25  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000.c (xxspltiw_constant_p): Fix typo.
+
 work066.patch08:
 2021-08-25  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work066)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:3e059d04da18e08250b01a6105e82a95f404d0f6

commit 3e059d04da18e08250b01a6105e82a95f404d0f6
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Aug 26 00:24:47 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-08-26  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
    2021-08-26  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 5 +++++
 gcc/testsuite/ChangeLog.meissner | 5 +++++
 2 files changed, 10 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index ca117483f2d..733b999a6d3 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,8 @@
+work066.patch08:
+2021-08-25  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/rs6000.opt (-mlxvkq): Disable by default.
+
 work066.patch07:
 2021-08-25  Michael Meissner  <meissner@linux.ibm.com>
 
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index 487c6302995..7d435248a5c 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,8 @@
+work066.patch08:
+2021-08-25  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/float128-constant.c: Add -mlxvkq option.
+
 work066.patch07:
 2021-08-25  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work066)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:fc51fca760eebbad78567565e8b2e88b67d18557

commit fc51fca760eebbad78567565e8b2e88b67d18557
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Thu Aug 26 00:18:41 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-08-26  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
    2021-08-26  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 31 +++++++++++++++++++++++++++++++
 gcc/testsuite/ChangeLog.meissner | 10 ++++++++++
 2 files changed, 41 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index fc88d8119c1..ca117483f2d 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,34 @@
+work066.patch07:
+2021-08-25  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/constraint.md (eD): New constraint.
+	* config/rs6000/predicates.md (easy_fp_constant): If the constant
+	can be loaded with XXSPLTI32DX, it is easy.
+	(xxsplti32dx_operand): New predicate.
+	(easy_vector_constant): If the constant can be loaded with
+	XXSPLTI32DX, it is easy.
+	* config/rs6000/rs6000-protos.h (xxsplti32dx_constant_p): New
+	declaration.
+	* config/rs6000/rs6000.c (xxsplti32dx_constant_float_p): New
+	helper function.
+	(xxsplti32dx_constant_p): New function.
+	(output_vec_const_move): If the operand can be loaded with
+	XXSPLTI32DX, split it.
+	(prefixed_permute_p): Constants loaded with XXSPLTI32DX are
+	prefixed.
+	* config/rs6000/rs6000.md (movsf_hardfloat): Add support for
+	constants loaded with XXSPLTI32DX.
+	(mov<mode>_hardfloat32, FMOVE64 iterator):  Add support for
+	constants loaded with XXSPLTI32DX.
+	(mov<mode>_hardfloat64, FMOVE64 iterator):  Add support for
+	constants loaded with XXSPLTI32DX.
+	* config/rs6000/rs6000.opt (-mxxsplti32dx): New option.
+	* config/rs6000/vsx.md (UNSPEC_XXSPLTI32DX_CONST): New unspec.
+	(XXSPLTI32DX): New mode iterator.
+	(xxsplti32dx_<mode>): New insn and splitter for XXSPLTI32DX.
+	(xxsplti32dx_<mode>_first): New insn.
+	(xxsplti32dx_<mode>_second): New insn.
+
 work066.patch05:
 2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
 
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index bc614dc79c7..487c6302995 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,13 @@
+work066.patch07:
+2021-08-25  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/pr86731-fwrapv-longlong.c: Update insn
+	count.
+	* gcc.target/powerpc/vec-splat-constant-sf.c: Update insn count.
+	Add -mxxsplti32dx option.
+	* gcc.target/powerpc/vec-splat-constant-df.c: Likewise.
+	* gcc.target/powerpc/vec-splat-constant-v2df.c: Likewise.
+
 work066.patch06:
 2021-08-25  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work066)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:98309845f1f9228010820ae5ff0927df13f97cb3

commit 98309845f1f9228010820ae5ff0927df13f97cb3
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Aug 25 00:36:03 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/testsuite/
    2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/testsuite/ChangeLog.meissner | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index 1730bca7662..bc614dc79c7 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,5 +1,5 @@
 work066.patch06:
-2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
+2021-08-25  Michael Meissner  <meissner@linux.ibm.com>
 
 	* gcc.target/powerpc/float128-call.c: Fix test for IEEE 128-bit
 	long double and power10.

[gcc(refs/users/meissner/heads/work066)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:dc864974be1a4271f0b190154e177180c78cc67c

commit dc864974be1a4271f0b190154e177180c78cc67c
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Wed Aug 25 00:32:53 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/testsuite/
    2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/testsuite/ChangeLog.meissner | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index e3b8d917531..1730bca7662 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,9 @@
+work066.patch06:
+2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/float128-call.c: Fix test for IEEE 128-bit
+	long double and power10.
+
 work066.patch05:
 2021-08-24  Michael Meissner  <meissner@linux.ibm.com>

[gcc(refs/users/meissner/heads/work066)] Update ChangeLog.meissner.

[Michael Meissner]

https://gcc.gnu.org/g:b327026029bf6ba347583d610113110a5a7de177

commit b327026029bf6ba347583d610113110a5a7de177
Author: Michael Meissner <meissner@linux.ibm.com>
Date:   Tue Aug 24 21:15:40 2021 -0400

    Update ChangeLog.meissner.
    
    gcc/
    2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.
    
    gcc/testsuite/
    2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
    
            * ChangeLog.meissner: Update.

Diff:
---
 gcc/ChangeLog.meissner           | 92 ++++++++++++++++++++++++++++++++++++++++
 gcc/testsuite/ChangeLog.meissner | 37 ++++++++++++++++
 2 files changed, 129 insertions(+)

diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index 0190e13c736..fc88d8119c1 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,95 @@
+work066.patch05:
+2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/constraints.md (eW): New constraint.
+	* config/rs6000/predicates.md (xxspltiw_operand): New predicate.
+	(easy_vector_constant): If we can use XXSPLTIW, the vector
+	constant is easy.
+	* config/rs6000/rs6000-protos.h (xxspltiw_constant_p): New
+	declaration.
+	* config/rs6000/rs6000.c (xxspltib_constant_p): If we can generate
+	XXSPLTIW, don't generate a XXSPLTIB and an extend instruction.
+	(const_vector_all_elements_equal_p): New function.
+	(xxspltiw_constant_p): New function.
+	(output_vec_const_move): Add support for loading up vector
+	constants with XXSPLTIW.
+	(prefixed_permute_p): Recognize xxspltiw instructions as
+	prefixed.
+	* config/rs6000/rs6000.opt (-mxxspltiw): New debug switch.
+	* config/rs6000/vsx.md (vsx_mov<mode>_64bit): Add support for
+	constants loaded with XXSPLTIW.
+	(vsx_mov<mode>_32bit): Likewise.
+	(vsx_splat_v8hi_xxspltiw): New insn.
+	(vsx_splat_v4si_xxspltiw): New insn.
+	(vsx_splat_v4sf_xxspltiw): New insn.
+
+work066.patch04:
+2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/constraints.md (eQ): New constraint.
+	* config/rs6000/predicates.md (easy_fp_constant): If we can use
+	LXVKQ, it is an easy floating point constant.
+	(lxvkq_operand): New predicate.
+	* config/rs6000/rs6000-protos.h (lxvkq_constant_p): New
+	declaration.
+	* config/rs6000/rs6000.c (lxvkq_constant_p): New function.
+	(output_vec_const_move): Add support for LXVKQ.
+	(rs6000_output_move_128bit): Likewise.
+	* config/rs6000/rs6000.opt (-mlxvkq): New debug option.
+	* config/rs6000/vsx.md (vsx_mov<mode>_64bit): Add support for
+	LXVKQ.
+	(vsx_mov<mode>_32bit): Likewise.
+
+work066.patch03:
+2021-08-18  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/constraints.md (eF): New constraint.
+	* config/rs6000/predicates.md (easy_fp_constant): If we can load
+	the scalar constant with XXSPLTIDP, the floating point constant is
+	easy.
+	(xxspltidp_operand): New predicate.
+	(easy_vector_constant): If we can generate XXSPLTIDP, mark the
+	vector constant as easy.
+	* config/rs6000/rs6000-protos.h (xxspltidp_constant_p): New
+	declaration.
+	(prefixed_permute_p): Likewise.
+	* config/rs6000/rs6000.c (xxspltidp_constant_p): New function.
+	(output_vec_const_move): Add support for XXSPLTIDP.
+	(prefixed_permute_p): New function.
+	* config/rs6000/rs6000.md (prefixed attribute): Add support for
+	permute prefixed instructions.
+	(movsf_hardfloat): Add XXSPLTIDP support.
+	(mov<mode>_hardfloat32, FMOVE64 iterator): Likewise.
+	(mov<mode>_hardfloat64, FMOVE64 iterator): Likewise.
+	* config/rs6000/rs6000.opt (-mxxspltidp): New switch.
+	* config/rs6000/vsx.md (vsx_move<mode>_64bit): Add XXSPLTIDP
+	support.
+	(vsx_move<mode>_32bit): Likewise.
+	(vsx_splat_v2df_xxspltidp): New insn.
+	(XXSPLTIDP): New mode iterator.
+	(xxspltidp_<mode>_internal): New insn and splits.
+	(xxspltidp_<mode>_inst): Replace xxspltidp_v2df_inst with an
+	iterated form that also does SFmode, and DFmode.
+
+work066.patch02:
+2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
+
+	* config/rs6000/vsx.md (UNSPEC_XXSPLTIDP): Rename from
+	UNSPEC_XXSPLTID.
+	(xxspltiw_v4si): Use vecperm type attribute.
+	(xxspltiw_v4si_inst): Use vecperm type attribute.
+	(xxspltiw_v4sf_inst): Likewise.
+	(xxspltidp_v2df): Use vecperm type attribute.  Use
+	UUNSPEC_XXSPLTIDP instead of UNSPEC_XXSPLTID.
+	(xxspltidp_v2df_inst): Likewise.
+	(xxsplti32dx_v4si): Use vecperm type attribute.
+	(xxsplti32dx_v4si_inst): Likewise.
+	(xxsplti32dx_v4sf_inst): Likewise.
+	(xxblend_<mode>): Likewise.
+	(xxpermx): Likewise.
+	(xxpermx_inst): Likewise.
+	(xxeval): Likewise.
+
 2021-08-24   Michael Meissner  <meissner@linux.ibm.com>
 
 	Clone branch
diff --git a/gcc/testsuite/ChangeLog.meissner b/gcc/testsuite/ChangeLog.meissner
index 0190e13c736..e3b8d917531 100644
--- a/gcc/testsuite/ChangeLog.meissner
+++ b/gcc/testsuite/ChangeLog.meissner
@@ -1,3 +1,40 @@
+work066.patch05:
+2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/vec-splat-constant-v16qi.c: New test.
+	* gcc.target/powerpc/vec-splat-constant-v4sf.c: New test.
+	* gcc.target/powerpc/vec-splat-constant-v4si.c: New test.
+	* gcc.target/powerpc/vec-splat-constant-v8hi.c: New test.
+	* gcc.target/powerpc/vec-splati-runnable.c: Update insn counts.
+
+work066.patch04:
+2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/float128-constant.c: New test.
+
+work066.patch03:
+2021-08-18  Michael Meissner  <meissner@linux.ibm.com>
+
+	* gcc.target/powerpc/vec-splat-constant-sf.c: New test.
+	* gcc.target/powerpc/vec-splat-constant-df.c: New test.
+	* gcc.target/powerpc/vec-splat-constant-v2df.c: New test.
+
+work066.patch01:
+2021-08-24  Michael Meissner  <meissner@linux.ibm.com>
+
+	PR target/94630
+	* gcc.target/powerpc/pr70117.c: Specify that we need the long double
+	type to be IBM 128-bit.  Remove the code to use __ibm128.
+	* c-c++-common/dfp/convert-bfp-11.c: Specify that we need the long
+	double type to be IBM 128-bit.  Run the test at -O2 optimization.
+	* lib/target-supports.exp (add_options_for_long_double_ibm128): New
+	function.
+	(check_effective_target_long_double_ibm128): New function.
+	(add_options_for_long_double_ieee128): New function.
+	(check_effective_target_long_double_ieee128): New function.
+	(add_options_for_long_double_64bit): New function.
+	(check_effective_target_long_double_64bit): New function.
+
 2021-08-24   Michael Meissner  <meissner@linux.ibm.com>
 
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