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* [gcc(refs/users/meissner/heads/work076)] Mark XXSPLTIW/XXSPLTIDP as prefixed -- PR 104136
@ 2022-01-21 15:36 Michael Meissner
0 siblings, 0 replies; 3+ messages in thread
From: Michael Meissner @ 2022-01-21 15:36 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:b6ea0f9e58d503d20bb6adb223f13d4005c91020
commit b6ea0f9e58d503d20bb6adb223f13d4005c91020
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jan 21 10:36:17 2022 -0500
Mark XXSPLTIW/XXSPLTIDP as prefixed -- PR 104136
If you compile module_advect_em.F90 with -Ofast -mcpu=power10, one module
is large enough that we can't use a single conditional jump to span the
function. Instead, GCC has to reverse the condition, and do a conditional
jump around an unconditional branch. It turns out when xxspltiw and
xxspltdp instructions were generated, they were not marked as being
prefixed (i.e. length of 12 bytes instead of 4 bytes). This meant the
calculations for the branch length were off, which in turn meant the
assembler raised an error because it couldn't do the conditional jump.
The fix is to explicitly set the prefixed attribute when we are loading up
vector constants with the xxspltiw or xxspltidp instructions.
I have removed the code that sets the prefixed attribute for xxspltiw,
xxspltidp, and xxsplti32dx instructions, since it no longer will be invoked.
I have also added explicitly setting the prefixed attribute for load SF and DF
mode constants with xxsplitw and xxspltidp.
gcc/
2022-01-21 Michael Meissner <meissner@the-meissners.org>
PR target/104136
* config/rs6000/rs6000-protos.h (prefixed_xxsplti_p): Delete.
* config/rs6000/rs6000.cc (prefixed_xxsplti_p): Delete.
* config/rs6000/rs6000.md (prefixed attribute): Delete section
that sets the prefixed attribute for xxspltiw, xxspltidp, and
xxsplti32dx instructions.
(movsf_hardfloat): Explicitly set the prefixed attribute
when xxspltiw and xxspltidp instructions are generated.
(mov<mode>_hardfloat32): Likewise.
(mov<mode>_hardfloat64): Likewise.
* config/rs6000/vsx.md (vsx_mov<mode>_64bit): Explicitly set the
prefixed attribute for xxspltiw and xxspltidp instructions.
(vsx_mov<mode>_32bit): Likewise.
Diff:
---
gcc/config/rs6000/rs6000-protos.h | 1 -
gcc/config/rs6000/rs6000.cc | 38 --------------------------------------
gcc/config/rs6000/rs6000.md | 24 ++++++++++++++++--------
gcc/config/rs6000/vsx.md | 12 +++++++++++-
4 files changed, 27 insertions(+), 48 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-protos.h b/gcc/config/rs6000/rs6000-protos.h
index e322ac0c199..3ea01023609 100644
--- a/gcc/config/rs6000/rs6000-protos.h
+++ b/gcc/config/rs6000/rs6000-protos.h
@@ -199,7 +199,6 @@ enum non_prefixed_form reg_to_non_prefixed (rtx reg, machine_mode mode);
extern bool prefixed_load_p (rtx_insn *);
extern bool prefixed_store_p (rtx_insn *);
extern bool prefixed_paddi_p (rtx_insn *);
-extern bool prefixed_xxsplti_p (rtx_insn *);
extern void rs6000_asm_output_opcode (FILE *);
extern void output_pcrel_opt_reloc (rtx);
extern void rs6000_final_prescan_insn (rtx_insn *, rtx [], int);
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index b34962da27d..7b8a3b5299a 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -26617,44 +26617,6 @@ prefixed_paddi_p (rtx_insn *insn)
return (iform == INSN_FORM_PCREL_EXTERNAL || iform == INSN_FORM_PCREL_LOCAL);
}
-/* Whether an instruction is a prefixed XXSPLTI* instruction. This is called
- from the prefixed attribute processing. */
-
-bool
-prefixed_xxsplti_p (rtx_insn *insn)
-{
- rtx set = single_set (insn);
- if (!set)
- return false;
-
- rtx dest = SET_DEST (set);
- rtx src = SET_SRC (set);
- machine_mode mode = GET_MODE (dest);
-
- if (!REG_P (dest) && !SUBREG_P (dest))
- return false;
-
- if (GET_CODE (src) == UNSPEC)
- {
- int unspec = XINT (src, 1);
- return (unspec == UNSPEC_XXSPLTIW
- || unspec == UNSPEC_XXSPLTIDP
- || unspec == UNSPEC_XXSPLTI32DX);
- }
-
- vec_const_128bit_type vsx_const;
- if (vec_const_128bit_to_bytes (src, mode, &vsx_const))
- {
- if (constant_generates_xxspltiw (&vsx_const))
- return true;
-
- if (constant_generates_xxspltidp (&vsx_const))
- return true;
- }
-
- return false;
-}
-
/* Whether the next instruction needs a 'p' prefix issued before the
instruction is printed out. */
static bool prepend_p_to_next_insn;
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 59531b6d07e..4e221189028 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -314,11 +314,6 @@
(eq_attr "type" "integer,add")
(if_then_else (match_test "prefixed_paddi_p (insn)")
- (const_string "yes")
- (const_string "no"))
-
- (eq_attr "type" "vecperm")
- (if_then_else (match_test "prefixed_xxsplti_p (insn)")
(const_string "yes")
(const_string "no"))]
@@ -7857,7 +7852,11 @@
(set_attr "isa"
"*, *, p9v, p8v, *, p9v,
p8v, *, *, *, *, *,
- *, *, *, *, p10")])
+ *, *, *, *, p10")
+ (set_attr "prefixed"
+ "*, *, *, *, *, *,
+ *, *, *, *, *, *,
+ *, *, *, *, yes")])
;; LWZ LFIWZX STW STFIWX MTVSRWZ MFVSRWZ
;; FMR MR MT%0 MF%1 NOP
@@ -8159,7 +8158,11 @@
(set_attr "isa"
"*, *, *, p9v, p9v,
p7v, p7v, *, *, *,
- *, *, *, p10")])
+ *, *, *, p10")
+ (set_attr "prefixed"
+ "*, *, *, *, *,
+ *, *, *, *, *,
+ *, *, *, yes")])
;; STW LWZ MR G-const H-const F-const
@@ -8232,7 +8235,12 @@
"*, *, *, p9v, p9v,
p7v, p7v, *, *, *,
*, *, *, *, *,
- *, p8v, p8v, p10")])
+ *, p8v, p8v, p10")
+ (set_attr "prefixed"
+ "*, *, *, *, *,
+ *, *, *, *, *,
+ *, *, *, *, *,
+ *, *, *, *")])
;; STD LD MR MT<SPR> MF<SPR> G-const
;; H-const F-const Special
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index e84ffb6a6db..c8c891e13f4 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -1237,7 +1237,12 @@
"<VSisa>, <VSisa>, <VSisa>, *, *, *,
*, *, *, *, p9v, *,
p10, p10,
- <VSisa>, *, *, *, *")])
+ <VSisa>, *, *, *, *")
+ (set_attr "prefixed"
+ "*, *, *, *, *, *,
+ *, *, *, *, *, *,
+ *, yes,
+ *, *, *, *, *")])
;; VSX store VSX load VSX move GPR load GPR store GPR move
;; LXVKQ XXSPLTI*
@@ -1276,6 +1281,11 @@
"<VSisa>, <VSisa>, <VSisa>, *, *, *,
p10, p10,
p9v, *, <VSisa>, *, *,
+ *, *")
+ (set_attr "prefixed"
+ "*, *, *, *, *, *,
+ *, yes,
+ *, *, *, *, *,
*, *")])
;; Explicit load/store expanders for the builtin functions
^ permalink raw reply [flat|nested] 3+ messages in thread
* [gcc(refs/users/meissner/heads/work076)] Mark XXSPLTIW/XXSPLTIDP as prefixed -- PR 104136
@ 2022-01-20 19:43 Michael Meissner
0 siblings, 0 replies; 3+ messages in thread
From: Michael Meissner @ 2022-01-20 19:43 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:32714598c49395b189e524e4d79dcccf3dd8fdc4
commit 32714598c49395b189e524e4d79dcccf3dd8fdc4
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jan 20 14:42:46 2022 -0500
Mark XXSPLTIW/XXSPLTIDP as prefixed -- PR 104136
If you compile module_advect_em.F90 with -Ofast -mcpu=power10, one module
is large enough that we can't use a single conditional jump to span the
function. Instead, GCC has to reverse the condition, and do a conditional
jump around an unconditional branch. It turns out when xxspltiw and
xxspltdp instructions were generated, they were not marked as being
prefixed (i.e. length of 12 bytes instead of 4 bytes). This meant the
calculations for the branch length were off, which in turn meant the
assembler raised an error because it couldn't do the conditional jump.
The fix is to explicitly set the prefixed attribute when we are loading up
vector constants with the xxspltiw or xxspltidp instructions.
gcc/
2022-01-20 Michael Meissner <meissner@the-meissners.org>
PR target/104136
* gcc/config/vsx.md (vsx_mov<mode>_64bit): Explicitly set the
prefixed attribute for xxspltiw and xxspltidp instructions.
(vsx_mov<mode>_32bit): Likewise.
Diff:
---
gcc/config/rs6000/vsx.md | 12 +++++++++++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/gcc/config/rs6000/vsx.md b/gcc/config/rs6000/vsx.md
index e84ffb6a6db..c8c891e13f4 100644
--- a/gcc/config/rs6000/vsx.md
+++ b/gcc/config/rs6000/vsx.md
@@ -1237,7 +1237,12 @@
"<VSisa>, <VSisa>, <VSisa>, *, *, *,
*, *, *, *, p9v, *,
p10, p10,
- <VSisa>, *, *, *, *")])
+ <VSisa>, *, *, *, *")
+ (set_attr "prefixed"
+ "*, *, *, *, *, *,
+ *, *, *, *, *, *,
+ *, yes,
+ *, *, *, *, *")])
;; VSX store VSX load VSX move GPR load GPR store GPR move
;; LXVKQ XXSPLTI*
@@ -1276,6 +1281,11 @@
"<VSisa>, <VSisa>, <VSisa>, *, *, *,
p10, p10,
p9v, *, <VSisa>, *, *,
+ *, *")
+ (set_attr "prefixed"
+ "*, *, *, *, *, *,
+ *, yes,
+ *, *, *, *, *,
*, *")])
;; Explicit load/store expanders for the builtin functions
^ permalink raw reply [flat|nested] 3+ messages in thread
* [gcc(refs/users/meissner/heads/work076)] Mark XXSPLTIW/XXSPLTIDP as prefixed -- PR 104136
@ 2022-01-20 17:34 Michael Meissner
0 siblings, 0 replies; 3+ messages in thread
From: Michael Meissner @ 2022-01-20 17:34 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:dbee915ddc37748eb020ca40d70853147b71f861
commit dbee915ddc37748eb020ca40d70853147b71f861
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jan 20 12:34:26 2022 -0500
Mark XXSPLTIW/XXSPLTIDP as prefixed -- PR 104136
If you compile module_advect_em.F90 with -Ofast -mcpu=power10, one module
is large enough that we can't use a single conditional jump to span the
function. Instead, we have to reverse the condition, and do a conditional
jump around an unconditional branch. It turns out when xxspltiw and
xxspltdp instructions were generated, they were not marked as being
prefixed (i.e. length of 12 bytes instead of 4 bytes). This meant the
calculations for the branch length were off, which in turn meant the
assembler raised an error because it couldn't do the conditional jump.
The fix is to set the maybe_prefixed attribute so that insns with the type
'vecperm' might be prefixed. Then in the code that optionally puts a 'p'
in front of the insn skip doing so for the permutes (i.e. load constant
with splat instruction).
gcc/
2022-01-20 Michael Meissner <meissner@linux.ibm.com>
PR target/104136
* config/rs6000/rs6000.cc (rs6000_final_prescan_insn): Do not
prepend a 'p' for xxspltiw and xxspltidp.
* config/rs6000/rs6000.md (maybe_prefixed): Indicate that vector
permute instructions might be prefixed.
Diff:
---
gcc/config/rs6000/rs6000.cc | 7 +++++--
gcc/config/rs6000/rs6000.md | 2 +-
2 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 0882ecbaebf..81a4ede0e8e 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -26653,7 +26653,9 @@ static bool prepend_p_to_next_insn;
/* Define FINAL_PRESCAN_INSN if some processing needs to be done before
outputting the assembler code. On the PowerPC, we remember if the current
- insn is a prefixed insn where we need to emit a 'p' before the insn.
+ insn is a prefixed insn where we need to emit a 'p' before the insn. We do
+ not do this for permute type operations (such as XXSPLTIW or XXSPLTIDP),
+ since those operations do not have a non-prefixed format.
In addition, if the insn is part of a PC-relative reference to an external
label optimization, this is recorded also. */
@@ -26662,7 +26664,8 @@ rs6000_final_prescan_insn (rtx_insn *insn, rtx [], int)
{
prepend_p_to_next_insn = (get_attr_maybe_prefixed (insn)
== MAYBE_PREFIXED_YES
- && get_attr_prefixed (insn) == PREFIXED_YES);
+ && get_attr_prefixed (insn) == PREFIXED_YES
+ && get_attr_type (insn) != TYPE_VECPERM);
return;
}
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index 59531b6d07e..890edfc5318 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -287,7 +287,7 @@
;; Whether this insn has a prefixed form and a non-prefixed form.
(define_attr "maybe_prefixed" "no,yes"
(if_then_else (eq_attr "type" "load,fpload,vecload,store,fpstore,vecstore,
- integer,add")
+ integer,add,vecperm")
(const_string "yes")
(const_string "no")))
^ permalink raw reply [flat|nested] 3+ messages in thread
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2022-01-20 19:43 Michael Meissner
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