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* [gcc(refs/users/meissner/heads/work093)] Overload IEEE 128-bit extract and insert support.
@ 2022-06-30 19:21 Michael Meissner
0 siblings, 0 replies; 4+ messages in thread
From: Michael Meissner @ 2022-06-30 19:21 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:c22d66bfe9ee3258766682cf337ee232c7803a2f
commit c22d66bfe9ee3258766682cf337ee232c7803a2f
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jun 30 15:20:29 2022 -0400
Overload IEEE 128-bit extract and insert support.
2022-06-30 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Remove
converting KFmode IEEE insert and extract built-in functions to
TFmode insert and extract built-in functions when long double is
IEEE 128-bit.
* config/rs6000/rs6000-builtins.def
(__builtin_vsx_scalar_extract_expq_kf): Rename KFmode IEEE 128-bit
insert and extract built-in functions to have a KF suffix to allow
overloading.
(__builtin_vsx_scalar_extract_sigq_kf): Likewise.
(__builtin_vsx_scalar_insert_exp_qp_kf): Likewise.
(__builtin_vsx_scalar_extract_expq_tf): Add TFmode variants for
IEEE 128-bit insert and extract support.
(__builtin_vsx_scalar_extract_sigq_tf): Likewise.
(__builtin_vsx_scalar_insert_exp_qp_tf): Likewise.
* config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
Add support for having KFmode and TFmode variants of VSIEQPF.
* config/rs6000/rs6000-overload.def
(__builtin_vec_scalar_extract_exp): Add TFmode overloads.
(__builtin_vec_scalar_extract_sig): Likewise.
(__builtin_vec_scalar_insert_exp): Likewise.
Diff:
---
gcc/config/rs6000/rs6000-builtin.cc | 9 ---------
gcc/config/rs6000/rs6000-builtins.def | 26 +++++++++++++++++++-------
gcc/config/rs6000/rs6000-c.cc | 10 ++++++----
gcc/config/rs6000/rs6000-overload.def | 12 +++++++++---
4 files changed, 34 insertions(+), 23 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index 2e346d24db6..49a4e6ed7b4 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -3318,21 +3318,12 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
if (FLOAT128_IEEE_P (TFmode))
switch (icode)
{
- case CODE_FOR_xsxexpqp_kf:
- icode = CODE_FOR_xsxexpqp_tf;
- break;
- case CODE_FOR_xsxsigqp_kf:
- icode = CODE_FOR_xsxsigqp_tf;
- break;
case CODE_FOR_xststdcnegqp_kf:
icode = CODE_FOR_xststdcnegqp_tf;
break;
case CODE_FOR_xsiexpqp_kf:
icode = CODE_FOR_xsiexpqp_tf;
break;
- case CODE_FOR_xsiexpqpf_kf:
- icode = CODE_FOR_xsiexpqpf_tf;
- break;
case CODE_FOR_xststdcqp_kf:
icode = CODE_FOR_xststdcqp_tf;
break;
diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index e96b89c449b..277d9e2f159 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -2902,19 +2902,21 @@
fpmath double __builtin_truncf128_round_to_odd_kf (_Float128);
TRUNCF128_ODD_KF trunckfdf2_odd {}
- const signed long long __builtin_vsx_scalar_extract_expq (_Float128);
- VSEEQP xsxexpqp_kf {}
+ const signed long long __builtin_vsx_scalar_extract_expq_kf (_Float128);
+ VSEEQP_KF xsxexpqp_kf {}
- const signed __int128 __builtin_vsx_scalar_extract_sigq (_Float128);
- VSESQP xsxsigqp_kf {}
+ const signed __int128 __builtin_vsx_scalar_extract_sigq_kf (_Float128);
+ VSESQP_KF xsxsigqp_kf {}
+; Note we cannot overload this function since it does not have KFmode
+; or TFmode arguments.
const _Float128 __builtin_vsx_scalar_insert_exp_q (unsigned __int128, \
unsigned long long);
VSIEQP xsiexpqp_kf {}
- const _Float128 __builtin_vsx_scalar_insert_exp_qp (_Float128, \
- unsigned long long);
- VSIEQPF xsiexpqpf_kf {}
+ const _Float128 __builtin_vsx_scalar_insert_exp_qp_kf (_Float128, \
+ unsigned long long);
+ VSIEQPF_KF xsiexpqpf_kf {}
const signed int __builtin_vsx_scalar_test_data_class_qp (_Float128, \
const int<7>);
@@ -2968,6 +2970,16 @@
fpmath double __builtin_truncf128_round_to_odd_tf (long double);
TRUNCF128_ODD_TF trunctfdf2_odd {ieeeld}
+ const signed long long __builtin_vsx_scalar_extract_expq_tf (long double);
+ VSEEQP_TF xsxexpqp_tf {ieeeld}
+
+ const signed __int128 __builtin_vsx_scalar_extract_sigq_tf (long double);
+ VSESQP_TF xsxsigqp_tf {ieeeld}
+
+ const long double __builtin_vsx_scalar_insert_exp_qp_tf (_Float128, \
+ unsigned long long);
+ VSIEQPF_TF xsiexpqpf_tf {}
+
; Decimal floating-point builtins.
[dfp]
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index 155233bfbcc..b9d3aa06e40 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -1939,11 +1939,13 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
128-bit variant of built-in function. */
if (GET_MODE_PRECISION (arg1_mode) > 64)
{
- /* If first argument is of float variety, choose variant
- that expects __ieee128 argument. Otherwise, expect
- __int128 argument. */
+ /* If first argument is of float variety, choose variant that
+ expects _Float128 argument (or long double if long doubles are
+ IEEE 128-bit). Otherwise, expect __int128 argument. */
if (GET_MODE_CLASS (arg1_mode) == MODE_FLOAT)
- instance_code = RS6000_BIF_VSIEQPF;
+ instance_code = ((arg1_mode == TFmode)
+ ? RS6000_BIF_VSIEQPF_TF
+ : RS6000_BIF_VSIEQPF_KF);
else
instance_code = RS6000_BIF_VSIEQP;
}
diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def
index 511a3821d5b..546883ece19 100644
--- a/gcc/config/rs6000/rs6000-overload.def
+++ b/gcc/config/rs6000/rs6000-overload.def
@@ -4506,13 +4506,17 @@
unsigned int __builtin_vec_scalar_extract_exp (double);
VSEEDP
unsigned int __builtin_vec_scalar_extract_exp (_Float128);
- VSEEQP
+ VSEEQP_KF
+ unsigned int __builtin_vec_scalar_extract_exp (long double);
+ VSEEQP_TF
[VEC_VSES, scalar_extract_sig, __builtin_vec_scalar_extract_sig]
unsigned long long __builtin_vec_scalar_extract_sig (double);
VSESDP
unsigned __int128 __builtin_vec_scalar_extract_sig (_Float128);
- VSESQP
+ VSESQP_KF
+ unsigned __int128 __builtin_vec_scalar_extract_sig (long double);
+ VSESQP_TF
[VEC_VSIE, scalar_insert_exp, __builtin_vec_scalar_insert_exp]
double __builtin_vec_scalar_insert_exp (unsigned long long, unsigned long long);
@@ -4522,7 +4526,9 @@
_Float128 __builtin_vec_scalar_insert_exp (unsigned __int128, unsigned long long);
VSIEQP
_Float128 __builtin_vec_scalar_insert_exp (_Float128, unsigned long long);
- VSIEQPF
+ VSIEQPF_KF
+ long double __builtin_vec_scalar_insert_exp (long double, unsigned long long);
+ VSIEQPF_TF
[VEC_VSTDC, scalar_test_data_class, __builtin_vec_scalar_test_data_class]
unsigned int __builtin_vec_scalar_test_data_class (float, const int);
^ permalink raw reply [flat|nested] 4+ messages in thread
* [gcc(refs/users/meissner/heads/work093)] Overload IEEE 128-bit extract and insert support.
@ 2022-07-01 7:10 Michael Meissner
0 siblings, 0 replies; 4+ messages in thread
From: Michael Meissner @ 2022-07-01 7:10 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:4ae6f2e676a3c7b5a1342b9b9f768dcfe71c5f4d
commit 4ae6f2e676a3c7b5a1342b9b9f768dcfe71c5f4d
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 1 03:10:40 2022 -0400
Overload IEEE 128-bit extract and insert support.
2022-07-01 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtins.def
(__builtin_vsx_scalar_extract_expq_kf): Rename KFmode IEEE 128-bit
insert and extract built-in functions to have a KF suffix to allow
overloading.
(__builtin_vsx_scalar_extract_sigq_kf): Likewise.
(__builtin_vsx_scalar_insert_exp_qp_kf): Likewise.
(__builtin_vsx_scalar_extract_expq_tf): Add TFmode variants for
IEEE 128-bit insert and extract support.
(__builtin_vsx_scalar_extract_sigq_tf): Likewise.
(__builtin_vsx_scalar_insert_exp_qp_tf): Likewise.
* config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
Add support for having KFmode and TFmode variants of VSIEQPF.
* config/rs6000/rs6000-overload.def
(__builtin_vec_scalar_extract_exp): Add TFmode overloads.
(__builtin_vec_scalar_extract_sig): Likewise.
(__builtin_vec_scalar_insert_exp): Likewise.
gcc/testsuite/
* gcc.target/powerpc/bfp/scalar-extract-exp-4.c: Update the
expected error message.
* gcc.target/powerpc/bfp/scalar-extract-sig-4.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-10.c: Likewise.
Diff:
---
gcc/config/rs6000/rs6000-builtins.def | 26 ++++++++++++++++------
gcc/config/rs6000/rs6000-c.cc | 10 +++++----
gcc/config/rs6000/rs6000-overload.def | 12 +++++++---
| 2 +-
| 2 +-
.../gcc.target/powerpc/bfp/scalar-insert-exp-10.c | 2 +-
6 files changed, 37 insertions(+), 17 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index e96b89c449b..84cf2effd25 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -2902,19 +2902,21 @@
fpmath double __builtin_truncf128_round_to_odd_kf (_Float128);
TRUNCF128_ODD_KF trunckfdf2_odd {}
- const signed long long __builtin_vsx_scalar_extract_expq (_Float128);
- VSEEQP xsxexpqp_kf {}
+ const signed long long __builtin_vsx_scalar_extract_expq_kf (_Float128);
+ VSEEQP_KF xsxexpqp_kf {}
- const signed __int128 __builtin_vsx_scalar_extract_sigq (_Float128);
- VSESQP xsxsigqp_kf {}
+ const signed __int128 __builtin_vsx_scalar_extract_sigq_kf (_Float128);
+ VSESQP_KF xsxsigqp_kf {}
+; Note we cannot overload this function since it does not have KFmode
+; or TFmode arguments.
const _Float128 __builtin_vsx_scalar_insert_exp_q (unsigned __int128, \
unsigned long long);
VSIEQP xsiexpqp_kf {}
- const _Float128 __builtin_vsx_scalar_insert_exp_qp (_Float128, \
- unsigned long long);
- VSIEQPF xsiexpqpf_kf {}
+ const _Float128 __builtin_vsx_scalar_insert_exp_qp_kf (_Float128, \
+ unsigned long long);
+ VSIEQPF_KF xsiexpqpf_kf {}
const signed int __builtin_vsx_scalar_test_data_class_qp (_Float128, \
const int<7>);
@@ -2968,6 +2970,16 @@
fpmath double __builtin_truncf128_round_to_odd_tf (long double);
TRUNCF128_ODD_TF trunctfdf2_odd {ieeeld}
+ const signed long long __builtin_vsx_scalar_extract_expq_tf (long double);
+ VSEEQP_TF xsxexpqp_tf {ieeeld}
+
+ const signed __int128 __builtin_vsx_scalar_extract_sigq_tf (long double);
+ VSESQP_TF xsxsigqp_tf {ieeeld}
+
+ const long double __builtin_vsx_scalar_insert_exp_qp_tf (_Float128, \
+ unsigned long long);
+ VSIEQPF_TF xsiexpqpf_tf {ieeeld}
+
; Decimal floating-point builtins.
[dfp]
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index 155233bfbcc..b9d3aa06e40 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -1939,11 +1939,13 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
128-bit variant of built-in function. */
if (GET_MODE_PRECISION (arg1_mode) > 64)
{
- /* If first argument is of float variety, choose variant
- that expects __ieee128 argument. Otherwise, expect
- __int128 argument. */
+ /* If first argument is of float variety, choose variant that
+ expects _Float128 argument (or long double if long doubles are
+ IEEE 128-bit). Otherwise, expect __int128 argument. */
if (GET_MODE_CLASS (arg1_mode) == MODE_FLOAT)
- instance_code = RS6000_BIF_VSIEQPF;
+ instance_code = ((arg1_mode == TFmode)
+ ? RS6000_BIF_VSIEQPF_TF
+ : RS6000_BIF_VSIEQPF_KF);
else
instance_code = RS6000_BIF_VSIEQP;
}
diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def
index 511a3821d5b..546883ece19 100644
--- a/gcc/config/rs6000/rs6000-overload.def
+++ b/gcc/config/rs6000/rs6000-overload.def
@@ -4506,13 +4506,17 @@
unsigned int __builtin_vec_scalar_extract_exp (double);
VSEEDP
unsigned int __builtin_vec_scalar_extract_exp (_Float128);
- VSEEQP
+ VSEEQP_KF
+ unsigned int __builtin_vec_scalar_extract_exp (long double);
+ VSEEQP_TF
[VEC_VSES, scalar_extract_sig, __builtin_vec_scalar_extract_sig]
unsigned long long __builtin_vec_scalar_extract_sig (double);
VSESDP
unsigned __int128 __builtin_vec_scalar_extract_sig (_Float128);
- VSESQP
+ VSESQP_KF
+ unsigned __int128 __builtin_vec_scalar_extract_sig (long double);
+ VSESQP_TF
[VEC_VSIE, scalar_insert_exp, __builtin_vec_scalar_insert_exp]
double __builtin_vec_scalar_insert_exp (unsigned long long, unsigned long long);
@@ -4522,7 +4526,9 @@
_Float128 __builtin_vec_scalar_insert_exp (unsigned __int128, unsigned long long);
VSIEQP
_Float128 __builtin_vec_scalar_insert_exp (_Float128, unsigned long long);
- VSIEQPF
+ VSIEQPF_KF
+ long double __builtin_vec_scalar_insert_exp (long double, unsigned long long);
+ VSIEQPF_TF
[VEC_VSTDC, scalar_test_data_class, __builtin_vec_scalar_test_data_class]
unsigned int __builtin_vec_scalar_test_data_class (float, const int);
--git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c
index 850ff620490..14c6554f417 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c
@@ -11,7 +11,7 @@ get_exponent (__ieee128 *p)
{
__ieee128 source = *p;
- return __builtin_vec_scalar_extract_exp (source); /* { dg-error "'__builtin_vsx_scalar_extract_expq' requires" } */
+ return __builtin_vec_scalar_extract_exp (source); /* { dg-error "'__builtin_vsx_scalar_extract_expq.*' requires" } */
}
--git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c
index 32a53c6fffd..9800cf65017 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c
@@ -11,5 +11,5 @@ get_significand (__ieee128 *p)
{
__ieee128 source = *p;
- return __builtin_vec_scalar_extract_sig (source); /* { dg-error "'__builtin_vsx_scalar_extract_sigq' requires" } */
+ return __builtin_vec_scalar_extract_sig (source); /* { dg-error "'__builtin_vsx_scalar_extract_sigq.*' requires" } */
}
diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c
index 769d3b0546a..4018c8fa08a 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c
@@ -13,5 +13,5 @@ insert_exponent (__ieee128 *significand_p,
__ieee128 significand = *significand_p;
unsigned long long int exponent = *exponent_p;
- return __builtin_vec_scalar_insert_exp (significand, exponent); /* { dg-error "'__builtin_vsx_scalar_insert_exp_qp' requires" } */
+ return __builtin_vec_scalar_insert_exp (significand, exponent); /* { dg-error "'__builtin_vsx_scalar_insert_exp_qp.*' requires" } */
}
^ permalink raw reply [flat|nested] 4+ messages in thread
* [gcc(refs/users/meissner/heads/work093)] Overload IEEE 128-bit extract and insert support.
@ 2022-07-01 6:41 Michael Meissner
0 siblings, 0 replies; 4+ messages in thread
From: Michael Meissner @ 2022-07-01 6:41 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:2a6c508a3c80d7865ed8c54f2a0ad97ad9e2a603
commit 2a6c508a3c80d7865ed8c54f2a0ad97ad9e2a603
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 1 02:41:16 2022 -0400
Overload IEEE 128-bit extract and insert support.
2022-07-01 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtins.def
(__builtin_vsx_scalar_extract_expq_kf): Rename KFmode IEEE 128-bit
insert and extract built-in functions to have a KF suffix to allow
overloading.
(__builtin_vsx_scalar_extract_sigq_kf): Likewise.
(__builtin_vsx_scalar_insert_exp_qp_kf): Likewise.
(__builtin_vsx_scalar_extract_expq_tf): Add TFmode variants for
IEEE 128-bit insert and extract support.
(__builtin_vsx_scalar_extract_sigq_tf): Likewise.
(__builtin_vsx_scalar_insert_exp_qp_tf): Likewise.
* config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
Add support for having KFmode and TFmode variants of VSIEQPF.
* config/rs6000/rs6000-overload.def
(__builtin_vec_scalar_extract_exp): Add TFmode overloads.
(__builtin_vec_scalar_extract_sig): Likewise.
(__builtin_vec_scalar_insert_exp): Likewise.
gcc/testsuite/
* gcc.target/powerpc/bfp/scalar-extract-exp-4.c: Update error
message to account to match built-in functions are now
overloaded.
* gcc.target/powerpc/bfp/scalar-extract-sig-4.c: Likewise.
* gcc.target/powerpc/bfp/scalar-insert-exp-10.c: Likewise.
Diff:
---
gcc/config/rs6000/rs6000-builtins.def | 26 ++++++++++++++++------
gcc/config/rs6000/rs6000-c.cc | 10 +++++----
gcc/config/rs6000/rs6000-overload.def | 12 +++++++---
| 2 +-
| 2 +-
.../gcc.target/powerpc/bfp/scalar-insert-exp-10.c | 2 +-
6 files changed, 37 insertions(+), 17 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index e96b89c449b..277d9e2f159 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -2902,19 +2902,21 @@
fpmath double __builtin_truncf128_round_to_odd_kf (_Float128);
TRUNCF128_ODD_KF trunckfdf2_odd {}
- const signed long long __builtin_vsx_scalar_extract_expq (_Float128);
- VSEEQP xsxexpqp_kf {}
+ const signed long long __builtin_vsx_scalar_extract_expq_kf (_Float128);
+ VSEEQP_KF xsxexpqp_kf {}
- const signed __int128 __builtin_vsx_scalar_extract_sigq (_Float128);
- VSESQP xsxsigqp_kf {}
+ const signed __int128 __builtin_vsx_scalar_extract_sigq_kf (_Float128);
+ VSESQP_KF xsxsigqp_kf {}
+; Note we cannot overload this function since it does not have KFmode
+; or TFmode arguments.
const _Float128 __builtin_vsx_scalar_insert_exp_q (unsigned __int128, \
unsigned long long);
VSIEQP xsiexpqp_kf {}
- const _Float128 __builtin_vsx_scalar_insert_exp_qp (_Float128, \
- unsigned long long);
- VSIEQPF xsiexpqpf_kf {}
+ const _Float128 __builtin_vsx_scalar_insert_exp_qp_kf (_Float128, \
+ unsigned long long);
+ VSIEQPF_KF xsiexpqpf_kf {}
const signed int __builtin_vsx_scalar_test_data_class_qp (_Float128, \
const int<7>);
@@ -2968,6 +2970,16 @@
fpmath double __builtin_truncf128_round_to_odd_tf (long double);
TRUNCF128_ODD_TF trunctfdf2_odd {ieeeld}
+ const signed long long __builtin_vsx_scalar_extract_expq_tf (long double);
+ VSEEQP_TF xsxexpqp_tf {ieeeld}
+
+ const signed __int128 __builtin_vsx_scalar_extract_sigq_tf (long double);
+ VSESQP_TF xsxsigqp_tf {ieeeld}
+
+ const long double __builtin_vsx_scalar_insert_exp_qp_tf (_Float128, \
+ unsigned long long);
+ VSIEQPF_TF xsiexpqpf_tf {}
+
; Decimal floating-point builtins.
[dfp]
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index 155233bfbcc..b9d3aa06e40 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -1939,11 +1939,13 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
128-bit variant of built-in function. */
if (GET_MODE_PRECISION (arg1_mode) > 64)
{
- /* If first argument is of float variety, choose variant
- that expects __ieee128 argument. Otherwise, expect
- __int128 argument. */
+ /* If first argument is of float variety, choose variant that
+ expects _Float128 argument (or long double if long doubles are
+ IEEE 128-bit). Otherwise, expect __int128 argument. */
if (GET_MODE_CLASS (arg1_mode) == MODE_FLOAT)
- instance_code = RS6000_BIF_VSIEQPF;
+ instance_code = ((arg1_mode == TFmode)
+ ? RS6000_BIF_VSIEQPF_TF
+ : RS6000_BIF_VSIEQPF_KF);
else
instance_code = RS6000_BIF_VSIEQP;
}
diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def
index 511a3821d5b..546883ece19 100644
--- a/gcc/config/rs6000/rs6000-overload.def
+++ b/gcc/config/rs6000/rs6000-overload.def
@@ -4506,13 +4506,17 @@
unsigned int __builtin_vec_scalar_extract_exp (double);
VSEEDP
unsigned int __builtin_vec_scalar_extract_exp (_Float128);
- VSEEQP
+ VSEEQP_KF
+ unsigned int __builtin_vec_scalar_extract_exp (long double);
+ VSEEQP_TF
[VEC_VSES, scalar_extract_sig, __builtin_vec_scalar_extract_sig]
unsigned long long __builtin_vec_scalar_extract_sig (double);
VSESDP
unsigned __int128 __builtin_vec_scalar_extract_sig (_Float128);
- VSESQP
+ VSESQP_KF
+ unsigned __int128 __builtin_vec_scalar_extract_sig (long double);
+ VSESQP_TF
[VEC_VSIE, scalar_insert_exp, __builtin_vec_scalar_insert_exp]
double __builtin_vec_scalar_insert_exp (unsigned long long, unsigned long long);
@@ -4522,7 +4526,9 @@
_Float128 __builtin_vec_scalar_insert_exp (unsigned __int128, unsigned long long);
VSIEQP
_Float128 __builtin_vec_scalar_insert_exp (_Float128, unsigned long long);
- VSIEQPF
+ VSIEQPF_KF
+ long double __builtin_vec_scalar_insert_exp (long double, unsigned long long);
+ VSIEQPF_TF
[VEC_VSTDC, scalar_test_data_class, __builtin_vec_scalar_test_data_class]
unsigned int __builtin_vec_scalar_test_data_class (float, const int);
--git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c
index 850ff620490..14c6554f417 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-exp-4.c
@@ -11,7 +11,7 @@ get_exponent (__ieee128 *p)
{
__ieee128 source = *p;
- return __builtin_vec_scalar_extract_exp (source); /* { dg-error "'__builtin_vsx_scalar_extract_expq' requires" } */
+ return __builtin_vec_scalar_extract_exp (source); /* { dg-error "'__builtin_vsx_scalar_extract_expq.*' requires" } */
}
--git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c
index 32a53c6fffd..9800cf65017 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-extract-sig-4.c
@@ -11,5 +11,5 @@ get_significand (__ieee128 *p)
{
__ieee128 source = *p;
- return __builtin_vec_scalar_extract_sig (source); /* { dg-error "'__builtin_vsx_scalar_extract_sigq' requires" } */
+ return __builtin_vec_scalar_extract_sig (source); /* { dg-error "'__builtin_vsx_scalar_extract_sigq.*' requires" } */
}
diff --git a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c
index 769d3b0546a..4018c8fa08a 100644
--- a/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c
+++ b/gcc/testsuite/gcc.target/powerpc/bfp/scalar-insert-exp-10.c
@@ -13,5 +13,5 @@ insert_exponent (__ieee128 *significand_p,
__ieee128 significand = *significand_p;
unsigned long long int exponent = *exponent_p;
- return __builtin_vec_scalar_insert_exp (significand, exponent); /* { dg-error "'__builtin_vsx_scalar_insert_exp_qp' requires" } */
+ return __builtin_vec_scalar_insert_exp (significand, exponent); /* { dg-error "'__builtin_vsx_scalar_insert_exp_qp.*' requires" } */
}
^ permalink raw reply [flat|nested] 4+ messages in thread
* [gcc(refs/users/meissner/heads/work093)] Overload IEEE 128-bit extract and insert support.
@ 2022-06-30 20:27 Michael Meissner
0 siblings, 0 replies; 4+ messages in thread
From: Michael Meissner @ 2022-06-30 20:27 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:5690868799bb8b9b841840144cdca208ca6caf37
commit 5690868799bb8b9b841840144cdca208ca6caf37
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jun 30 16:27:26 2022 -0400
Overload IEEE 128-bit extract and insert support.
2022-06-30 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/rs6000-builtins.def
(__builtin_vsx_scalar_extract_expq_kf): Rename KFmode IEEE 128-bit
insert and extract built-in functions to have a KF suffix to allow
overloading.
(__builtin_vsx_scalar_extract_sigq_kf): Likewise.
(__builtin_vsx_scalar_insert_exp_qp_kf): Likewise.
(__builtin_vsx_scalar_extract_expq_tf): Add TFmode variants for
IEEE 128-bit insert and extract support.
(__builtin_vsx_scalar_extract_sigq_tf): Likewise.
(__builtin_vsx_scalar_insert_exp_qp_tf): Likewise.
* config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
Add support for having KFmode and TFmode variants of VSIEQPF.
* config/rs6000/rs6000-overload.def
(__builtin_vec_scalar_extract_exp): Add TFmode overloads.
(__builtin_vec_scalar_extract_sig): Likewise.
(__builtin_vec_scalar_insert_exp): Likewise.
Diff:
---
gcc/config/rs6000/rs6000-builtins.def | 26 +++++++++++++++++++-------
gcc/config/rs6000/rs6000-c.cc | 10 ++++++----
gcc/config/rs6000/rs6000-overload.def | 12 +++++++++---
3 files changed, 34 insertions(+), 14 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtins.def b/gcc/config/rs6000/rs6000-builtins.def
index e96b89c449b..277d9e2f159 100644
--- a/gcc/config/rs6000/rs6000-builtins.def
+++ b/gcc/config/rs6000/rs6000-builtins.def
@@ -2902,19 +2902,21 @@
fpmath double __builtin_truncf128_round_to_odd_kf (_Float128);
TRUNCF128_ODD_KF trunckfdf2_odd {}
- const signed long long __builtin_vsx_scalar_extract_expq (_Float128);
- VSEEQP xsxexpqp_kf {}
+ const signed long long __builtin_vsx_scalar_extract_expq_kf (_Float128);
+ VSEEQP_KF xsxexpqp_kf {}
- const signed __int128 __builtin_vsx_scalar_extract_sigq (_Float128);
- VSESQP xsxsigqp_kf {}
+ const signed __int128 __builtin_vsx_scalar_extract_sigq_kf (_Float128);
+ VSESQP_KF xsxsigqp_kf {}
+; Note we cannot overload this function since it does not have KFmode
+; or TFmode arguments.
const _Float128 __builtin_vsx_scalar_insert_exp_q (unsigned __int128, \
unsigned long long);
VSIEQP xsiexpqp_kf {}
- const _Float128 __builtin_vsx_scalar_insert_exp_qp (_Float128, \
- unsigned long long);
- VSIEQPF xsiexpqpf_kf {}
+ const _Float128 __builtin_vsx_scalar_insert_exp_qp_kf (_Float128, \
+ unsigned long long);
+ VSIEQPF_KF xsiexpqpf_kf {}
const signed int __builtin_vsx_scalar_test_data_class_qp (_Float128, \
const int<7>);
@@ -2968,6 +2970,16 @@
fpmath double __builtin_truncf128_round_to_odd_tf (long double);
TRUNCF128_ODD_TF trunctfdf2_odd {ieeeld}
+ const signed long long __builtin_vsx_scalar_extract_expq_tf (long double);
+ VSEEQP_TF xsxexpqp_tf {ieeeld}
+
+ const signed __int128 __builtin_vsx_scalar_extract_sigq_tf (long double);
+ VSESQP_TF xsxsigqp_tf {ieeeld}
+
+ const long double __builtin_vsx_scalar_insert_exp_qp_tf (_Float128, \
+ unsigned long long);
+ VSIEQPF_TF xsiexpqpf_tf {}
+
; Decimal floating-point builtins.
[dfp]
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index 155233bfbcc..b9d3aa06e40 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -1939,11 +1939,13 @@ altivec_resolve_overloaded_builtin (location_t loc, tree fndecl,
128-bit variant of built-in function. */
if (GET_MODE_PRECISION (arg1_mode) > 64)
{
- /* If first argument is of float variety, choose variant
- that expects __ieee128 argument. Otherwise, expect
- __int128 argument. */
+ /* If first argument is of float variety, choose variant that
+ expects _Float128 argument (or long double if long doubles are
+ IEEE 128-bit). Otherwise, expect __int128 argument. */
if (GET_MODE_CLASS (arg1_mode) == MODE_FLOAT)
- instance_code = RS6000_BIF_VSIEQPF;
+ instance_code = ((arg1_mode == TFmode)
+ ? RS6000_BIF_VSIEQPF_TF
+ : RS6000_BIF_VSIEQPF_KF);
else
instance_code = RS6000_BIF_VSIEQP;
}
diff --git a/gcc/config/rs6000/rs6000-overload.def b/gcc/config/rs6000/rs6000-overload.def
index 511a3821d5b..546883ece19 100644
--- a/gcc/config/rs6000/rs6000-overload.def
+++ b/gcc/config/rs6000/rs6000-overload.def
@@ -4506,13 +4506,17 @@
unsigned int __builtin_vec_scalar_extract_exp (double);
VSEEDP
unsigned int __builtin_vec_scalar_extract_exp (_Float128);
- VSEEQP
+ VSEEQP_KF
+ unsigned int __builtin_vec_scalar_extract_exp (long double);
+ VSEEQP_TF
[VEC_VSES, scalar_extract_sig, __builtin_vec_scalar_extract_sig]
unsigned long long __builtin_vec_scalar_extract_sig (double);
VSESDP
unsigned __int128 __builtin_vec_scalar_extract_sig (_Float128);
- VSESQP
+ VSESQP_KF
+ unsigned __int128 __builtin_vec_scalar_extract_sig (long double);
+ VSESQP_TF
[VEC_VSIE, scalar_insert_exp, __builtin_vec_scalar_insert_exp]
double __builtin_vec_scalar_insert_exp (unsigned long long, unsigned long long);
@@ -4522,7 +4526,9 @@
_Float128 __builtin_vec_scalar_insert_exp (unsigned __int128, unsigned long long);
VSIEQP
_Float128 __builtin_vec_scalar_insert_exp (_Float128, unsigned long long);
- VSIEQPF
+ VSIEQPF_KF
+ long double __builtin_vec_scalar_insert_exp (long double, unsigned long long);
+ VSIEQPF_TF
[VEC_VSTDC, scalar_test_data_class, __builtin_vec_scalar_test_data_class]
unsigned int __builtin_vec_scalar_test_data_class (float, const int);
^ permalink raw reply [flat|nested] 4+ messages in thread
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