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* [gcc(refs/users/meissner/heads/work095)] Revert patches.
@ 2022-07-29 14:27 Michael Meissner
0 siblings, 0 replies; 4+ messages in thread
From: Michael Meissner @ 2022-07-29 14:27 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:b683663cb6376fbbaa3880a78f465ca371efe285
commit b683663cb6376fbbaa3880a78f465ca371efe285
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 29 10:26:35 2022 -0400
Revert patches.
2022-07-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patches.
* config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Always
create a new tree node for __ibm128, even if long double uses the IBM
128-bit format. Always create a new tree node for __float128, even if
long double uses the IEEE 128-bit format.
* config/rs6000/rs600.cc (rs6000_expand_builtin): Remove code that
converted the KFmode and IFmode built-in functions to TFmode depending
on what the long double format is, and use built-in overloading
instead.
(init_float128_ieee): Remove setting up KFmode complex multiply and
divide here.
(rs6000_init_libfuncs): Rewrite the setup for complex multiply and
divide for long double if long double uses the IEEE 128-bit encoding.
(rs6000_scalar_mode_supported_p): Allow __ibm128 even if we don't
support _Float128.
(rs6000_libgcc_floating_mode_supported_p): Allow KFmode if IEEE
128-bit floating point is supported. Allow IFmode if either IEEE
128-bit floating point is supported or long double is IBM 128-bit.
(rs6000_floatn_mode): Always return KFmode for IEEE 128-bit. Do not
return TFmode, even if long double uses the IEEE 128-bit format.
(rs6000_c_mode_for_suffix): The 'q' suffix always uses KFmode, even if
long double uses the IEEE 128-bit encoding.
* config/rs6000/rs6000.md (IFKF): Delete.
(IFKF_reg): Delete.
(trunckfif2): New insn.
(trunctfif2): Likewise.
(extendkftf2_internal): Split extend<mode>tf2_internal and
extendtf<mode>2_internal into separate insns that handle either
conversions between IEEE 128-bit types or between IBM 128-bit types.
Set the type and insn length correctly.
(extendtfkf2_internal): Likewise.
(extendiftf2_internal): Likewise.
(extendtfif2_internal): Likewise.
gcc/testsuite/
Revert patches.
* gcc.target/powerpc/mulkc3-2.c: Update test.
* gcc.target/powerpc/divkc3-2.c: Likewise.
libgcc/
Revert patches.
* config/rs6000/float128-ifunc.c (__multc3_ieee128): Add ifunc
support.
(__divtc3_ieee128): Likewise.
* config/rs6000/quad-float128.h (__multc3_ieee128): Add
declaration.
(__divtc3_ieee128): Likewise.
2022-07-28 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patches.
* config/rs6000/rs600.cc (init_float128_ibm): Remove checks for hardware
floating point for the IBM 128-bit comparisons.
(rs6000_init_libfuncs): Create IBM 128-bit floating point support even
if we don't support IEEE 128-bit floating point.
(rs6000_scalar_mode_supported_p): Allow __ibm128 even if we don't
support _Float128.
* config/rs6000/rs6000.h (FLOAT128_IBM_P): Remove checks for
-mhard-float.
(TARGET_IBM128): New macro.
* config/rs6000/rs6000.md (@extenddf<mode>2_fprs): Allow IFmode to be
converted even if long double is not 128-bits.
(extenddf<mode>2_vsx): Likewise.
(extendtfif2): Allow conversion if we have __ibm128 but not IEEE 128-bit
floating point.
(trunckftf2): Likewise.
Diff:
---
gcc/config/rs6000/rs6000-builtin.cc | 111 ++++++++++++++++++++++--
gcc/config/rs6000/rs6000.cc | 130 +++++++++++++---------------
gcc/config/rs6000/rs6000.h | 8 +-
gcc/config/rs6000/rs6000.md | 107 ++++++-----------------
gcc/testsuite/gcc.target/powerpc/divkc3-2.c | 2 +-
gcc/testsuite/gcc.target/powerpc/mulkc3-2.c | 2 +-
libgcc/config/rs6000/float128-ifunc.c | 6 --
libgcc/config/rs6000/quad-float128.h | 5 --
8 files changed, 195 insertions(+), 176 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index 601232148f8..67e86bee781 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -719,12 +719,18 @@ rs6000_init_builtins (void)
For IEEE 128-bit floating point, always create the type __ieee128. If the
user used -mfloat128, rs6000-c.cc will create a define from __float128 to
__ieee128. */
- if (TARGET_IBM128)
+ if (TARGET_LONG_DOUBLE_128 && (!TARGET_IEEEQUAD || TARGET_FLOAT128_TYPE))
{
- ibm128_float_type_node = make_node (REAL_TYPE);
- TYPE_PRECISION (ibm128_float_type_node) = 128;
- SET_TYPE_MODE (ibm128_float_type_node, IFmode);
- layout_type (ibm128_float_type_node);
+ if (!TARGET_IEEEQUAD)
+ ibm128_float_type_node = long_double_type_node;
+ else
+ {
+ ibm128_float_type_node = make_node (REAL_TYPE);
+ TYPE_PRECISION (ibm128_float_type_node) = 128;
+ SET_TYPE_MODE (ibm128_float_type_node, IFmode);
+ layout_type (ibm128_float_type_node);
+ }
+ t = build_qualified_type (ibm128_float_type_node, TYPE_QUAL_CONST);
lang_hooks.types.register_builtin_type (ibm128_float_type_node,
"__ibm128");
}
@@ -733,7 +739,11 @@ rs6000_init_builtins (void)
if (TARGET_FLOAT128_TYPE)
{
- ieee128_float_type_node = float128_type_node;
+ if (TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128)
+ ieee128_float_type_node = long_double_type_node;
+ else
+ ieee128_float_type_node = float128_type_node;
+ t = build_qualified_type (ieee128_float_type_node, TYPE_QUAL_CONST);
lang_hooks.types.register_builtin_type (ieee128_float_type_node,
"__ieee128");
}
@@ -3292,6 +3302,79 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
size_t uns_fcode = (size_t)fcode;
enum insn_code icode = rs6000_builtin_info[uns_fcode].icode;
+ /* TODO: The following commentary and code is inherited from the original
+ builtin processing code. The commentary is a bit confusing, with the
+ intent being that KFmode is always IEEE-128, IFmode is always IBM
+ double-double, and TFmode is the current long double. The code is
+ confusing in that it converts from KFmode to TFmode pattern names,
+ when the other direction is more intuitive. Try to address this. */
+
+ /* We have two different modes (KFmode, TFmode) that are the IEEE
+ 128-bit floating point type, depending on whether long double is the
+ IBM extended double (KFmode) or long double is IEEE 128-bit (TFmode).
+ It is simpler if we only define one variant of the built-in function,
+ and switch the code when defining it, rather than defining two built-
+ ins and using the overload table in rs6000-c.cc to switch between the
+ two. If we don't have the proper assembler, don't do this switch
+ because CODE_FOR_*kf* and CODE_FOR_*tf* will be CODE_FOR_nothing. */
+ if (FLOAT128_IEEE_P (TFmode))
+ switch (icode)
+ {
+ case CODE_FOR_sqrtkf2_odd:
+ icode = CODE_FOR_sqrttf2_odd;
+ break;
+ case CODE_FOR_trunckfdf2_odd:
+ icode = CODE_FOR_trunctfdf2_odd;
+ break;
+ case CODE_FOR_addkf3_odd:
+ icode = CODE_FOR_addtf3_odd;
+ break;
+ case CODE_FOR_subkf3_odd:
+ icode = CODE_FOR_subtf3_odd;
+ break;
+ case CODE_FOR_mulkf3_odd:
+ icode = CODE_FOR_multf3_odd;
+ break;
+ case CODE_FOR_divkf3_odd:
+ icode = CODE_FOR_divtf3_odd;
+ break;
+ case CODE_FOR_fmakf4_odd:
+ icode = CODE_FOR_fmatf4_odd;
+ break;
+ case CODE_FOR_xsxexpqp_kf:
+ icode = CODE_FOR_xsxexpqp_tf;
+ break;
+ case CODE_FOR_xsxsigqp_kf:
+ icode = CODE_FOR_xsxsigqp_tf;
+ break;
+ case CODE_FOR_xststdcnegqp_kf:
+ icode = CODE_FOR_xststdcnegqp_tf;
+ break;
+ case CODE_FOR_xsiexpqp_kf:
+ icode = CODE_FOR_xsiexpqp_tf;
+ break;
+ case CODE_FOR_xsiexpqpf_kf:
+ icode = CODE_FOR_xsiexpqpf_tf;
+ break;
+ case CODE_FOR_xststdcqp_kf:
+ icode = CODE_FOR_xststdcqp_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_eq_kf:
+ icode = CODE_FOR_xscmpexpqp_eq_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_lt_kf:
+ icode = CODE_FOR_xscmpexpqp_lt_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_gt_kf:
+ icode = CODE_FOR_xscmpexpqp_gt_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_unordered_kf:
+ icode = CODE_FOR_xscmpexpqp_unordered_tf;
+ break;
+ default:
+ break;
+ }
+
/* In case of "#pragma target" changes, we initialize all builtins
but check for actual availability now, during expand time. For
invalid builtins, generate a normal call. */
@@ -3441,6 +3524,22 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
gcc_unreachable ();
}
+ if (bif_is_ibm128 (*bifaddr) && TARGET_LONG_DOUBLE_128 && !TARGET_IEEEQUAD)
+ {
+ if (fcode == RS6000_BIF_PACK_IF)
+ {
+ icode = CODE_FOR_packtf;
+ fcode = RS6000_BIF_PACK_TF;
+ uns_fcode = (size_t) fcode;
+ }
+ else if (fcode == RS6000_BIF_UNPACK_IF)
+ {
+ icode = CODE_FOR_unpacktf;
+ fcode = RS6000_BIF_UNPACK_TF;
+ uns_fcode = (size_t) fcode;
+ }
+ }
+
/* TRUE iff the built-in function returns void. */
bool void_func = TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node;
/* Position of first argument (0 for void-returning functions, else 1). */
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 0099c8b95ab..ae61505123d 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -10980,23 +10980,26 @@ init_float128_ibm (machine_mode mode)
set_optab_libfunc (smul_optab, mode, "__gcc_qmul");
set_optab_libfunc (sdiv_optab, mode, "__gcc_qdiv");
- set_optab_libfunc (neg_optab, mode, "__gcc_qneg");
- set_optab_libfunc (eq_optab, mode, "__gcc_qeq");
- set_optab_libfunc (ne_optab, mode, "__gcc_qne");
- set_optab_libfunc (gt_optab, mode, "__gcc_qgt");
- set_optab_libfunc (ge_optab, mode, "__gcc_qge");
- set_optab_libfunc (lt_optab, mode, "__gcc_qlt");
- set_optab_libfunc (le_optab, mode, "__gcc_qle");
- set_optab_libfunc (unord_optab, mode, "__gcc_qunord");
-
- set_conv_libfunc (sext_optab, mode, SFmode, "__gcc_stoq");
- set_conv_libfunc (sext_optab, mode, DFmode, "__gcc_dtoq");
- set_conv_libfunc (trunc_optab, SFmode, mode, "__gcc_qtos");
- set_conv_libfunc (trunc_optab, DFmode, mode, "__gcc_qtod");
- set_conv_libfunc (sfix_optab, SImode, mode, "__gcc_qtoi");
- set_conv_libfunc (ufix_optab, SImode, mode, "__gcc_qtou");
- set_conv_libfunc (sfloat_optab, mode, SImode, "__gcc_itoq");
- set_conv_libfunc (ufloat_optab, mode, SImode, "__gcc_utoq");
+ if (!TARGET_HARD_FLOAT)
+ {
+ set_optab_libfunc (neg_optab, mode, "__gcc_qneg");
+ set_optab_libfunc (eq_optab, mode, "__gcc_qeq");
+ set_optab_libfunc (ne_optab, mode, "__gcc_qne");
+ set_optab_libfunc (gt_optab, mode, "__gcc_qgt");
+ set_optab_libfunc (ge_optab, mode, "__gcc_qge");
+ set_optab_libfunc (lt_optab, mode, "__gcc_qlt");
+ set_optab_libfunc (le_optab, mode, "__gcc_qle");
+ set_optab_libfunc (unord_optab, mode, "__gcc_qunord");
+
+ set_conv_libfunc (sext_optab, mode, SFmode, "__gcc_stoq");
+ set_conv_libfunc (sext_optab, mode, DFmode, "__gcc_dtoq");
+ set_conv_libfunc (trunc_optab, SFmode, mode, "__gcc_qtos");
+ set_conv_libfunc (trunc_optab, DFmode, mode, "__gcc_qtod");
+ set_conv_libfunc (sfix_optab, SImode, mode, "__gcc_qtoi");
+ set_conv_libfunc (ufix_optab, SImode, mode, "__gcc_qtou");
+ set_conv_libfunc (sfloat_optab, mode, SImode, "__gcc_itoq");
+ set_conv_libfunc (ufloat_optab, mode, SImode, "__gcc_utoq");
+ }
}
else
{
@@ -11064,6 +11067,32 @@ init_float128_ieee (machine_mode mode)
{
if (FLOAT128_VECTOR_P (mode))
{
+ static bool complex_muldiv_init_p = false;
+
+ /* Set up to call __mulkc3 and __divkc3 under -mabi=ieeelongdouble. If
+ we have clone or target attributes, this will be called a second
+ time. We want to create the built-in function only once. */
+ if (mode == TFmode && TARGET_IEEEQUAD && !complex_muldiv_init_p)
+ {
+ complex_muldiv_init_p = true;
+ built_in_function fncode_mul =
+ (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + TCmode
+ - MIN_MODE_COMPLEX_FLOAT);
+ built_in_function fncode_div =
+ (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + TCmode
+ - MIN_MODE_COMPLEX_FLOAT);
+
+ tree fntype = build_function_type_list (complex_long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ NULL_TREE);
+
+ create_complex_muldiv ("__mulkc3", fncode_mul, fntype);
+ create_complex_muldiv ("__divkc3", fncode_div, fntype);
+ }
+
set_optab_libfunc (add_optab, mode, "__addkf3");
set_optab_libfunc (sub_optab, mode, "__subkf3");
set_optab_libfunc (neg_optab, mode, "__negkf2");
@@ -11153,11 +11182,10 @@ rs6000_init_libfuncs (void)
{
/* __float128 support. */
if (TARGET_FLOAT128_TYPE)
- init_float128_ieee (KFmode);
-
- /* __ibm128 support. */
- if (TARGET_IBM128)
- init_float128_ibm (IFmode);
+ {
+ init_float128_ibm (IFmode);
+ init_float128_ieee (KFmode);
+ }
/* AIX/Darwin/64-bit Linux quad floating point routines. */
if (TARGET_LONG_DOUBLE_128)
@@ -11169,46 +11197,6 @@ rs6000_init_libfuncs (void)
else
init_float128_ieee (TFmode);
}
-
- /* Set up to call __mulkc3 and __divkc3 when long double uses the IEEE
- 128-bit encoding. We cannot use the same name (__mulkc3 or __divkc3 for
- both IEEE long double and for explicit _Float128/__float128) because
- c_builtin_function will complain if we create two built-in functions with
- the same name. Instead we use an alias name for the case when long double
- uses the IEEE 128-bit encoding. Libgcc will create a weak alias reference
- for this name.
-
- We need to only execute this once. If we have clone or target attributes,
- this will be called a second time. We need to create the built-in
- function only once. */
- static bool complex_muldiv_init_p = false;
-
- if (TARGET_FLOAT128_TYPE && TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128
- && !complex_muldiv_init_p)
- {
- complex_muldiv_init_p = true;
-
- tree fntype = build_function_type_list (complex_long_double_type_node,
- long_double_type_node,
- long_double_type_node,
- long_double_type_node,
- long_double_type_node,
- NULL_TREE);
-
- /* Create complex multiply. */
- built_in_function mul_fncode =
- (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + TCmode
- - MIN_MODE_COMPLEX_FLOAT);
-
- create_complex_muldiv ("__multc3_ieee128", mul_fncode, fntype);
-
- /* Create complex divide. */
- built_in_function div_fncode =
- (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + TCmode
- - MIN_MODE_COMPLEX_FLOAT);
-
- create_complex_muldiv ("__divtc3_ieee128", div_fncode, fntype);
- }
}
/* Emit a potentially record-form instruction, setting DST from SRC.
@@ -23831,9 +23819,7 @@ rs6000_scalar_mode_supported_p (scalar_mode mode)
if (DECIMAL_FLOAT_MODE_P (mode))
return default_decimal_float_supported_p ();
- else if (TARGET_FLOAT128_TYPE && mode == KFmode)
- return true;
- else if (TARGET_IBM128 && mode == IFmode)
+ else if (TARGET_FLOAT128_TYPE && (mode == KFmode || mode == IFmode))
return true;
else
return default_scalar_mode_supported_p (mode);
@@ -23851,9 +23837,13 @@ rs6000_libgcc_floating_mode_supported_p (scalar_float_mode mode)
case E_TFmode:
return true;
- /* We only return true for KFmode if IEEE 128-bit types are supported. */
+ /* We only return true for KFmode if IEEE 128-bit types are supported, and
+ if long double does not use the IEEE 128-bit format. If long double
+ uses the IEEE 128-bit format, it will use TFmode and not KFmode.
+ Because the code will not use KFmode in that case, there will be aborts
+ because it can't find KFmode in the Floatn types. */
case E_KFmode:
- return TARGET_FLOAT128_TYPE;
+ return TARGET_FLOAT128_TYPE && !TARGET_IEEEQUAD;
default:
return false;
@@ -23887,7 +23877,7 @@ rs6000_floatn_mode (int n, bool extended)
case 64:
if (TARGET_FLOAT128_TYPE)
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
else
return opt_scalar_float_mode ();
@@ -23911,7 +23901,7 @@ rs6000_floatn_mode (int n, bool extended)
case 128:
if (TARGET_FLOAT128_TYPE)
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
else
return opt_scalar_float_mode ();
@@ -23929,7 +23919,7 @@ rs6000_c_mode_for_suffix (char suffix)
if (TARGET_FLOAT128_TYPE)
{
if (suffix == 'q' || suffix == 'Q')
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
/* At the moment, we are not defining a suffix for IBM extended double.
If/when the default for -mabi=ieeelongdouble is changed, and we want
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 7bbd9ab5238..7d04556304a 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -334,7 +334,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#define FLOAT128_IBM_P(MODE) \
((!TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128 \
&& ((MODE) == TFmode || (MODE) == TCmode)) \
- || ((MODE) == IFmode || (MODE) == ICmode))
+ || (TARGET_HARD_FLOAT && ((MODE) == IFmode || (MODE) == ICmode)))
/* Helper macros to say whether a 128-bit floating point type can go in a
single vector register, or whether it needs paired scalar values. */
@@ -561,12 +561,6 @@ extern int rs6000_vector_align[];
&& TARGET_P8_VECTOR \
&& TARGET_POWERPC64)
-/* Whether the __ibm128 keyword is allowed. Any system that supports _Float128
- is assumed to be capable of supporting __ibm128. Similarly if the long
- double size is 128 bits, we assume __ibm128 is supported. We don't want to
- support it on a system without existing 128-bit long doubles. */
-#define TARGET_IBM128 (TARGET_FLOAT128_TYPE || TARGET_LONG_DOUBLE_128)
-
/* Inlining allows targets to define the meanings of bits in target_info
field of ipa_fn_summary by itself, the used bits for rs6000 are listed
below. */
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index e17252bb8de..1367a2cb779 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -543,6 +543,12 @@
; Iterator for 128-bit VSX types for pack/unpack
(define_mode_iterator FMOVE128_VSX [V1TI KF])
+; Iterators for converting to/from TFmode
+(define_mode_iterator IFKF [IF KF])
+
+; Constraints for moving IF/KFmode.
+(define_mode_attr IFKF_reg [(IF "d") (KF "wa")])
+
; Whether a floating point move is ok, don't allow SD without hardware FP
(define_mode_attr fmove_ok [(SF "")
(DF "")
@@ -8580,7 +8586,8 @@
(float_extend:IBM128
(match_operand:DF 1 "nonimmediate_operand" "d,m,d")))
(use (match_operand:DF 2 "nonimmediate_operand" "m,m,d"))]
- "!TARGET_VSX && TARGET_HARD_FLOAT && FLOAT128_IBM_P (<MODE>mode)"
+ "!TARGET_VSX && TARGET_HARD_FLOAT
+ && TARGET_LONG_DOUBLE_128 && FLOAT128_IBM_P (<MODE>mode)"
"#"
"&& reload_completed"
[(set (match_dup 3) (match_dup 1))
@@ -8597,7 +8604,7 @@
[(set (match_operand:IBM128 0 "gpc_reg_operand" "=d,d")
(float_extend:IBM128
(match_operand:DF 1 "nonimmediate_operand" "wa,m")))]
- "TARGET_VSX && FLOAT128_IBM_P (<MODE>mode)"
+ "TARGET_LONG_DOUBLE_128 && TARGET_VSX && FLOAT128_IBM_P (<MODE>mode)"
"#"
"&& reload_completed"
[(set (match_dup 2) (match_dup 1))
@@ -9054,7 +9061,7 @@
(define_expand "extendiftf2"
[(set (match_operand:TF 0 "gpc_reg_operand")
(float_extend:TF (match_operand:IF 1 "gpc_reg_operand")))]
- "TARGET_IBM128"
+ "TARGET_FLOAT128_TYPE"
{
rs6000_expand_float128_convert (operands[0], operands[1], false);
DONE;
@@ -9069,15 +9076,6 @@
DONE;
})
-(define_expand "extendkfif2"
- [(set (match_operand:IF 0 "gpc_reg_operand")
- (float_extend:IF (match_operand:KF 1 "gpc_reg_operand")))]
- "TARGET_FLOAT128_TYPE"
-{
- rs6000_expand_float128_convert (operands[0], operands[1], false);
- DONE;
-})
-
(define_expand "extendtfkf2"
[(set (match_operand:KF 0 "gpc_reg_operand")
(float_extend:KF (match_operand:TF 1 "gpc_reg_operand")))]
@@ -9090,7 +9088,7 @@
(define_expand "extendtfif2"
[(set (match_operand:IF 0 "gpc_reg_operand")
(float_extend:IF (match_operand:TF 1 "gpc_reg_operand")))]
- "TARGET_IBM128"
+ "TARGET_FLOAT128_TYPE"
{
rs6000_expand_float128_convert (operands[0], operands[1], false);
DONE;
@@ -9099,7 +9097,7 @@
(define_expand "trunciftf2"
[(set (match_operand:TF 0 "gpc_reg_operand")
(float_truncate:TF (match_operand:IF 1 "gpc_reg_operand")))]
- "TARGET_IBM128"
+ "TARGET_FLOAT128_TYPE"
{
rs6000_expand_float128_convert (operands[0], operands[1], false);
DONE;
@@ -9114,15 +9112,6 @@
DONE;
})
-(define_expand "trunckfif2"
- [(set (match_operand:IF 0 "gpc_reg_operand")
- (float_truncate:IF (match_operand:KF 1 "gpc_reg_operand")))]
- "TARGET_FLOAT128_TYPE"
-{
- rs6000_expand_float128_convert (operands[0], operands[1], false);
- DONE;
-})
-
(define_expand "trunckftf2"
[(set (match_operand:TF 0 "gpc_reg_operand")
(float_truncate:TF (match_operand:KF 1 "gpc_reg_operand")))]
@@ -9135,79 +9124,37 @@
(define_expand "trunctfif2"
[(set (match_operand:IF 0 "gpc_reg_operand")
(float_truncate:IF (match_operand:TF 1 "gpc_reg_operand")))]
- "TARGET_IBM128"
+ "TARGET_FLOAT128_TYPE"
{
rs6000_expand_float128_convert (operands[0], operands[1], false);
DONE;
})
-;; Convert between KFmode and TFmode when -mabi=ieeelongdouble
-(define_insn_and_split "*extendkftf2_internal"
- [(set (match_operand:TF 0 "gpc_reg_operand" "=wa,wa")
+(define_insn_and_split "*extend<mode>tf2_internal"
+ [(set (match_operand:TF 0 "gpc_reg_operand" "=<IFKF_reg>")
(float_extend:TF
- (match_operand:KF 1 "gpc_reg_operand" "0,wa")))]
- "FLOAT128_IEEE_P (TFmode)"
+ (match_operand:IFKF 1 "gpc_reg_operand" "<IFKF_reg>")))]
+ "TARGET_FLOAT128_TYPE
+ && FLOAT128_IBM_P (TFmode) == FLOAT128_IBM_P (<MODE>mode)"
"#"
"&& reload_completed"
[(set (match_dup 0) (match_dup 2))]
{
operands[2] = gen_rtx_REG (TFmode, REGNO (operands[1]));
-}
- [(set_attr "type" "vecsimple")])
+})
-(define_insn_and_split "*extendtfkf2_internal"
- [(set (match_operand:KF 0 "gpc_reg_operand" "=wa,wa")
- (float_extend:KF
- (match_operand:TF 1 "gpc_reg_operand" "0,wa")))]
- "FLOAT128_IEEE_P (TFmode)"
+(define_insn_and_split "*extendtf<mode>2_internal"
+ [(set (match_operand:IFKF 0 "gpc_reg_operand" "=<IFKF_reg>")
+ (float_extend:IFKF
+ (match_operand:TF 1 "gpc_reg_operand" "<IFKF_reg>")))]
+ "TARGET_FLOAT128_TYPE
+ && FLOAT128_IBM_P (TFmode) == FLOAT128_IBM_P (<MODE>mode)"
"#"
"&& reload_completed"
[(set (match_dup 0) (match_dup 2))]
{
- operands[2] = gen_rtx_REG (KFmode, REGNO (operands[1]));
-}
- [(set_attr "type" "vecsimple")])
-
-;; Convert between IFmode and TFmode when -mabi=ibmlongdouble
-(define_insn_and_split "*extendiftf2_internal"
- [(set (match_operand:TF 0 "gpc_reg_operand" "=d,&d")
- (float_extend:TF
- (match_operand:IF 1 "input_operand" "0,d")))]
- "FLOAT128_IBM_P (TFmode)"
- "#"
- "&& reload_completed"
- [(set (match_dup 2) (match_dup 3))
- (set (match_dup 4) (match_dup 5))]
-{
- unsigned int op0_regno = reg_or_subregno (operands[0]);
- unsigned int op1_regno = reg_or_subregno (operands[1]);
- operands[2] = gen_rtx_REG (DFmode, op0_regno);
- operands[3] = gen_rtx_REG (DFmode, op1_regno);
- operands[4] = gen_rtx_REG (DFmode, op0_regno + 1);
- operands[5] = gen_rtx_REG (DFmode, op1_regno + 1);
-}
- [(set_attr "type" "two")
- (set_attr "num_insns" "2")])
-
-(define_insn_and_split "*extendtfif2_internal"
- [(set (match_operand:IF 0 "gpc_reg_operand" "=d,&d")
- (float_extend:IF
- (match_operand:TF 1 "input_operand" "0,d")))]
- "FLOAT128_IBM_P (TFmode)"
- "#"
- "&& reload_completed"
- [(set (match_dup 2) (match_dup 3))
- (set (match_dup 4) (match_dup 5))]
-{
- unsigned int op0_regno = reg_or_subregno (operands[0]);
- unsigned int op1_regno = reg_or_subregno (operands[1]);
- operands[2] = gen_rtx_REG (DFmode, op0_regno);
- operands[3] = gen_rtx_REG (DFmode, op1_regno);
- operands[4] = gen_rtx_REG (DFmode, op0_regno + 1);
- operands[5] = gen_rtx_REG (DFmode, op1_regno + 1);
-}
- [(set_attr "type" "two")
- (set_attr "num_insns" "2")])
+ operands[2] = gen_rtx_REG (<MODE>mode, REGNO (operands[1]));
+})
\f
;; Reload helper functions used by rs6000_secondary_reload. The patterns all
diff --git a/gcc/testsuite/gcc.target/powerpc/divkc3-2.c b/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
index 0cfcea837ed..e34ed40bac2 100644
--- a/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
@@ -14,4 +14,4 @@ divide (cld_t *p, cld_t *q, cld_t *r)
*p = *q / *r;
}
-/* { dg-final { scan-assembler "bl __divtc3_ieee128" } } */
+/* { dg-final { scan-assembler "bl __divkc3" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c b/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
index 78ef1dc00f0..eee6de9e2a5 100644
--- a/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
@@ -14,4 +14,4 @@ multiply (cld_t *p, cld_t *q, cld_t *r)
*p = *q * *r;
}
-/* { dg-final { scan-assembler "bl __multc3_ieee128" } } */
+/* { dg-final { scan-assembler "bl __mulkc3" } } */
diff --git a/libgcc/config/rs6000/float128-ifunc.c b/libgcc/config/rs6000/float128-ifunc.c
index 30d46bcb233..73cbca2fc9a 100644
--- a/libgcc/config/rs6000/float128-ifunc.c
+++ b/libgcc/config/rs6000/float128-ifunc.c
@@ -359,9 +359,3 @@ TCtype __mulkc3 (TFtype, TFtype, TFtype, TFtype)
TCtype __divkc3 (TFtype, TFtype, TFtype, TFtype)
__attribute__ ((__ifunc__ ("__divkc3_resolve")));
-
-TCtype __multc3_ieee128 (TFtype, TFtype, TFtype, TFtype)
- __attribute__ ((__ifunc__ ("__mulkc3_resolve")));
-
-TCtype __divtc3_ieee128 (TFtype, TFtype, TFtype, TFtype)
- __attribute__ ((__ifunc__ ("__divkc3_resolve")));
diff --git a/libgcc/config/rs6000/quad-float128.h b/libgcc/config/rs6000/quad-float128.h
index a684d0e1bcf..ae0622c744c 100644
--- a/libgcc/config/rs6000/quad-float128.h
+++ b/libgcc/config/rs6000/quad-float128.h
@@ -191,11 +191,6 @@ extern TFtype __trunctfkf2 (IBM128_TYPE);
extern TCtype __mulkc3 (TFtype, TFtype, TFtype, TFtype);
extern TCtype __divkc3 (TFtype, TFtype, TFtype, TFtype);
-/* Complex long double multiply/divide if long double uses the IEEE 128-bit
- encoding. */
-extern TCtype __multc3_ieee128 (TFtype, TFtype, TFtype, TFtype);
-extern TCtype __divtc3_ieee128 (TFtype, TFtype, TFtype, TFtype);
-
/* Convert IEEE 128-bit floating point to/from string. We explicitly use
_Float128 instead of TFmode because _strtokf and _strfromkf must be compiled
with long double being IBM 128. */
^ permalink raw reply [flat|nested] 4+ messages in thread
* [gcc(refs/users/meissner/heads/work095)] Revert patches.
@ 2022-07-30 1:29 Michael Meissner
0 siblings, 0 replies; 4+ messages in thread
From: Michael Meissner @ 2022-07-30 1:29 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:c84000fcccb0825eded8ef267fe5538dacb2f6d9
commit c84000fcccb0825eded8ef267fe5538dacb2f6d9
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 29 21:28:10 2022 -0400
Revert patches.
2022-07-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patches.
PR target/105534
* config/rs6000/rs6000-builtins.cc (rs6000_init_builtins): Create
__ibm128 on older machines without IEEE 128-bit support.
* config/rs6000/rs600.cc (init_float128_ibm): Remove checks for hardware
floating point for the IBM 128-bit comparisons.
(rs6000_init_libfuncs): Create IBM 128-bit floating point support even
if we don't support IEEE 128-bit floating point.
(rs6000_scalar_mode_supported_p): Allow __ibm128 even if we don't
support _Float128.
* config/rs6000/rs6000.h (FLOAT128_IBM_P): Remove checks for
-mhard-float.
(TARGET_IBM128): New macro.
* config/rs6000/rs6000.md (@extenddf<mode>2_fprs): Allow IFmode to be
converted even if long double is not 128-bits.
(extenddf<mode>2_vsx): Likewise.
(extendtfif2): Allow conversion if we have __ibm128 but not IEEE 128-bit
floating point.
(trunckftf2): Likewise.
2022-07-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patches.
* config/rs6000/rs6000-builtin.cc (rs6000_type_string): Replace
ieee128_float_type_node with float128_type_node.
(rs6000_init_builtins): Use the float128_type_node for __float128 even
if long double uses the IEEE 128-bit encoding. The type node for
__ibm128 is a unqiue type node even if long double uses the IBM 128-bit
encoding.
(rs6000_expand_builtin): Delete code that converted built-in functions
using KFmode to the equivalant built-in function using TFmode if
-mabi=ieeelongdouble. Delete code that coverted built-in functions
using IFmode to the equivalent built-in function using TFmode if
-mabi=ibmlongdouble.
* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Delete
reference to ieee128_float_type_node.
(rs6000_cpu_cpp_builtins): Delete reference to ieee128_float_type_node.
Use TARGET_IBM128 for checking if __ibm128 is supported.
(is_float128_p): Delete.
(rs6000_builtin_type_compatible): For 128-bit floating point, check if
both types have the same encoding.
* config/rs6000/rs6000.cc (TARGET_TRANSLATE_MODE_ATTRIBUTE): Delete.
(init_float128_ieee): Delete creation of complex long double multiply
and divide here and move the implemention to rs6000_init_libfuncs.
(rs6000_init_libfuncs): Rework complex long double multiply and divide
support here if long double uses IEEE 128-bit encoding.
(rs6000_translate_mode_attribute): Delete.
(rs6000_libgcc_floating_mode_supported_p): Remove code that used TFmode
if long double used the IEEE 128-bit encoding.
(rs6000_floatn_mode): Likewise.
(rs6000_c_mode_for_suffix): Likewise.
* config/rs6000/rs6000.h (RS6000_BTI_ieee128_float): Delete.
(ieee128_float_type_node): Delete.
* config/rs6000/rs6000.md (IFKF): Delete.
(IFKF_reg): Delete.
(extendkfif2): New insn.
(trunckfif2): New insn.
(extend<mode>tf2_internal): Delete combined extend mode, and split it
into separate insns that either just handle IEEE 128-bit to IEEE 128-bit
conversions or IBM 128-bit to IBM 128-bit conversions.
(extendtf<mode>2_internal): Likewise.
(extendkftf2_internal): New insn.
(extendtfkf2_internal): New insn.
(extendiftf2_internal): New insn.
(extendtfif2_internal): New insn.
gcc/testsuite/
Revert patches.
* gcc.target/powerpc/divkc3-2: Update test to track compiler changes.
* gcc.target/powerpc/mulkc3-2: Likewise.
libgcc/
Revert patches.
* config/rs6000/float128-ifunc.c (__multc3_ieee128): New ifunc handler.
(__divtc3_ieee128): Likewise.
* config/rs6000/quad-float128.h (__multc3_ieee128): Add declaration.
(__divtc3_ieee128): Likewise.
2022-07-29 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patches.
PR target/85657
* config/rs6000/rs600.cc (rs6000_mangle_type): Mangle __ibm128 into
"u8__ibm128".
Diff:
---
gcc/config/rs6000/rs6000-builtin.cc | 120 ++++++++++++++++++++--
gcc/config/rs6000/rs6000-c.cc | 35 ++++---
gcc/config/rs6000/rs6000.cc | 151 ++++++++++++++--------------
gcc/config/rs6000/rs6000.h | 10 +-
gcc/config/rs6000/rs6000.md | 107 +++++---------------
gcc/testsuite/gcc.target/powerpc/divkc3-2.c | 2 +-
gcc/testsuite/gcc.target/powerpc/mulkc3-2.c | 2 +-
libgcc/config/rs6000/float128-ifunc.c | 6 --
libgcc/config/rs6000/quad-float128.h | 5 -
9 files changed, 242 insertions(+), 196 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index 3c2c9107aa6..67e86bee781 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -440,7 +440,7 @@ const char *rs6000_type_string (tree type_node)
return "ss";
else if (type_node == ibm128_float_type_node)
return "__ibm128";
- else if (type_node == float128_type_node)
+ else if (type_node == ieee128_float_type_node)
return "__ieee128";
else if (type_node == opaque_V4SI_type_node)
return "opaque";
@@ -719,12 +719,18 @@ rs6000_init_builtins (void)
For IEEE 128-bit floating point, always create the type __ieee128. If the
user used -mfloat128, rs6000-c.cc will create a define from __float128 to
__ieee128. */
- if (TARGET_IBM128)
+ if (TARGET_LONG_DOUBLE_128 && (!TARGET_IEEEQUAD || TARGET_FLOAT128_TYPE))
{
- ibm128_float_type_node = make_node (REAL_TYPE);
- TYPE_PRECISION (ibm128_float_type_node) = 128;
- SET_TYPE_MODE (ibm128_float_type_node, IFmode);
- layout_type (ibm128_float_type_node);
+ if (!TARGET_IEEEQUAD)
+ ibm128_float_type_node = long_double_type_node;
+ else
+ {
+ ibm128_float_type_node = make_node (REAL_TYPE);
+ TYPE_PRECISION (ibm128_float_type_node) = 128;
+ SET_TYPE_MODE (ibm128_float_type_node, IFmode);
+ layout_type (ibm128_float_type_node);
+ }
+ t = build_qualified_type (ibm128_float_type_node, TYPE_QUAL_CONST);
lang_hooks.types.register_builtin_type (ibm128_float_type_node,
"__ibm128");
}
@@ -732,8 +738,17 @@ rs6000_init_builtins (void)
ibm128_float_type_node = NULL_TREE;
if (TARGET_FLOAT128_TYPE)
- lang_hooks.types.register_builtin_type (float128_type_node,
- "__ieee128");
+ {
+ if (TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128)
+ ieee128_float_type_node = long_double_type_node;
+ else
+ ieee128_float_type_node = float128_type_node;
+ t = build_qualified_type (ieee128_float_type_node, TYPE_QUAL_CONST);
+ lang_hooks.types.register_builtin_type (ieee128_float_type_node,
+ "__ieee128");
+ }
+ else
+ ieee128_float_type_node = NULL_TREE;
/* Vector pair and vector quad support. */
vector_pair_type_node = make_node (OPAQUE_TYPE);
@@ -3287,6 +3302,79 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
size_t uns_fcode = (size_t)fcode;
enum insn_code icode = rs6000_builtin_info[uns_fcode].icode;
+ /* TODO: The following commentary and code is inherited from the original
+ builtin processing code. The commentary is a bit confusing, with the
+ intent being that KFmode is always IEEE-128, IFmode is always IBM
+ double-double, and TFmode is the current long double. The code is
+ confusing in that it converts from KFmode to TFmode pattern names,
+ when the other direction is more intuitive. Try to address this. */
+
+ /* We have two different modes (KFmode, TFmode) that are the IEEE
+ 128-bit floating point type, depending on whether long double is the
+ IBM extended double (KFmode) or long double is IEEE 128-bit (TFmode).
+ It is simpler if we only define one variant of the built-in function,
+ and switch the code when defining it, rather than defining two built-
+ ins and using the overload table in rs6000-c.cc to switch between the
+ two. If we don't have the proper assembler, don't do this switch
+ because CODE_FOR_*kf* and CODE_FOR_*tf* will be CODE_FOR_nothing. */
+ if (FLOAT128_IEEE_P (TFmode))
+ switch (icode)
+ {
+ case CODE_FOR_sqrtkf2_odd:
+ icode = CODE_FOR_sqrttf2_odd;
+ break;
+ case CODE_FOR_trunckfdf2_odd:
+ icode = CODE_FOR_trunctfdf2_odd;
+ break;
+ case CODE_FOR_addkf3_odd:
+ icode = CODE_FOR_addtf3_odd;
+ break;
+ case CODE_FOR_subkf3_odd:
+ icode = CODE_FOR_subtf3_odd;
+ break;
+ case CODE_FOR_mulkf3_odd:
+ icode = CODE_FOR_multf3_odd;
+ break;
+ case CODE_FOR_divkf3_odd:
+ icode = CODE_FOR_divtf3_odd;
+ break;
+ case CODE_FOR_fmakf4_odd:
+ icode = CODE_FOR_fmatf4_odd;
+ break;
+ case CODE_FOR_xsxexpqp_kf:
+ icode = CODE_FOR_xsxexpqp_tf;
+ break;
+ case CODE_FOR_xsxsigqp_kf:
+ icode = CODE_FOR_xsxsigqp_tf;
+ break;
+ case CODE_FOR_xststdcnegqp_kf:
+ icode = CODE_FOR_xststdcnegqp_tf;
+ break;
+ case CODE_FOR_xsiexpqp_kf:
+ icode = CODE_FOR_xsiexpqp_tf;
+ break;
+ case CODE_FOR_xsiexpqpf_kf:
+ icode = CODE_FOR_xsiexpqpf_tf;
+ break;
+ case CODE_FOR_xststdcqp_kf:
+ icode = CODE_FOR_xststdcqp_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_eq_kf:
+ icode = CODE_FOR_xscmpexpqp_eq_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_lt_kf:
+ icode = CODE_FOR_xscmpexpqp_lt_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_gt_kf:
+ icode = CODE_FOR_xscmpexpqp_gt_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_unordered_kf:
+ icode = CODE_FOR_xscmpexpqp_unordered_tf;
+ break;
+ default:
+ break;
+ }
+
/* In case of "#pragma target" changes, we initialize all builtins
but check for actual availability now, during expand time. For
invalid builtins, generate a normal call. */
@@ -3436,6 +3524,22 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
gcc_unreachable ();
}
+ if (bif_is_ibm128 (*bifaddr) && TARGET_LONG_DOUBLE_128 && !TARGET_IEEEQUAD)
+ {
+ if (fcode == RS6000_BIF_PACK_IF)
+ {
+ icode = CODE_FOR_packtf;
+ fcode = RS6000_BIF_PACK_TF;
+ uns_fcode = (size_t) fcode;
+ }
+ else if (fcode == RS6000_BIF_UNPACK_IF)
+ {
+ icode = CODE_FOR_unpacktf;
+ fcode = RS6000_BIF_UNPACK_TF;
+ uns_fcode = (size_t) fcode;
+ }
+ }
+
/* TRUE iff the built-in function returns void. */
bool void_func = TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node;
/* Position of first argument (0 for void-returning functions, else 1). */
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index 90dd107d4b4..4532cb4624b 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -585,7 +585,7 @@ rs6000_target_modify_macros (bool define_p, HOST_WIDE_INT flags,
rs6000_define_or_undefine_macro (true, "__float128=__ieee128");
else
rs6000_define_or_undefine_macro (false, "__float128");
- if (define_p)
+ if (ieee128_float_type_node && define_p)
rs6000_define_or_undefine_macro (true, "__SIZEOF_FLOAT128__=16");
else
rs6000_define_or_undefine_macro (false, "__SIZEOF_FLOAT128__");
@@ -628,12 +628,11 @@ rs6000_cpu_cpp_builtins (cpp_reader *pfile)
if (TARGET_FRSQRTES)
builtin_define ("__RSQRTEF__");
if (TARGET_FLOAT128_TYPE)
- {
- builtin_define ("__FLOAT128_TYPE__");
- builtin_define ("__SIZEOF_IEEE128__=16");
- }
- if (TARGET_IBM128)
+ builtin_define ("__FLOAT128_TYPE__");
+ if (ibm128_float_type_node)
builtin_define ("__SIZEOF_IBM128__=16");
+ if (ieee128_float_type_node)
+ builtin_define ("__SIZEOF_IEEE128__=16");
#ifdef TARGET_LIBC_PROVIDES_HWCAP_IN_TCB
builtin_define ("__BUILTIN_CPU_SUPPORTS__");
#endif
@@ -806,6 +805,22 @@ rs6000_builtin_type (int id)
return id < 0 ? build_pointer_type (t) : t;
}
+/* Check whether the type of an argument, T, is compatible with a type ID
+ stored into a struct altivec_builtin_types. Integer types are considered
+ compatible; otherwise, the language hook lang_hooks.types_compatible_p makes
+ the decision. Also allow long double and _Float128 to be compatible if
+ -mabi=ieeelongdouble. */
+
+static inline bool
+is_float128_p (tree t)
+{
+ return (t == float128_type_node
+ || (TARGET_IEEEQUAD
+ && TARGET_LONG_DOUBLE_128
+ && t == long_double_type_node));
+}
+
+
/* Return true iff ARGTYPE can be compatibly passed as PARMTYPE. */
static bool
rs6000_builtin_type_compatible (tree parmtype, tree argtype)
@@ -816,12 +831,8 @@ rs6000_builtin_type_compatible (tree parmtype, tree argtype)
if (INTEGRAL_TYPE_P (parmtype) && INTEGRAL_TYPE_P (argtype))
return true;
- machine_mode parmmode = TYPE_MODE (parmtype);
- machine_mode argmode = TYPE_MODE (argtype);
- if (FLOAT128_IEEE_P (parmmode) && FLOAT128_IEEE_P (argmode))
- return true;
-
- if (FLOAT128_IBM_P (parmmode) && FLOAT128_IBM_P (argmode))
+ if (TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128
+ && is_float128_p (parmtype) && is_float128_p (argtype))
return true;
if (POINTER_TYPE_P (parmtype) && POINTER_TYPE_P (argtype))
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 6f73c040035..ae61505123d 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -1545,6 +1545,9 @@ static const struct attribute_spec rs6000_attribute_table[] =
#undef TARGET_EH_RETURN_FILTER_MODE
#define TARGET_EH_RETURN_FILTER_MODE rs6000_eh_return_filter_mode
+#undef TARGET_TRANSLATE_MODE_ATTRIBUTE
+#define TARGET_TRANSLATE_MODE_ATTRIBUTE rs6000_translate_mode_attribute
+
#undef TARGET_SCALAR_MODE_SUPPORTED_P
#define TARGET_SCALAR_MODE_SUPPORTED_P rs6000_scalar_mode_supported_p
@@ -10977,23 +10980,26 @@ init_float128_ibm (machine_mode mode)
set_optab_libfunc (smul_optab, mode, "__gcc_qmul");
set_optab_libfunc (sdiv_optab, mode, "__gcc_qdiv");
- set_optab_libfunc (neg_optab, mode, "__gcc_qneg");
- set_optab_libfunc (eq_optab, mode, "__gcc_qeq");
- set_optab_libfunc (ne_optab, mode, "__gcc_qne");
- set_optab_libfunc (gt_optab, mode, "__gcc_qgt");
- set_optab_libfunc (ge_optab, mode, "__gcc_qge");
- set_optab_libfunc (lt_optab, mode, "__gcc_qlt");
- set_optab_libfunc (le_optab, mode, "__gcc_qle");
- set_optab_libfunc (unord_optab, mode, "__gcc_qunord");
-
- set_conv_libfunc (sext_optab, mode, SFmode, "__gcc_stoq");
- set_conv_libfunc (sext_optab, mode, DFmode, "__gcc_dtoq");
- set_conv_libfunc (trunc_optab, SFmode, mode, "__gcc_qtos");
- set_conv_libfunc (trunc_optab, DFmode, mode, "__gcc_qtod");
- set_conv_libfunc (sfix_optab, SImode, mode, "__gcc_qtoi");
- set_conv_libfunc (ufix_optab, SImode, mode, "__gcc_qtou");
- set_conv_libfunc (sfloat_optab, mode, SImode, "__gcc_itoq");
- set_conv_libfunc (ufloat_optab, mode, SImode, "__gcc_utoq");
+ if (!TARGET_HARD_FLOAT)
+ {
+ set_optab_libfunc (neg_optab, mode, "__gcc_qneg");
+ set_optab_libfunc (eq_optab, mode, "__gcc_qeq");
+ set_optab_libfunc (ne_optab, mode, "__gcc_qne");
+ set_optab_libfunc (gt_optab, mode, "__gcc_qgt");
+ set_optab_libfunc (ge_optab, mode, "__gcc_qge");
+ set_optab_libfunc (lt_optab, mode, "__gcc_qlt");
+ set_optab_libfunc (le_optab, mode, "__gcc_qle");
+ set_optab_libfunc (unord_optab, mode, "__gcc_qunord");
+
+ set_conv_libfunc (sext_optab, mode, SFmode, "__gcc_stoq");
+ set_conv_libfunc (sext_optab, mode, DFmode, "__gcc_dtoq");
+ set_conv_libfunc (trunc_optab, SFmode, mode, "__gcc_qtos");
+ set_conv_libfunc (trunc_optab, DFmode, mode, "__gcc_qtod");
+ set_conv_libfunc (sfix_optab, SImode, mode, "__gcc_qtoi");
+ set_conv_libfunc (ufix_optab, SImode, mode, "__gcc_qtou");
+ set_conv_libfunc (sfloat_optab, mode, SImode, "__gcc_itoq");
+ set_conv_libfunc (ufloat_optab, mode, SImode, "__gcc_utoq");
+ }
}
else
{
@@ -11061,6 +11067,32 @@ init_float128_ieee (machine_mode mode)
{
if (FLOAT128_VECTOR_P (mode))
{
+ static bool complex_muldiv_init_p = false;
+
+ /* Set up to call __mulkc3 and __divkc3 under -mabi=ieeelongdouble. If
+ we have clone or target attributes, this will be called a second
+ time. We want to create the built-in function only once. */
+ if (mode == TFmode && TARGET_IEEEQUAD && !complex_muldiv_init_p)
+ {
+ complex_muldiv_init_p = true;
+ built_in_function fncode_mul =
+ (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + TCmode
+ - MIN_MODE_COMPLEX_FLOAT);
+ built_in_function fncode_div =
+ (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + TCmode
+ - MIN_MODE_COMPLEX_FLOAT);
+
+ tree fntype = build_function_type_list (complex_long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ NULL_TREE);
+
+ create_complex_muldiv ("__mulkc3", fncode_mul, fntype);
+ create_complex_muldiv ("__divkc3", fncode_div, fntype);
+ }
+
set_optab_libfunc (add_optab, mode, "__addkf3");
set_optab_libfunc (sub_optab, mode, "__subkf3");
set_optab_libfunc (neg_optab, mode, "__negkf2");
@@ -11150,11 +11182,10 @@ rs6000_init_libfuncs (void)
{
/* __float128 support. */
if (TARGET_FLOAT128_TYPE)
- init_float128_ieee (KFmode);
-
- /* __ibm128 support. */
- if (TARGET_IBM128)
- init_float128_ibm (IFmode);
+ {
+ init_float128_ibm (IFmode);
+ init_float128_ieee (KFmode);
+ }
/* AIX/Darwin/64-bit Linux quad floating point routines. */
if (TARGET_LONG_DOUBLE_128)
@@ -11166,46 +11197,6 @@ rs6000_init_libfuncs (void)
else
init_float128_ieee (TFmode);
}
-
- /* Set up to call __mulkc3 and __divkc3 when long double uses the IEEE
- 128-bit encoding. We cannot use the same name (__mulkc3 or __divkc3 for
- both IEEE long double and for explicit _Float128/__float128) because
- c_builtin_function will complain if we create two built-in functions with
- the same name. Instead we use an alias name for the case when long double
- uses the IEEE 128-bit encoding. Libgcc will create a weak alias reference
- for this name.
-
- We need to only execute this once. If we have clone or target attributes,
- this will be called a second time. We need to create the built-in
- function only once. */
- static bool complex_muldiv_init_p = false;
-
- if (TARGET_FLOAT128_TYPE && TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128
- && !complex_muldiv_init_p)
- {
- complex_muldiv_init_p = true;
-
- tree fntype = build_function_type_list (complex_long_double_type_node,
- long_double_type_node,
- long_double_type_node,
- long_double_type_node,
- long_double_type_node,
- NULL_TREE);
-
- /* Create complex multiply. */
- built_in_function mul_fncode =
- (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + TCmode
- - MIN_MODE_COMPLEX_FLOAT);
-
- create_complex_muldiv ("__multc3_ieee128", mul_fncode, fntype);
-
- /* Create complex divide. */
- built_in_function div_fncode =
- (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + TCmode
- - MIN_MODE_COMPLEX_FLOAT);
-
- create_complex_muldiv ("__divtc3_ieee128", div_fncode, fntype);
- }
}
/* Emit a potentially record-form instruction, setting DST from SRC.
@@ -20195,12 +20186,6 @@ rs6000_mangle_type (const_tree type)
if (type == bool_int_type_node) return "U6__booli";
if (type == bool_long_long_type_node) return "U6__boolx";
- /* If long double uses the IBM 128-bit extended format, we need to
- distinguish between __ibm128 and long double. */
- if (type == ibm128_float_type_node && TARGET_LONG_DOUBLE_128
- && !TARGET_IEEEQUAD)
- return "u8__ibm128";
-
if (SCALAR_FLOAT_TYPE_P (type) && FLOAT128_IBM_P (TYPE_MODE (type)))
return "g";
if (SCALAR_FLOAT_TYPE_P (type) && FLOAT128_IEEE_P (TYPE_MODE (type)))
@@ -23808,6 +23793,18 @@ rs6000_eh_return_filter_mode (void)
return TARGET_32BIT ? SImode : word_mode;
}
+/* Target hook for translate_mode_attribute. */
+static machine_mode
+rs6000_translate_mode_attribute (machine_mode mode)
+{
+ if ((FLOAT128_IEEE_P (mode)
+ && ieee128_float_type_node == long_double_type_node)
+ || (FLOAT128_IBM_P (mode)
+ && ibm128_float_type_node == long_double_type_node))
+ return COMPLEX_MODE_P (mode) ? E_TCmode : E_TFmode;
+ return mode;
+}
+
/* Target hook for scalar_mode_supported_p. */
static bool
rs6000_scalar_mode_supported_p (scalar_mode mode)
@@ -23822,9 +23819,7 @@ rs6000_scalar_mode_supported_p (scalar_mode mode)
if (DECIMAL_FLOAT_MODE_P (mode))
return default_decimal_float_supported_p ();
- else if (TARGET_FLOAT128_TYPE && mode == KFmode)
- return true;
- else if (TARGET_IBM128 && mode == IFmode)
+ else if (TARGET_FLOAT128_TYPE && (mode == KFmode || mode == IFmode))
return true;
else
return default_scalar_mode_supported_p (mode);
@@ -23842,9 +23837,13 @@ rs6000_libgcc_floating_mode_supported_p (scalar_float_mode mode)
case E_TFmode:
return true;
- /* We only return true for KFmode if IEEE 128-bit types are supported. */
+ /* We only return true for KFmode if IEEE 128-bit types are supported, and
+ if long double does not use the IEEE 128-bit format. If long double
+ uses the IEEE 128-bit format, it will use TFmode and not KFmode.
+ Because the code will not use KFmode in that case, there will be aborts
+ because it can't find KFmode in the Floatn types. */
case E_KFmode:
- return TARGET_FLOAT128_TYPE;
+ return TARGET_FLOAT128_TYPE && !TARGET_IEEEQUAD;
default:
return false;
@@ -23878,7 +23877,7 @@ rs6000_floatn_mode (int n, bool extended)
case 64:
if (TARGET_FLOAT128_TYPE)
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
else
return opt_scalar_float_mode ();
@@ -23902,7 +23901,7 @@ rs6000_floatn_mode (int n, bool extended)
case 128:
if (TARGET_FLOAT128_TYPE)
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
else
return opt_scalar_float_mode ();
@@ -23920,7 +23919,7 @@ rs6000_c_mode_for_suffix (char suffix)
if (TARGET_FLOAT128_TYPE)
{
if (suffix == 'q' || suffix == 'Q')
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
/* At the moment, we are not defining a suffix for IBM extended double.
If/when the default for -mabi=ieeelongdouble is changed, and we want
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index c16b35fd9b1..7d04556304a 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -334,7 +334,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#define FLOAT128_IBM_P(MODE) \
((!TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128 \
&& ((MODE) == TFmode || (MODE) == TCmode)) \
- || ((MODE) == IFmode || (MODE) == ICmode))
+ || (TARGET_HARD_FLOAT && ((MODE) == IFmode || (MODE) == ICmode)))
/* Helper macros to say whether a 128-bit floating point type can go in a
single vector register, or whether it needs paired scalar values. */
@@ -561,12 +561,6 @@ extern int rs6000_vector_align[];
&& TARGET_P8_VECTOR \
&& TARGET_POWERPC64)
-/* Whether the __ibm128 keyword is allowed. Any system that supports _Float128
- is assumed to be capable of supporting __ibm128. Similarly if the long
- double size is 128 bits, we assume __ibm128 is supported. We don't want to
- support it on a system without existing 128-bit long doubles. */
-#define TARGET_IBM128 (TARGET_FLOAT128_TYPE || TARGET_LONG_DOUBLE_128)
-
/* Inlining allows targets to define the meanings of bits in target_info
field of ipa_fn_summary by itself, the used bits for rs6000 are listed
below. */
@@ -2265,6 +2259,7 @@ enum rs6000_builtin_type_index
RS6000_BTI_dfloat64, /* dfloat64_type_node */
RS6000_BTI_dfloat128, /* dfloat128_type_node */
RS6000_BTI_void, /* void_type_node */
+ RS6000_BTI_ieee128_float, /* ieee 128-bit floating point */
RS6000_BTI_ibm128_float, /* IBM 128-bit floating point */
RS6000_BTI_const_str, /* pointer to const char * */
RS6000_BTI_vector_pair, /* unsigned 256-bit types (vector pair). */
@@ -2359,6 +2354,7 @@ enum rs6000_builtin_type_index
#define dfloat64_type_internal_node (rs6000_builtin_types[RS6000_BTI_dfloat64])
#define dfloat128_type_internal_node (rs6000_builtin_types[RS6000_BTI_dfloat128])
#define void_type_internal_node (rs6000_builtin_types[RS6000_BTI_void])
+#define ieee128_float_type_node (rs6000_builtin_types[RS6000_BTI_ieee128_float])
#define ibm128_float_type_node (rs6000_builtin_types[RS6000_BTI_ibm128_float])
#define const_str_type_node (rs6000_builtin_types[RS6000_BTI_const_str])
#define vector_pair_type_node (rs6000_builtin_types[RS6000_BTI_vector_pair])
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index e17252bb8de..1367a2cb779 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -543,6 +543,12 @@
; Iterator for 128-bit VSX types for pack/unpack
(define_mode_iterator FMOVE128_VSX [V1TI KF])
+; Iterators for converting to/from TFmode
+(define_mode_iterator IFKF [IF KF])
+
+; Constraints for moving IF/KFmode.
+(define_mode_attr IFKF_reg [(IF "d") (KF "wa")])
+
; Whether a floating point move is ok, don't allow SD without hardware FP
(define_mode_attr fmove_ok [(SF "")
(DF "")
@@ -8580,7 +8586,8 @@
(float_extend:IBM128
(match_operand:DF 1 "nonimmediate_operand" "d,m,d")))
(use (match_operand:DF 2 "nonimmediate_operand" "m,m,d"))]
- "!TARGET_VSX && TARGET_HARD_FLOAT && FLOAT128_IBM_P (<MODE>mode)"
+ "!TARGET_VSX && TARGET_HARD_FLOAT
+ && TARGET_LONG_DOUBLE_128 && FLOAT128_IBM_P (<MODE>mode)"
"#"
"&& reload_completed"
[(set (match_dup 3) (match_dup 1))
@@ -8597,7 +8604,7 @@
[(set (match_operand:IBM128 0 "gpc_reg_operand" "=d,d")
(float_extend:IBM128
(match_operand:DF 1 "nonimmediate_operand" "wa,m")))]
- "TARGET_VSX && FLOAT128_IBM_P (<MODE>mode)"
+ "TARGET_LONG_DOUBLE_128 && TARGET_VSX && FLOAT128_IBM_P (<MODE>mode)"
"#"
"&& reload_completed"
[(set (match_dup 2) (match_dup 1))
@@ -9054,7 +9061,7 @@
(define_expand "extendiftf2"
[(set (match_operand:TF 0 "gpc_reg_operand")
(float_extend:TF (match_operand:IF 1 "gpc_reg_operand")))]
- "TARGET_IBM128"
+ "TARGET_FLOAT128_TYPE"
{
rs6000_expand_float128_convert (operands[0], operands[1], false);
DONE;
@@ -9069,15 +9076,6 @@
DONE;
})
-(define_expand "extendkfif2"
- [(set (match_operand:IF 0 "gpc_reg_operand")
- (float_extend:IF (match_operand:KF 1 "gpc_reg_operand")))]
- "TARGET_FLOAT128_TYPE"
-{
- rs6000_expand_float128_convert (operands[0], operands[1], false);
- DONE;
-})
-
(define_expand "extendtfkf2"
[(set (match_operand:KF 0 "gpc_reg_operand")
(float_extend:KF (match_operand:TF 1 "gpc_reg_operand")))]
@@ -9090,7 +9088,7 @@
(define_expand "extendtfif2"
[(set (match_operand:IF 0 "gpc_reg_operand")
(float_extend:IF (match_operand:TF 1 "gpc_reg_operand")))]
- "TARGET_IBM128"
+ "TARGET_FLOAT128_TYPE"
{
rs6000_expand_float128_convert (operands[0], operands[1], false);
DONE;
@@ -9099,7 +9097,7 @@
(define_expand "trunciftf2"
[(set (match_operand:TF 0 "gpc_reg_operand")
(float_truncate:TF (match_operand:IF 1 "gpc_reg_operand")))]
- "TARGET_IBM128"
+ "TARGET_FLOAT128_TYPE"
{
rs6000_expand_float128_convert (operands[0], operands[1], false);
DONE;
@@ -9114,15 +9112,6 @@
DONE;
})
-(define_expand "trunckfif2"
- [(set (match_operand:IF 0 "gpc_reg_operand")
- (float_truncate:IF (match_operand:KF 1 "gpc_reg_operand")))]
- "TARGET_FLOAT128_TYPE"
-{
- rs6000_expand_float128_convert (operands[0], operands[1], false);
- DONE;
-})
-
(define_expand "trunckftf2"
[(set (match_operand:TF 0 "gpc_reg_operand")
(float_truncate:TF (match_operand:KF 1 "gpc_reg_operand")))]
@@ -9135,79 +9124,37 @@
(define_expand "trunctfif2"
[(set (match_operand:IF 0 "gpc_reg_operand")
(float_truncate:IF (match_operand:TF 1 "gpc_reg_operand")))]
- "TARGET_IBM128"
+ "TARGET_FLOAT128_TYPE"
{
rs6000_expand_float128_convert (operands[0], operands[1], false);
DONE;
})
-;; Convert between KFmode and TFmode when -mabi=ieeelongdouble
-(define_insn_and_split "*extendkftf2_internal"
- [(set (match_operand:TF 0 "gpc_reg_operand" "=wa,wa")
+(define_insn_and_split "*extend<mode>tf2_internal"
+ [(set (match_operand:TF 0 "gpc_reg_operand" "=<IFKF_reg>")
(float_extend:TF
- (match_operand:KF 1 "gpc_reg_operand" "0,wa")))]
- "FLOAT128_IEEE_P (TFmode)"
+ (match_operand:IFKF 1 "gpc_reg_operand" "<IFKF_reg>")))]
+ "TARGET_FLOAT128_TYPE
+ && FLOAT128_IBM_P (TFmode) == FLOAT128_IBM_P (<MODE>mode)"
"#"
"&& reload_completed"
[(set (match_dup 0) (match_dup 2))]
{
operands[2] = gen_rtx_REG (TFmode, REGNO (operands[1]));
-}
- [(set_attr "type" "vecsimple")])
+})
-(define_insn_and_split "*extendtfkf2_internal"
- [(set (match_operand:KF 0 "gpc_reg_operand" "=wa,wa")
- (float_extend:KF
- (match_operand:TF 1 "gpc_reg_operand" "0,wa")))]
- "FLOAT128_IEEE_P (TFmode)"
+(define_insn_and_split "*extendtf<mode>2_internal"
+ [(set (match_operand:IFKF 0 "gpc_reg_operand" "=<IFKF_reg>")
+ (float_extend:IFKF
+ (match_operand:TF 1 "gpc_reg_operand" "<IFKF_reg>")))]
+ "TARGET_FLOAT128_TYPE
+ && FLOAT128_IBM_P (TFmode) == FLOAT128_IBM_P (<MODE>mode)"
"#"
"&& reload_completed"
[(set (match_dup 0) (match_dup 2))]
{
- operands[2] = gen_rtx_REG (KFmode, REGNO (operands[1]));
-}
- [(set_attr "type" "vecsimple")])
-
-;; Convert between IFmode and TFmode when -mabi=ibmlongdouble
-(define_insn_and_split "*extendiftf2_internal"
- [(set (match_operand:TF 0 "gpc_reg_operand" "=d,&d")
- (float_extend:TF
- (match_operand:IF 1 "input_operand" "0,d")))]
- "FLOAT128_IBM_P (TFmode)"
- "#"
- "&& reload_completed"
- [(set (match_dup 2) (match_dup 3))
- (set (match_dup 4) (match_dup 5))]
-{
- unsigned int op0_regno = reg_or_subregno (operands[0]);
- unsigned int op1_regno = reg_or_subregno (operands[1]);
- operands[2] = gen_rtx_REG (DFmode, op0_regno);
- operands[3] = gen_rtx_REG (DFmode, op1_regno);
- operands[4] = gen_rtx_REG (DFmode, op0_regno + 1);
- operands[5] = gen_rtx_REG (DFmode, op1_regno + 1);
-}
- [(set_attr "type" "two")
- (set_attr "num_insns" "2")])
-
-(define_insn_and_split "*extendtfif2_internal"
- [(set (match_operand:IF 0 "gpc_reg_operand" "=d,&d")
- (float_extend:IF
- (match_operand:TF 1 "input_operand" "0,d")))]
- "FLOAT128_IBM_P (TFmode)"
- "#"
- "&& reload_completed"
- [(set (match_dup 2) (match_dup 3))
- (set (match_dup 4) (match_dup 5))]
-{
- unsigned int op0_regno = reg_or_subregno (operands[0]);
- unsigned int op1_regno = reg_or_subregno (operands[1]);
- operands[2] = gen_rtx_REG (DFmode, op0_regno);
- operands[3] = gen_rtx_REG (DFmode, op1_regno);
- operands[4] = gen_rtx_REG (DFmode, op0_regno + 1);
- operands[5] = gen_rtx_REG (DFmode, op1_regno + 1);
-}
- [(set_attr "type" "two")
- (set_attr "num_insns" "2")])
+ operands[2] = gen_rtx_REG (<MODE>mode, REGNO (operands[1]));
+})
\f
;; Reload helper functions used by rs6000_secondary_reload. The patterns all
diff --git a/gcc/testsuite/gcc.target/powerpc/divkc3-2.c b/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
index 0cfcea837ed..e34ed40bac2 100644
--- a/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
@@ -14,4 +14,4 @@ divide (cld_t *p, cld_t *q, cld_t *r)
*p = *q / *r;
}
-/* { dg-final { scan-assembler "bl __divtc3_ieee128" } } */
+/* { dg-final { scan-assembler "bl __divkc3" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c b/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
index 78ef1dc00f0..eee6de9e2a5 100644
--- a/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
@@ -14,4 +14,4 @@ multiply (cld_t *p, cld_t *q, cld_t *r)
*p = *q * *r;
}
-/* { dg-final { scan-assembler "bl __multc3_ieee128" } } */
+/* { dg-final { scan-assembler "bl __mulkc3" } } */
diff --git a/libgcc/config/rs6000/float128-ifunc.c b/libgcc/config/rs6000/float128-ifunc.c
index 30d46bcb233..73cbca2fc9a 100644
--- a/libgcc/config/rs6000/float128-ifunc.c
+++ b/libgcc/config/rs6000/float128-ifunc.c
@@ -359,9 +359,3 @@ TCtype __mulkc3 (TFtype, TFtype, TFtype, TFtype)
TCtype __divkc3 (TFtype, TFtype, TFtype, TFtype)
__attribute__ ((__ifunc__ ("__divkc3_resolve")));
-
-TCtype __multc3_ieee128 (TFtype, TFtype, TFtype, TFtype)
- __attribute__ ((__ifunc__ ("__mulkc3_resolve")));
-
-TCtype __divtc3_ieee128 (TFtype, TFtype, TFtype, TFtype)
- __attribute__ ((__ifunc__ ("__divkc3_resolve")));
diff --git a/libgcc/config/rs6000/quad-float128.h b/libgcc/config/rs6000/quad-float128.h
index a684d0e1bcf..ae0622c744c 100644
--- a/libgcc/config/rs6000/quad-float128.h
+++ b/libgcc/config/rs6000/quad-float128.h
@@ -191,11 +191,6 @@ extern TFtype __trunctfkf2 (IBM128_TYPE);
extern TCtype __mulkc3 (TFtype, TFtype, TFtype, TFtype);
extern TCtype __divkc3 (TFtype, TFtype, TFtype, TFtype);
-/* Complex long double multiply/divide if long double uses the IEEE 128-bit
- encoding. */
-extern TCtype __multc3_ieee128 (TFtype, TFtype, TFtype, TFtype);
-extern TCtype __divtc3_ieee128 (TFtype, TFtype, TFtype, TFtype);
-
/* Convert IEEE 128-bit floating point to/from string. We explicitly use
_Float128 instead of TFmode because _strtokf and _strfromkf must be compiled
with long double being IBM 128. */
^ permalink raw reply [flat|nested] 4+ messages in thread
* [gcc(refs/users/meissner/heads/work095)] Revert patches.
@ 2022-07-29 0:51 Michael Meissner
0 siblings, 0 replies; 4+ messages in thread
From: Michael Meissner @ 2022-07-29 0:51 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:8ab18dc33865aaa73e3297a568c091134f9eaa20
commit 8ab18dc33865aaa73e3297a568c091134f9eaa20
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Thu Jul 28 20:50:14 2022 -0400
Revert patches.
2022-07-28 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patches.
* config/rs6000/rs600.cc (rs6000_mangle_type): Mangle __ibm128 into
"u8__ibm128".
2022-07-28 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patches.
* config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin): Remove all
of the code that changed KFmode built-in functions into TFmode, since
these functions now support overloading between KFmode and TFmode.
* config/rs6000/rs6000-c.cc (rs6000_builtin_type_compatible):
Don't consider _Float128 and long double under
-mabi=ieeelongdouble to be compatible for built-in functions. Use
overloading instead.
* config/rs6000/rs6000.md (IFKF): Delete.
(IFKF_reg): Delete.
(@extenddf<mode>2_fprs): Remove extra test for
TARGET_LONG_DOUBLE_128.
(@extenddf<mode2>_vsx): Likewise.
(extendiftf2): Allow __ibm128 even if _Float128 is not supported.
(extendkfif2): New insn.
(extendtfkf2): Allow __ibm128 even if _Float128 is not supported.
(extendtfif2): Likewise.
(trunckfif2): New insn.
(trunctfif2): Allow __ibm128 even if _Float128 is not supported.
(extendkftf2_internal): Split extend<mode>tf2_internal and
extendtf<mode>2_internal into separate insns that handle either
conversions between IEEE 128-bit types or between IBM 128-bit types.
Set the type and insn length correctly.
(extendtfkf2_internal): Likewise.
(extendiftf2_internal): Likewise.
(extendtfif2_internal): Likewise.
2022-07-28 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patches.
* config/rs6000/rs6000-builtin.cc (rs6000_init_builtins): Always
create a new tree node for __ibm128, even if long double uses the IBM
128-bit format. Always create a new tree node for __float128, even if
long double uses the IEEE 128-bit format.
* config/rs6000/rs600.cc (init_float128_ibm): Remove checks for
hardware floating point for the IBM 128-bit comparisons.
(init_float128_ieee): Do not create __mulkc3 and __divkc3 since
__float128 always creates these functions.
(rs6000_init_libfuncs): Create complex multiply and divide for long
double if long double uses the IEEE 128-bit encoding.
(rs6000_scalar_mode_supported_p): Allow __ibm128 even if we don't
support _Float128.
(rs6000_libgcc_floating_mode_supported_p): Allow KFmode if IEEE
128-bit floating point is supported. Allow IFmode if either IEEE
128-bit floating point is supported or long double is IBM 128-bit.
(rs6000_floatn_mode): Always return KFmode for IEEE 128-bit. Do not
return TFmode, even if long double uses the IEEE 128-bit format.
(rs6000_c_mode_for_suffix): The 'q' suffix always uses KFmode, even if
long double uses the IEEE 128-bit encoding.
* config/rs6000/rs6000.h (FLOAT128_IBM_P): Remove checks for
-mhard-float.
(TARGET_IBM128): New macro.
gcc/testsuite/
Revert patches.
* gcc.target/powerpc/mulkd3-2.c: Update test.
* gcc.target/powerpc/divkd3-2.c: Likewise.
libgcc/
Revert patches.
* config/rs6000/float128-ifunc.c (__multc3_ieee128): Add ifunc
support.
(__divtc3_ieee128): Likewise.
* config/rs6000/quad-float128.h (__multc3_ieee128): Add
Declaration.
(__divtc3_ieee128): Likewise.
Diff:
---
gcc/config/rs6000/rs6000-builtin.cc | 111 +++++++++++++++++++++--
gcc/config/rs6000/rs6000-c.cc | 10 +-
gcc/config/rs6000/rs6000.cc | 136 ++++++++++++----------------
gcc/config/rs6000/rs6000.h | 8 +-
gcc/config/rs6000/rs6000.md | 107 ++++++----------------
gcc/testsuite/gcc.target/powerpc/divkc3-2.c | 2 +-
gcc/testsuite/gcc.target/powerpc/mulkc3-2.c | 2 +-
libgcc/config/rs6000/float128-ifunc.c | 6 --
libgcc/config/rs6000/quad-float128.h | 5 -
9 files changed, 198 insertions(+), 189 deletions(-)
diff --git a/gcc/config/rs6000/rs6000-builtin.cc b/gcc/config/rs6000/rs6000-builtin.cc
index 601232148f8..67e86bee781 100644
--- a/gcc/config/rs6000/rs6000-builtin.cc
+++ b/gcc/config/rs6000/rs6000-builtin.cc
@@ -719,12 +719,18 @@ rs6000_init_builtins (void)
For IEEE 128-bit floating point, always create the type __ieee128. If the
user used -mfloat128, rs6000-c.cc will create a define from __float128 to
__ieee128. */
- if (TARGET_IBM128)
+ if (TARGET_LONG_DOUBLE_128 && (!TARGET_IEEEQUAD || TARGET_FLOAT128_TYPE))
{
- ibm128_float_type_node = make_node (REAL_TYPE);
- TYPE_PRECISION (ibm128_float_type_node) = 128;
- SET_TYPE_MODE (ibm128_float_type_node, IFmode);
- layout_type (ibm128_float_type_node);
+ if (!TARGET_IEEEQUAD)
+ ibm128_float_type_node = long_double_type_node;
+ else
+ {
+ ibm128_float_type_node = make_node (REAL_TYPE);
+ TYPE_PRECISION (ibm128_float_type_node) = 128;
+ SET_TYPE_MODE (ibm128_float_type_node, IFmode);
+ layout_type (ibm128_float_type_node);
+ }
+ t = build_qualified_type (ibm128_float_type_node, TYPE_QUAL_CONST);
lang_hooks.types.register_builtin_type (ibm128_float_type_node,
"__ibm128");
}
@@ -733,7 +739,11 @@ rs6000_init_builtins (void)
if (TARGET_FLOAT128_TYPE)
{
- ieee128_float_type_node = float128_type_node;
+ if (TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128)
+ ieee128_float_type_node = long_double_type_node;
+ else
+ ieee128_float_type_node = float128_type_node;
+ t = build_qualified_type (ieee128_float_type_node, TYPE_QUAL_CONST);
lang_hooks.types.register_builtin_type (ieee128_float_type_node,
"__ieee128");
}
@@ -3292,6 +3302,79 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
size_t uns_fcode = (size_t)fcode;
enum insn_code icode = rs6000_builtin_info[uns_fcode].icode;
+ /* TODO: The following commentary and code is inherited from the original
+ builtin processing code. The commentary is a bit confusing, with the
+ intent being that KFmode is always IEEE-128, IFmode is always IBM
+ double-double, and TFmode is the current long double. The code is
+ confusing in that it converts from KFmode to TFmode pattern names,
+ when the other direction is more intuitive. Try to address this. */
+
+ /* We have two different modes (KFmode, TFmode) that are the IEEE
+ 128-bit floating point type, depending on whether long double is the
+ IBM extended double (KFmode) or long double is IEEE 128-bit (TFmode).
+ It is simpler if we only define one variant of the built-in function,
+ and switch the code when defining it, rather than defining two built-
+ ins and using the overload table in rs6000-c.cc to switch between the
+ two. If we don't have the proper assembler, don't do this switch
+ because CODE_FOR_*kf* and CODE_FOR_*tf* will be CODE_FOR_nothing. */
+ if (FLOAT128_IEEE_P (TFmode))
+ switch (icode)
+ {
+ case CODE_FOR_sqrtkf2_odd:
+ icode = CODE_FOR_sqrttf2_odd;
+ break;
+ case CODE_FOR_trunckfdf2_odd:
+ icode = CODE_FOR_trunctfdf2_odd;
+ break;
+ case CODE_FOR_addkf3_odd:
+ icode = CODE_FOR_addtf3_odd;
+ break;
+ case CODE_FOR_subkf3_odd:
+ icode = CODE_FOR_subtf3_odd;
+ break;
+ case CODE_FOR_mulkf3_odd:
+ icode = CODE_FOR_multf3_odd;
+ break;
+ case CODE_FOR_divkf3_odd:
+ icode = CODE_FOR_divtf3_odd;
+ break;
+ case CODE_FOR_fmakf4_odd:
+ icode = CODE_FOR_fmatf4_odd;
+ break;
+ case CODE_FOR_xsxexpqp_kf:
+ icode = CODE_FOR_xsxexpqp_tf;
+ break;
+ case CODE_FOR_xsxsigqp_kf:
+ icode = CODE_FOR_xsxsigqp_tf;
+ break;
+ case CODE_FOR_xststdcnegqp_kf:
+ icode = CODE_FOR_xststdcnegqp_tf;
+ break;
+ case CODE_FOR_xsiexpqp_kf:
+ icode = CODE_FOR_xsiexpqp_tf;
+ break;
+ case CODE_FOR_xsiexpqpf_kf:
+ icode = CODE_FOR_xsiexpqpf_tf;
+ break;
+ case CODE_FOR_xststdcqp_kf:
+ icode = CODE_FOR_xststdcqp_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_eq_kf:
+ icode = CODE_FOR_xscmpexpqp_eq_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_lt_kf:
+ icode = CODE_FOR_xscmpexpqp_lt_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_gt_kf:
+ icode = CODE_FOR_xscmpexpqp_gt_tf;
+ break;
+ case CODE_FOR_xscmpexpqp_unordered_kf:
+ icode = CODE_FOR_xscmpexpqp_unordered_tf;
+ break;
+ default:
+ break;
+ }
+
/* In case of "#pragma target" changes, we initialize all builtins
but check for actual availability now, during expand time. For
invalid builtins, generate a normal call. */
@@ -3441,6 +3524,22 @@ rs6000_expand_builtin (tree exp, rtx target, rtx /* subtarget */,
gcc_unreachable ();
}
+ if (bif_is_ibm128 (*bifaddr) && TARGET_LONG_DOUBLE_128 && !TARGET_IEEEQUAD)
+ {
+ if (fcode == RS6000_BIF_PACK_IF)
+ {
+ icode = CODE_FOR_packtf;
+ fcode = RS6000_BIF_PACK_TF;
+ uns_fcode = (size_t) fcode;
+ }
+ else if (fcode == RS6000_BIF_UNPACK_IF)
+ {
+ icode = CODE_FOR_unpacktf;
+ fcode = RS6000_BIF_UNPACK_TF;
+ uns_fcode = (size_t) fcode;
+ }
+ }
+
/* TRUE iff the built-in function returns void. */
bool void_func = TREE_TYPE (TREE_TYPE (fndecl)) == void_type_node;
/* Position of first argument (0 for void-returning functions, else 1). */
diff --git a/gcc/config/rs6000/rs6000-c.cc b/gcc/config/rs6000/rs6000-c.cc
index 364487cf19a..4532cb4624b 100644
--- a/gcc/config/rs6000/rs6000-c.cc
+++ b/gcc/config/rs6000/rs6000-c.cc
@@ -808,11 +808,8 @@ rs6000_builtin_type (int id)
/* Check whether the type of an argument, T, is compatible with a type ID
stored into a struct altivec_builtin_types. Integer types are considered
compatible; otherwise, the language hook lang_hooks.types_compatible_p makes
- the decision.
-
- In the past, we used to consider _Float128 and long double to be compatible
- under -mabi=ieeelongdouble. We no longer consider them compatible and use
- the overload mechanism to deal with KFmode vs. TFmode types. */
+ the decision. Also allow long double and _Float128 to be compatible if
+ -mabi=ieeelongdouble. */
static inline bool
is_float128_p (tree t)
@@ -835,8 +832,7 @@ rs6000_builtin_type_compatible (tree parmtype, tree argtype)
return true;
if (TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128
- && is_float128_p (parmtype) && is_float128_p (argtype)
- && TYPE_MODE (parmtype) == TYPE_MODE (argtype))
+ && is_float128_p (parmtype) && is_float128_p (argtype))
return true;
if (POINTER_TYPE_P (parmtype) && POINTER_TYPE_P (argtype))
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index a5d67f534c2..ae61505123d 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -10980,23 +10980,26 @@ init_float128_ibm (machine_mode mode)
set_optab_libfunc (smul_optab, mode, "__gcc_qmul");
set_optab_libfunc (sdiv_optab, mode, "__gcc_qdiv");
- set_optab_libfunc (neg_optab, mode, "__gcc_qneg");
- set_optab_libfunc (eq_optab, mode, "__gcc_qeq");
- set_optab_libfunc (ne_optab, mode, "__gcc_qne");
- set_optab_libfunc (gt_optab, mode, "__gcc_qgt");
- set_optab_libfunc (ge_optab, mode, "__gcc_qge");
- set_optab_libfunc (lt_optab, mode, "__gcc_qlt");
- set_optab_libfunc (le_optab, mode, "__gcc_qle");
- set_optab_libfunc (unord_optab, mode, "__gcc_qunord");
-
- set_conv_libfunc (sext_optab, mode, SFmode, "__gcc_stoq");
- set_conv_libfunc (sext_optab, mode, DFmode, "__gcc_dtoq");
- set_conv_libfunc (trunc_optab, SFmode, mode, "__gcc_qtos");
- set_conv_libfunc (trunc_optab, DFmode, mode, "__gcc_qtod");
- set_conv_libfunc (sfix_optab, SImode, mode, "__gcc_qtoi");
- set_conv_libfunc (ufix_optab, SImode, mode, "__gcc_qtou");
- set_conv_libfunc (sfloat_optab, mode, SImode, "__gcc_itoq");
- set_conv_libfunc (ufloat_optab, mode, SImode, "__gcc_utoq");
+ if (!TARGET_HARD_FLOAT)
+ {
+ set_optab_libfunc (neg_optab, mode, "__gcc_qneg");
+ set_optab_libfunc (eq_optab, mode, "__gcc_qeq");
+ set_optab_libfunc (ne_optab, mode, "__gcc_qne");
+ set_optab_libfunc (gt_optab, mode, "__gcc_qgt");
+ set_optab_libfunc (ge_optab, mode, "__gcc_qge");
+ set_optab_libfunc (lt_optab, mode, "__gcc_qlt");
+ set_optab_libfunc (le_optab, mode, "__gcc_qle");
+ set_optab_libfunc (unord_optab, mode, "__gcc_qunord");
+
+ set_conv_libfunc (sext_optab, mode, SFmode, "__gcc_stoq");
+ set_conv_libfunc (sext_optab, mode, DFmode, "__gcc_dtoq");
+ set_conv_libfunc (trunc_optab, SFmode, mode, "__gcc_qtos");
+ set_conv_libfunc (trunc_optab, DFmode, mode, "__gcc_qtod");
+ set_conv_libfunc (sfix_optab, SImode, mode, "__gcc_qtoi");
+ set_conv_libfunc (ufix_optab, SImode, mode, "__gcc_qtou");
+ set_conv_libfunc (sfloat_optab, mode, SImode, "__gcc_itoq");
+ set_conv_libfunc (ufloat_optab, mode, SImode, "__gcc_utoq");
+ }
}
else
{
@@ -11064,6 +11067,32 @@ init_float128_ieee (machine_mode mode)
{
if (FLOAT128_VECTOR_P (mode))
{
+ static bool complex_muldiv_init_p = false;
+
+ /* Set up to call __mulkc3 and __divkc3 under -mabi=ieeelongdouble. If
+ we have clone or target attributes, this will be called a second
+ time. We want to create the built-in function only once. */
+ if (mode == TFmode && TARGET_IEEEQUAD && !complex_muldiv_init_p)
+ {
+ complex_muldiv_init_p = true;
+ built_in_function fncode_mul =
+ (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + TCmode
+ - MIN_MODE_COMPLEX_FLOAT);
+ built_in_function fncode_div =
+ (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + TCmode
+ - MIN_MODE_COMPLEX_FLOAT);
+
+ tree fntype = build_function_type_list (complex_long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ long_double_type_node,
+ NULL_TREE);
+
+ create_complex_muldiv ("__mulkc3", fncode_mul, fntype);
+ create_complex_muldiv ("__divkc3", fncode_div, fntype);
+ }
+
set_optab_libfunc (add_optab, mode, "__addkf3");
set_optab_libfunc (sub_optab, mode, "__subkf3");
set_optab_libfunc (neg_optab, mode, "__negkf2");
@@ -11153,11 +11182,10 @@ rs6000_init_libfuncs (void)
{
/* __float128 support. */
if (TARGET_FLOAT128_TYPE)
- init_float128_ieee (KFmode);
-
- /* __ibm128 support. */
- if (TARGET_IBM128)
- init_float128_ibm (IFmode);
+ {
+ init_float128_ibm (IFmode);
+ init_float128_ieee (KFmode);
+ }
/* AIX/Darwin/64-bit Linux quad floating point routines. */
if (TARGET_LONG_DOUBLE_128)
@@ -11169,46 +11197,6 @@ rs6000_init_libfuncs (void)
else
init_float128_ieee (TFmode);
}
-
- /* Set up to call __mulkc3 and __divkc3 when long double uses the IEEE
- 128-bit encoding. We cannot use the same name (__mulkc3 or __divkc3 for
- both IEEE long double and for explicit _Float128/__float128) because
- c_builtin_function will complain if we create two built-in functions with
- the same name. Instead we use an alias name for the case when long double
- uses the IEEE 128-bit encoding. Libgcc will create a weak alias reference
- for this name.
-
- We need to only execute this once. If we have clone or target attributes,
- this will be called a second time. We need to create the built-in
- function only once. */
- static bool complex_muldiv_init_p = false;
-
- if (TARGET_FLOAT128_TYPE && TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128
- && !complex_muldiv_init_p)
- {
- complex_muldiv_init_p = true;
-
- tree fntype = build_function_type_list (complex_long_double_type_node,
- long_double_type_node,
- long_double_type_node,
- long_double_type_node,
- long_double_type_node,
- NULL_TREE);
-
- /* Create complex multiply. */
- built_in_function mul_fncode =
- (built_in_function) (BUILT_IN_COMPLEX_MUL_MIN + TCmode
- - MIN_MODE_COMPLEX_FLOAT);
-
- create_complex_muldiv ("__multc3_ieee128", mul_fncode, fntype);
-
- /* Create complex divide. */
- built_in_function div_fncode =
- (built_in_function) (BUILT_IN_COMPLEX_DIV_MIN + TCmode
- - MIN_MODE_COMPLEX_FLOAT);
-
- create_complex_muldiv ("__divtc3_ieee128", div_fncode, fntype);
- }
}
/* Emit a potentially record-form instruction, setting DST from SRC.
@@ -20198,12 +20186,6 @@ rs6000_mangle_type (const_tree type)
if (type == bool_int_type_node) return "U6__booli";
if (type == bool_long_long_type_node) return "U6__boolx";
- /* If long double uses the IBM 128-bit extended format, we need to
- distinguish between __ibm128 and long double. */
- if (type == ibm128_float_type_node && TARGET_LONG_DOUBLE_128
- && !TARGET_IEEEQUAD)
- return "u8__ibm128";
-
if (SCALAR_FLOAT_TYPE_P (type) && FLOAT128_IBM_P (TYPE_MODE (type)))
return "g";
if (SCALAR_FLOAT_TYPE_P (type) && FLOAT128_IEEE_P (TYPE_MODE (type)))
@@ -23837,9 +23819,7 @@ rs6000_scalar_mode_supported_p (scalar_mode mode)
if (DECIMAL_FLOAT_MODE_P (mode))
return default_decimal_float_supported_p ();
- else if (TARGET_FLOAT128_TYPE && mode == KFmode)
- return true;
- else if (TARGET_IBM128 && mode == IFmode)
+ else if (TARGET_FLOAT128_TYPE && (mode == KFmode || mode == IFmode))
return true;
else
return default_scalar_mode_supported_p (mode);
@@ -23857,9 +23837,13 @@ rs6000_libgcc_floating_mode_supported_p (scalar_float_mode mode)
case E_TFmode:
return true;
- /* We only return true for KFmode if IEEE 128-bit types are supported. */
+ /* We only return true for KFmode if IEEE 128-bit types are supported, and
+ if long double does not use the IEEE 128-bit format. If long double
+ uses the IEEE 128-bit format, it will use TFmode and not KFmode.
+ Because the code will not use KFmode in that case, there will be aborts
+ because it can't find KFmode in the Floatn types. */
case E_KFmode:
- return TARGET_FLOAT128_TYPE;
+ return TARGET_FLOAT128_TYPE && !TARGET_IEEEQUAD;
default:
return false;
@@ -23893,7 +23877,7 @@ rs6000_floatn_mode (int n, bool extended)
case 64:
if (TARGET_FLOAT128_TYPE)
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
else
return opt_scalar_float_mode ();
@@ -23917,7 +23901,7 @@ rs6000_floatn_mode (int n, bool extended)
case 128:
if (TARGET_FLOAT128_TYPE)
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
else
return opt_scalar_float_mode ();
@@ -23935,7 +23919,7 @@ rs6000_c_mode_for_suffix (char suffix)
if (TARGET_FLOAT128_TYPE)
{
if (suffix == 'q' || suffix == 'Q')
- return KFmode;
+ return (FLOAT128_IEEE_P (TFmode)) ? TFmode : KFmode;
/* At the moment, we are not defining a suffix for IBM extended double.
If/when the default for -mabi=ieeelongdouble is changed, and we want
diff --git a/gcc/config/rs6000/rs6000.h b/gcc/config/rs6000/rs6000.h
index 7bbd9ab5238..7d04556304a 100644
--- a/gcc/config/rs6000/rs6000.h
+++ b/gcc/config/rs6000/rs6000.h
@@ -334,7 +334,7 @@ extern const char *host_detect_local_cpu (int argc, const char **argv);
#define FLOAT128_IBM_P(MODE) \
((!TARGET_IEEEQUAD && TARGET_LONG_DOUBLE_128 \
&& ((MODE) == TFmode || (MODE) == TCmode)) \
- || ((MODE) == IFmode || (MODE) == ICmode))
+ || (TARGET_HARD_FLOAT && ((MODE) == IFmode || (MODE) == ICmode)))
/* Helper macros to say whether a 128-bit floating point type can go in a
single vector register, or whether it needs paired scalar values. */
@@ -561,12 +561,6 @@ extern int rs6000_vector_align[];
&& TARGET_P8_VECTOR \
&& TARGET_POWERPC64)
-/* Whether the __ibm128 keyword is allowed. Any system that supports _Float128
- is assumed to be capable of supporting __ibm128. Similarly if the long
- double size is 128 bits, we assume __ibm128 is supported. We don't want to
- support it on a system without existing 128-bit long doubles. */
-#define TARGET_IBM128 (TARGET_FLOAT128_TYPE || TARGET_LONG_DOUBLE_128)
-
/* Inlining allows targets to define the meanings of bits in target_info
field of ipa_fn_summary by itself, the used bits for rs6000 are listed
below. */
diff --git a/gcc/config/rs6000/rs6000.md b/gcc/config/rs6000/rs6000.md
index e17252bb8de..1367a2cb779 100644
--- a/gcc/config/rs6000/rs6000.md
+++ b/gcc/config/rs6000/rs6000.md
@@ -543,6 +543,12 @@
; Iterator for 128-bit VSX types for pack/unpack
(define_mode_iterator FMOVE128_VSX [V1TI KF])
+; Iterators for converting to/from TFmode
+(define_mode_iterator IFKF [IF KF])
+
+; Constraints for moving IF/KFmode.
+(define_mode_attr IFKF_reg [(IF "d") (KF "wa")])
+
; Whether a floating point move is ok, don't allow SD without hardware FP
(define_mode_attr fmove_ok [(SF "")
(DF "")
@@ -8580,7 +8586,8 @@
(float_extend:IBM128
(match_operand:DF 1 "nonimmediate_operand" "d,m,d")))
(use (match_operand:DF 2 "nonimmediate_operand" "m,m,d"))]
- "!TARGET_VSX && TARGET_HARD_FLOAT && FLOAT128_IBM_P (<MODE>mode)"
+ "!TARGET_VSX && TARGET_HARD_FLOAT
+ && TARGET_LONG_DOUBLE_128 && FLOAT128_IBM_P (<MODE>mode)"
"#"
"&& reload_completed"
[(set (match_dup 3) (match_dup 1))
@@ -8597,7 +8604,7 @@
[(set (match_operand:IBM128 0 "gpc_reg_operand" "=d,d")
(float_extend:IBM128
(match_operand:DF 1 "nonimmediate_operand" "wa,m")))]
- "TARGET_VSX && FLOAT128_IBM_P (<MODE>mode)"
+ "TARGET_LONG_DOUBLE_128 && TARGET_VSX && FLOAT128_IBM_P (<MODE>mode)"
"#"
"&& reload_completed"
[(set (match_dup 2) (match_dup 1))
@@ -9054,7 +9061,7 @@
(define_expand "extendiftf2"
[(set (match_operand:TF 0 "gpc_reg_operand")
(float_extend:TF (match_operand:IF 1 "gpc_reg_operand")))]
- "TARGET_IBM128"
+ "TARGET_FLOAT128_TYPE"
{
rs6000_expand_float128_convert (operands[0], operands[1], false);
DONE;
@@ -9069,15 +9076,6 @@
DONE;
})
-(define_expand "extendkfif2"
- [(set (match_operand:IF 0 "gpc_reg_operand")
- (float_extend:IF (match_operand:KF 1 "gpc_reg_operand")))]
- "TARGET_FLOAT128_TYPE"
-{
- rs6000_expand_float128_convert (operands[0], operands[1], false);
- DONE;
-})
-
(define_expand "extendtfkf2"
[(set (match_operand:KF 0 "gpc_reg_operand")
(float_extend:KF (match_operand:TF 1 "gpc_reg_operand")))]
@@ -9090,7 +9088,7 @@
(define_expand "extendtfif2"
[(set (match_operand:IF 0 "gpc_reg_operand")
(float_extend:IF (match_operand:TF 1 "gpc_reg_operand")))]
- "TARGET_IBM128"
+ "TARGET_FLOAT128_TYPE"
{
rs6000_expand_float128_convert (operands[0], operands[1], false);
DONE;
@@ -9099,7 +9097,7 @@
(define_expand "trunciftf2"
[(set (match_operand:TF 0 "gpc_reg_operand")
(float_truncate:TF (match_operand:IF 1 "gpc_reg_operand")))]
- "TARGET_IBM128"
+ "TARGET_FLOAT128_TYPE"
{
rs6000_expand_float128_convert (operands[0], operands[1], false);
DONE;
@@ -9114,15 +9112,6 @@
DONE;
})
-(define_expand "trunckfif2"
- [(set (match_operand:IF 0 "gpc_reg_operand")
- (float_truncate:IF (match_operand:KF 1 "gpc_reg_operand")))]
- "TARGET_FLOAT128_TYPE"
-{
- rs6000_expand_float128_convert (operands[0], operands[1], false);
- DONE;
-})
-
(define_expand "trunckftf2"
[(set (match_operand:TF 0 "gpc_reg_operand")
(float_truncate:TF (match_operand:KF 1 "gpc_reg_operand")))]
@@ -9135,79 +9124,37 @@
(define_expand "trunctfif2"
[(set (match_operand:IF 0 "gpc_reg_operand")
(float_truncate:IF (match_operand:TF 1 "gpc_reg_operand")))]
- "TARGET_IBM128"
+ "TARGET_FLOAT128_TYPE"
{
rs6000_expand_float128_convert (operands[0], operands[1], false);
DONE;
})
-;; Convert between KFmode and TFmode when -mabi=ieeelongdouble
-(define_insn_and_split "*extendkftf2_internal"
- [(set (match_operand:TF 0 "gpc_reg_operand" "=wa,wa")
+(define_insn_and_split "*extend<mode>tf2_internal"
+ [(set (match_operand:TF 0 "gpc_reg_operand" "=<IFKF_reg>")
(float_extend:TF
- (match_operand:KF 1 "gpc_reg_operand" "0,wa")))]
- "FLOAT128_IEEE_P (TFmode)"
+ (match_operand:IFKF 1 "gpc_reg_operand" "<IFKF_reg>")))]
+ "TARGET_FLOAT128_TYPE
+ && FLOAT128_IBM_P (TFmode) == FLOAT128_IBM_P (<MODE>mode)"
"#"
"&& reload_completed"
[(set (match_dup 0) (match_dup 2))]
{
operands[2] = gen_rtx_REG (TFmode, REGNO (operands[1]));
-}
- [(set_attr "type" "vecsimple")])
+})
-(define_insn_and_split "*extendtfkf2_internal"
- [(set (match_operand:KF 0 "gpc_reg_operand" "=wa,wa")
- (float_extend:KF
- (match_operand:TF 1 "gpc_reg_operand" "0,wa")))]
- "FLOAT128_IEEE_P (TFmode)"
+(define_insn_and_split "*extendtf<mode>2_internal"
+ [(set (match_operand:IFKF 0 "gpc_reg_operand" "=<IFKF_reg>")
+ (float_extend:IFKF
+ (match_operand:TF 1 "gpc_reg_operand" "<IFKF_reg>")))]
+ "TARGET_FLOAT128_TYPE
+ && FLOAT128_IBM_P (TFmode) == FLOAT128_IBM_P (<MODE>mode)"
"#"
"&& reload_completed"
[(set (match_dup 0) (match_dup 2))]
{
- operands[2] = gen_rtx_REG (KFmode, REGNO (operands[1]));
-}
- [(set_attr "type" "vecsimple")])
-
-;; Convert between IFmode and TFmode when -mabi=ibmlongdouble
-(define_insn_and_split "*extendiftf2_internal"
- [(set (match_operand:TF 0 "gpc_reg_operand" "=d,&d")
- (float_extend:TF
- (match_operand:IF 1 "input_operand" "0,d")))]
- "FLOAT128_IBM_P (TFmode)"
- "#"
- "&& reload_completed"
- [(set (match_dup 2) (match_dup 3))
- (set (match_dup 4) (match_dup 5))]
-{
- unsigned int op0_regno = reg_or_subregno (operands[0]);
- unsigned int op1_regno = reg_or_subregno (operands[1]);
- operands[2] = gen_rtx_REG (DFmode, op0_regno);
- operands[3] = gen_rtx_REG (DFmode, op1_regno);
- operands[4] = gen_rtx_REG (DFmode, op0_regno + 1);
- operands[5] = gen_rtx_REG (DFmode, op1_regno + 1);
-}
- [(set_attr "type" "two")
- (set_attr "num_insns" "2")])
-
-(define_insn_and_split "*extendtfif2_internal"
- [(set (match_operand:IF 0 "gpc_reg_operand" "=d,&d")
- (float_extend:IF
- (match_operand:TF 1 "input_operand" "0,d")))]
- "FLOAT128_IBM_P (TFmode)"
- "#"
- "&& reload_completed"
- [(set (match_dup 2) (match_dup 3))
- (set (match_dup 4) (match_dup 5))]
-{
- unsigned int op0_regno = reg_or_subregno (operands[0]);
- unsigned int op1_regno = reg_or_subregno (operands[1]);
- operands[2] = gen_rtx_REG (DFmode, op0_regno);
- operands[3] = gen_rtx_REG (DFmode, op1_regno);
- operands[4] = gen_rtx_REG (DFmode, op0_regno + 1);
- operands[5] = gen_rtx_REG (DFmode, op1_regno + 1);
-}
- [(set_attr "type" "two")
- (set_attr "num_insns" "2")])
+ operands[2] = gen_rtx_REG (<MODE>mode, REGNO (operands[1]));
+})
\f
;; Reload helper functions used by rs6000_secondary_reload. The patterns all
diff --git a/gcc/testsuite/gcc.target/powerpc/divkc3-2.c b/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
index 0cfcea837ed..e34ed40bac2 100644
--- a/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/divkc3-2.c
@@ -14,4 +14,4 @@ divide (cld_t *p, cld_t *q, cld_t *r)
*p = *q / *r;
}
-/* { dg-final { scan-assembler "bl __divtc3_ieee128" } } */
+/* { dg-final { scan-assembler "bl __divkc3" } } */
diff --git a/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c b/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
index 78ef1dc00f0..eee6de9e2a5 100644
--- a/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
+++ b/gcc/testsuite/gcc.target/powerpc/mulkc3-2.c
@@ -14,4 +14,4 @@ multiply (cld_t *p, cld_t *q, cld_t *r)
*p = *q * *r;
}
-/* { dg-final { scan-assembler "bl __multc3_ieee128" } } */
+/* { dg-final { scan-assembler "bl __mulkc3" } } */
diff --git a/libgcc/config/rs6000/float128-ifunc.c b/libgcc/config/rs6000/float128-ifunc.c
index 30d46bcb233..73cbca2fc9a 100644
--- a/libgcc/config/rs6000/float128-ifunc.c
+++ b/libgcc/config/rs6000/float128-ifunc.c
@@ -359,9 +359,3 @@ TCtype __mulkc3 (TFtype, TFtype, TFtype, TFtype)
TCtype __divkc3 (TFtype, TFtype, TFtype, TFtype)
__attribute__ ((__ifunc__ ("__divkc3_resolve")));
-
-TCtype __multc3_ieee128 (TFtype, TFtype, TFtype, TFtype)
- __attribute__ ((__ifunc__ ("__mulkc3_resolve")));
-
-TCtype __divtc3_ieee128 (TFtype, TFtype, TFtype, TFtype)
- __attribute__ ((__ifunc__ ("__divkc3_resolve")));
diff --git a/libgcc/config/rs6000/quad-float128.h b/libgcc/config/rs6000/quad-float128.h
index a684d0e1bcf..ae0622c744c 100644
--- a/libgcc/config/rs6000/quad-float128.h
+++ b/libgcc/config/rs6000/quad-float128.h
@@ -191,11 +191,6 @@ extern TFtype __trunctfkf2 (IBM128_TYPE);
extern TCtype __mulkc3 (TFtype, TFtype, TFtype, TFtype);
extern TCtype __divkc3 (TFtype, TFtype, TFtype, TFtype);
-/* Complex long double multiply/divide if long double uses the IEEE 128-bit
- encoding. */
-extern TCtype __multc3_ieee128 (TFtype, TFtype, TFtype, TFtype);
-extern TCtype __divtc3_ieee128 (TFtype, TFtype, TFtype, TFtype);
-
/* Convert IEEE 128-bit floating point to/from string. We explicitly use
_Float128 instead of TFmode because _strtokf and _strfromkf must be compiled
with long double being IBM 128. */
^ permalink raw reply [flat|nested] 4+ messages in thread
* [gcc(refs/users/meissner/heads/work095)] Revert patches.
@ 2022-07-22 18:37 Michael Meissner
0 siblings, 0 replies; 4+ messages in thread
From: Michael Meissner @ 2022-07-22 18:37 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:40c10c637bd1e57b2cb8b90dbecca586fbfa40f1
commit 40c10c637bd1e57b2cb8b90dbecca586fbfa40f1
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Fri Jul 22 14:36:32 2022 -0400
Revert patches.
2022-07-19 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patches.
* config/rs6000/rs6000-cpus.def (POWERPC_MASKS): Add
OPTION_MASK_BLOCK_OPS_VECTOR_PAIR.
* config/rs6000/rs6000.opt (-mblock-ops-vector-pair): Add a
comment.
2022-07-21 Michael Meissner <meissner@linux.ibm.com>
gcc/
Revert patches.
* config/rs6000/rs6000.cc (rs6000_option_override_internal):
Do not enable -mblock-ops-vector-pair by default on power10.
Diff:
---
gcc/ChangeLog.meissner | 170 ++++++++++++++++++++++++++++++++++++++
gcc/config/rs6000/rs6000-cpus.def | 1 -
gcc/config/rs6000/rs6000.cc | 11 +++
gcc/config/rs6000/rs6000.opt | 2 -
4 files changed, 181 insertions(+), 3 deletions(-)
diff --git a/gcc/ChangeLog.meissner b/gcc/ChangeLog.meissner
index d36ddebdef0..61d24a87eae 100644
--- a/gcc/ChangeLog.meissner
+++ b/gcc/ChangeLog.meissner
@@ -1,3 +1,173 @@
+==================== work095, patch #8.
+
+Support IEEE 128-bit overload test data built-in functions.
+
+This patch adds support for overloading the IEEE 128-bit test data and
+test data negate built-in functions bewteeen KFmode and TFmode arguments.
+
+2022-07-21 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000-builtins.def
+ (__builtin_vsx_scalar_test_data_class_qp_kf): Rename KFmode IEEE
+ 128-bit test data built-in functions to have a KF suffix to allow
+ overloading.
+ (__builtin_vsx_scalar_test_neg_qp_kf): Likewise.
+ (__builtin_vsx_scalar_test_data_class_qp_tf): Add TFmode variants
+ for IEEE 128-bit insert and extract support.
+ (__builtin_vsx_scalar_test_neg_qp_tf): Likewise.
+ * config/rs6000/rs6000-overload.def
+ (__builtin_vec_scalar_test_data_class): Add TFmode overloads.
+ (__builtin_vec_scalar_test_neg): Likewise.
+ (__builtin_vec_scalar_test_neg_qp): Likewise.
+ (__builtin_vec_scalar_test_data_class_qp): Likewise.
+
+gcc/testsuite/
+
+ * gcc.target/powerpc/bfp/scalar-test-data-class-11.c: Update the
+ expected error message.
+ * gcc.target/powerpc/bfp/scalar-test-neg-5.c: Likewise.
+
+==================== work095, patch #7.
+
+Support IEEE 128-bit overload extract and insert built-in functions.
+
+This patch adds support for overloading the IEEE 128-bit extract and
+insert built-in functions bewteeen KFmode and TFmode arguments.
+
+2022-07-21 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000-builtins.def
+ (__builtin_vsx_scalar_extract_expq_kf): Rename KFmode IEEE 128-bit
+ insert and extract built-in functions to have a KF suffix to allow
+ overloading.
+ (__builtin_vsx_scalar_extract_sigq_kf): Likewise.
+ (__builtin_vsx_scalar_insert_exp_qp_kf): Likewise.
+ (__builtin_vsx_scalar_extract_expq_tf): Add TFmode variants for
+ IEEE 128-bit insert and extract support.
+ (__builtin_vsx_scalar_extract_sigq_tf): Likewise.
+ (__builtin_vsx_scalar_insert_exp_qp_tf): Likewise.
+ * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
+ Add support for having KFmode and TFmode variants of VSIEQPF.
+ * config/rs6000/rs6000-overload.def
+ (__builtin_vec_scalar_extract_exp): Add TFmode overloads.
+ (__builtin_vec_scalar_extract_sig): Likewise.
+ (__builtin_vec_scalar_insert_exp): Likewise.
+
+gcc/testsuite/
+
+ * gcc.target/powerpc/bfp/scalar-extract-exp-4.c: Update the
+ expected error message.
+ * gcc.target/powerpc/bfp/scalar-extract-sig-4.c: Likewise.
+ * gcc.target/powerpc/bfp/scalar-insert-exp-10.c: Likewise.
+
+==================== work095, patch #6.
+
+Support IEEE 128-bit overload comparison built-in functions.
+
+This patch adds support for overloading the IEEE 128-bit comparison
+built-in functions bewteeen KFmode and TFmode arguments.
+
+2022-07-21 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000-builtins.def
+ (__builtin_vsx_scalar_cmp_exp_qp_eq_kf): Rename KFmode comparison
+ built-in functions to have a KF suffix to allow overloading.
+ (__builtin_vsx_scalar_cmp_exp_qp_gt_kf): Likewise.
+ (__builtin_vsx_scalar_cmp_exp_qp_lt_kf): Likewise.
+ (__builtin_vsx_scalar_cmp_exp_qp_unordered_kf): Likewise.
+ (__builtin_vsx_scalar_cmp_exp_qp_eq_tf): Add TFmode comparison
+ built-in functions.
+ (__builtin_vsx_scalar_cmp_exp_qp_gt_tf): Likewise.
+ (__builtin_vsx_scalar_cmp_exp_qp_lt_tf): Likewise.
+ (__builtin_vsx_scalar_cmp_exp_qp_unordered_tf): Likewise.
+ * config/rs6000/rs6000-overload.def
+ (__builtin_vec_scalar_cmp_exp_eq): Add TFmode overloaded
+ functions.
+ (__builtin_vec_scalar_cmp_exp_gt): Likewise.
+ (__builtin_vec_scalar_cmp_exp_lt): Likewise.
+ (__builtin_vec_scalar_cmp_exp_unordered): Likewise.
+
+==================== work095, patch #5.
+
+Support IEEE 128-bit overload round_to_odd built-in functions.
+
+This patch adds support for overloading the IEEE 128-bit round to odd
+built-in functions bewteeen KFmode and TFmode arguments.
+
+2022-07-21 Michael Meissner <meissner@linux.ibm.com>
+
+gcc/
+
+ * config/rs6000/rs6000-builtins.def
+ (__builtin_addf128_round_to_odd_kf): Rename KFmode round to odd
+ built-in functions with a KF suffix to allow overloading.
+ (__builtin_divf128_round_to_odd_kf): Likewise.
+ (__builtin_fmaf128_round_to_odd_kf): Likewise.
+ (__builtin_mulf128_round_to_odd_kf): Likewise.
+ (__builtin_sqrtf128_round_to_odd_kf): Likewise.
+ (__builtin_subf128_round_to_odd_kf): Likewise.
+ (__builtin_truncf128_round_to_odd_kf): Likewise.
+ (__builtin_addf128_round_to_odd_tf): Add TFmode round to odd
+ built-in functions.
+ (__builtin_fmaf128_round_to_odd_tf): Likewise.
+ (__builtin_mulf128_round_to_odd_tf): Likewise.
+ (__builtin_sqrtf128_round_to_odd_tf): Likewise.
+ (__builtin_subf128_round_to_odd_tf): Likewise.
+ (__builtin_truncf128_round_to_odd_tf): Likewise.
+ * config/rs6000/rs6000-overload.def
+ (__builtin_addf128_round_to_odd): Make IEEE 128-bit round to odd
+ built-in functions overloaded.
+ (__builtin_divf128_round_to_odd): Likewise.
+ (__builtin_fmaf128_round_to_odd): Likewise.
+ (__builtin_mulf128_round_to_odd): Likewise.
+ (__builtin_sqrtf128_round_to_odd): Likewise.
+ (__builtin_subf128_round_to_odd): Likewise.
+ (__builtin_truncf128_round_to_odd): Likewise.
+
+==================== work095, patch #4.
+
+IEEE 128-bit built-in support.
+
+This patch lays the ground work that future patches will use to add
+builtin support (both normal and overloaded) for the case where long
+double uses the IEEE 128-bit encoding.
+
+This adds a new stanza (ieee128-hw-ld) for when we have IEEE 128-bit
+hardware support and long double uses the IEEE 128-bit encoding.
+
+A new type attribute (ieeeld) is added for long double if long double uses
+the IEEE 128-bit encoding.
+
+2022-07-21 Michael Meissner <meissner@linux.ibm.com>
+
+
+gcc/
+
+ * config/rs6000/rs6000-builtin.cc (rs6000_invalid_builtin): Add
+ support for ibm128-hw-ld stanza.
+ (rs6000_builtin_is_supported): Likewise.
+ (rs6000_init_builtins): Likewise.
+ (rs6000_expand_builtin): Add support for IEEE128_HW_LD. Add
+ support for ieeeld.
+ * config/rs6000/rs6000-builtins.def (toplevel): Add comment about
+ the new ieeeld attribute.
+ * config/rs6000/rs6000-gen-builtins.cc (enum bif_stanza): Add
+ BSTZ_IEEE128_HW_LD.
+ (stanza_map): Likewise.
+ (enable_string): Likewise.
+ (attrinfo): Add isieeeld.
+ (parse_bif_attrs): Parse ieeeld. Add printing ieeeld to the debug
+ print.
+ (write_decls): Add support for ibm128-hw-ld stanza and ieeeld
+ attribute.
+ (write_bif_static_init): Add support for ieeeld attribute.
+
==================== work095, patch #3.
Make -mblock-ops-vector-pair option valid as an ISA option.
diff --git a/gcc/config/rs6000/rs6000-cpus.def b/gcc/config/rs6000/rs6000-cpus.def
index 6ac6c526342..c3825bcccd8 100644
--- a/gcc/config/rs6000/rs6000-cpus.def
+++ b/gcc/config/rs6000/rs6000-cpus.def
@@ -122,7 +122,6 @@
/* Mask of all options to set the default isa flags based on -mcpu=<xxx>. */
#define POWERPC_MASKS (OPTION_MASK_ALTIVEC \
- | OPTION_MASK_BLOCK_OPS_VECTOR_PAIR \
| OPTION_MASK_CMPB \
| OPTION_MASK_CRYPTO \
| OPTION_MASK_DFP \
diff --git a/gcc/config/rs6000/rs6000.cc b/gcc/config/rs6000/rs6000.cc
index 667f83b1dfd..3ff16b8ae04 100644
--- a/gcc/config/rs6000/rs6000.cc
+++ b/gcc/config/rs6000/rs6000.cc
@@ -4139,6 +4139,17 @@ rs6000_option_override_internal (bool global_init_p)
rs6000_isa_flags &= ~OPTION_MASK_BLOCK_OPS_UNALIGNED_VSX;
}
+ if (!(rs6000_isa_flags_explicit & OPTION_MASK_BLOCK_OPS_VECTOR_PAIR))
+ {
+ /* Do not generate lxvp and stxvp on power10 since there are some
+ performance issues. */
+ if (TARGET_MMA && TARGET_EFFICIENT_UNALIGNED_VSX
+ && rs6000_tune != PROCESSOR_POWER10)
+ rs6000_isa_flags |= OPTION_MASK_BLOCK_OPS_VECTOR_PAIR;
+ else
+ rs6000_isa_flags &= ~OPTION_MASK_BLOCK_OPS_VECTOR_PAIR;
+ }
+
/* Use long double size to select the appropriate long double. We use
TYPE_PRECISION to differentiate the 3 different long double types. We map
128 into the precision used for TFmode. */
diff --git a/gcc/config/rs6000/rs6000.opt b/gcc/config/rs6000/rs6000.opt
index 39d6925b8f2..4931d781c4e 100644
--- a/gcc/config/rs6000/rs6000.opt
+++ b/gcc/config/rs6000/rs6000.opt
@@ -324,8 +324,6 @@ mblock-ops-unaligned-vsx
Target Mask(BLOCK_OPS_UNALIGNED_VSX) Var(rs6000_isa_flags)
Generate unaligned VSX load/store for inline expansion of memcpy/memmove.
-; Not set on power10 by default due to performance reasons, but it could be set
-; in future processors.
mblock-ops-vector-pair
Target Undocumented Mask(BLOCK_OPS_VECTOR_PAIR) Var(rs6000_isa_flags)
Generate unaligned VSX vector pair load/store for inline expansion of memcpy/memmove.
^ permalink raw reply [flat|nested] 4+ messages in thread
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