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* [gcc(refs/users/pinskia/heads/riscvbit)] Add the list of operand modifiers to riscv.md too
@ 2022-08-15 23:14 Andrew Pinski
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From: Andrew Pinski @ 2022-08-15 23:14 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:28994ef3339e1fb45b64c9614320088e99f7695f
commit 28994ef3339e1fb45b64c9614320088e99f7695f
Author: Andrew Pinski <apinski@marvell.com>
Date: Fri Aug 12 17:19:36 2022 +0000
Add the list of operand modifiers to riscv.md too
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_memmodel_needs_release_fence):
* config/riscv/riscv.md:
Change-Id: I544fcee1780ff45ae89afff3edf755390eb67673
Diff:
---
gcc/config/riscv/riscv.cc | 4 +++-
gcc/config/riscv/riscv.md | 14 ++++++++++++++
2 files changed, 17 insertions(+), 1 deletion(-)
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 5a0adffb5ce..38854b42309 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -3673,7 +3673,9 @@ riscv_memmodel_needs_release_fence (enum memmodel model)
'z' Print x0 if OP is zero, otherwise print OP normally.
'i' Print i if the operand is not a register.
'S' Print shift-index of single-bit mask OP.
- 'T' Print shift-index of inverted single-bit mask OP. */
+ 'T' Print shift-index of inverted single-bit mask OP.
+
+ Note please keep this list and the list in riscv.md in sync. */
static void
riscv_print_operand (FILE *file, rtx op, int letter)
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index a76b12cff81..5c775040ac3 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -19,6 +19,20 @@
;; along with GCC; see the file COPYING3. If not see
;; <http://www.gnu.org/licenses/>.
+
+;; Keep this list and the one above riscv_print_operand in sync.
+;; The special asm out single letter directives following a '%' are:
+;; h -- Print the high-part relocation associated with OP, after stripping
+;; any outermost HIGH.
+;; R -- Print the low-part relocation associated with OP.
+;; C -- Print the integer branch condition for comparison OP.
+;; A -- Print the atomic operation suffix for memory model OP.
+;; F -- Print a FENCE if the memory model requires a release.
+;; z -- Print x0 if OP is zero, otherwise print OP normally.
+;; i -- Print i if the operand is not a register.
+;; S -- Print shift-index of single-bit mask OP.
+;; T -- Print shift-index of inverted single-bit mask OP.
+
(define_c_enum "unspec" [
;; Override return address for exception handling.
UNSPEC_EH_RETURN
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