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* [gcc(refs/users/meissner/heads/dmf001)] Add accumulator_operand.
@ 2022-10-11 22:41 Michael Meissner
0 siblings, 0 replies; only message in thread
From: Michael Meissner @ 2022-10-11 22:41 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:9af78e29a3a16ec1ab33cf31c2c5c33ce7e325a7
commit 9af78e29a3a16ec1ab33cf31c2c5c33ce7e325a7
Author: Michael Meissner <meissner@linux.ibm.com>
Date: Tue Oct 11 18:40:43 2022 -0400
Add accumulator_operand.
2022-10-11 Michael Meissner <meissner@linux.ibm.com>
gcc/
* config/rs6000/predicates.md (accumulator_operand): New predicate.
Diff:
---
gcc/config/rs6000/predicates.md | 18 ++++++++++++++++++
1 file changed, 18 insertions(+)
diff --git a/gcc/config/rs6000/predicates.md b/gcc/config/rs6000/predicates.md
index 51aa0f7449e..5fcda8543b2 100644
--- a/gcc/config/rs6000/predicates.md
+++ b/gcc/config/rs6000/predicates.md
@@ -199,6 +199,24 @@
return DMF_REGNO_P (REGNO (op));
})
+;; Return 1 if op is an accumulator. On power10 systems, the accumulators
+;; overlap with the FPRs, while on systems with DMF, the accumulators are
+;; separate dense math registers and do not overlap with the FPR registers..
+(define_predicate "accumulator_operand"
+ (match_operand 0 "register_operand")
+{
+ if (!REG_P (op))
+ return 0;
+
+ if (!HARD_REGISTER_P (op))
+ return 1;
+
+ int r = REGNO (op);
+ return (TARGET_DMF
+ ? DMF_REGNO_P (r)
+ : FP_REGNO_P (r) && (r & 3) == 0);
+})
+
;; Return 1 if op is the carry register.
(define_predicate "ca_operand"
(match_operand 0 "register_operand")
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2022-10-11 22:41 [gcc(refs/users/meissner/heads/dmf001)] Add accumulator_operand Michael Meissner
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