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* [gcc r13-3448] RISC-V: Fix REG_CLASS_CONTENTS.
@ 2022-10-24 2:21 Kito Cheng
0 siblings, 0 replies; only message in thread
From: Kito Cheng @ 2022-10-24 2:21 UTC (permalink / raw)
To: gcc-cvs
https://gcc.gnu.org/g:65908ac84b840ded3331e000d303d0a5b4b426c8
commit r13-3448-g65908ac84b840ded3331e000d303d0a5b4b426c8
Author: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
Date: Mon Oct 24 09:39:16 2022 +0800
RISC-V: Fix REG_CLASS_CONTENTS.
Include V_REGS for ALL_REGS.
gcc/ChangeLog:
* config/riscv/riscv.h (REG_CLASS_CONTENTS): Fix ALL_REGS.
Diff:
---
gcc/config/riscv/riscv.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/gcc/config/riscv/riscv.h b/gcc/config/riscv/riscv.h
index acae68ebb2d..37363e975e1 100644
--- a/gcc/config/riscv/riscv.h
+++ b/gcc/config/riscv/riscv.h
@@ -516,7 +516,7 @@ enum reg_class
{ 0x00000000, 0x00000000, 0x00000000, 0x00000001 }, /* V0_REGS */ \
{ 0x00000000, 0x00000000, 0x00000000, 0xfffffffe }, /* VNoV0_REGS */ \
{ 0x00000000, 0x00000000, 0x00000000, 0xffffffff }, /* V_REGS */ \
- { 0xffffffff, 0xffffffff, 0x00000003, 0x00000000 } /* ALL_REGS */ \
+ { 0xffffffff, 0xffffffff, 0x0000000f, 0xffffffff } /* ALL_REGS */ \
}
/* A C expression whose value is a register class containing hard
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