[gcc(refs/vendors/ARM/heads/gcs-13)] aarch64: Add support for GCS system registers with the +gcs modifier

[gcc(refs/vendors/ARM/heads/gcs-13)] aarch64: Add support for GCS system registers with the +gcs modifier

[Szabolcs Nagy]

https://gcc.gnu.org/g:6ce354816bcb27658973e0081ebb5e6dd967a79f

commit 6ce354816bcb27658973e0081ebb5e6dd967a79f
Author: Victor Do Nascimento <victor.donascimento@arm.com>
Date:   Fri Nov 3 16:44:56 2023 +0000

    aarch64: Add support for GCS system registers with the +gcs modifier
    
    Given the introduction of system registers associated with the Guarded
    Control Stack extension to Armv9.4-a in Binutils and their reliance on
    the `+gcs' modifier, we implement the necessary changes in GCC to
    allow for them to be recognized by the compiler.
    
    gcc/ChangeLog:
    
            * config/aarch64/aarch64-option-extensions.def (gcs): New.
            * config/aarch64/aarch64.h (AARCH64_ISA_GCS): New.
            (TARGET_THE):  Likewise.
            * doc/invoke.texi (AArch64 Options): Describe GCS.
    
    (cherry picked from commit 3aba045882d1f589d36eaedd947a014ac6eb5ec3)
    
    Modified when merged.

Diff:
---
 gcc/config/aarch64/aarch64-option-extensions.def | 2 ++
 gcc/config/aarch64/aarch64.h                     | 5 +++++
 2 files changed, 7 insertions(+)

diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def
index 825f3bf77589..2749bab3005d 100644
--- a/gcc/config/aarch64/aarch64-option-extensions.def
+++ b/gcc/config/aarch64/aarch64-option-extensions.def
@@ -151,4 +151,6 @@ AARCH64_OPT_EXTENSION("mops", MOPS, (), (), (), "")
 
 AARCH64_OPT_EXTENSION("cssc", CSSC, (), (), (), "cssc")
 
+AARCH64_OPT_EXTENSION("gcs", GCS, (), (), (), "gcs")
+
 #undef AARCH64_OPT_EXTENSION
diff --git a/gcc/config/aarch64/aarch64.h b/gcc/config/aarch64/aarch64.h
index bd2650191dea..cece9cd2651f 100644
--- a/gcc/config/aarch64/aarch64.h
+++ b/gcc/config/aarch64/aarch64.h
@@ -223,6 +223,7 @@ enum class aarch64_feature : unsigned char {
 #define AARCH64_ISA_MOPS	   (aarch64_isa_flags & AARCH64_FL_MOPS)
 #define AARCH64_ISA_LS64	   (aarch64_isa_flags & AARCH64_FL_LS64)
 #define AARCH64_ISA_CSSC	   (aarch64_isa_flags & AARCH64_FL_CSSC)
+#define AARCH64_ISA_GCS		   (aarch64_isa_flags & AARCH64_FL_GCS)
 
 /* Crypto is an optional extension to AdvSIMD.  */
 #define TARGET_CRYPTO (AARCH64_ISA_CRYPTO)
@@ -370,6 +371,10 @@ enum class aarch64_feature : unsigned char {
 /* Armv9.4-A features.  */
 #define TARGET_ARMV9_4 (AARCH64_ISA_V9_4A)
 
+/*  Armv9.4-A Guarded Control Stack extension system registers are
+    enabled through +gcs.  */
+#define TARGET_GCS (AARCH64_ISA_GCS)
+
 /* Standard register usage.  */
 
 /* 31 64-bit general purpose registers R0-R30: