Emission of store_multiple and load_multiple patterns

Emission of store_multiple and load_multiple patterns

[noeljohn]

Hi Experts,
        I am working on a new risc machine. I have defined the
"store_multiple" and "load_multiple" pattern and the system builds fine. But
when I compile the C program for a declared integer array, the
"store_multiple" and "load_multiple" patterns are not getting emitted.
Instead simple load and store patterns are emitted multiple times. As per
actual working store_multiple and load_multiple patters need to get emitted.
Please do help me regarding this.

Thank you.    
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Re: Emission of store_multiple and load_multiple patterns

[Ian Lance Taylor]

noeljohn <noel.daniel@gmx.com> writes:

>         I am working on a new risc machine. I have defined the
> "store_multiple" and "load_multiple" pattern and the system builds fine. But
> when I compile the C program for a declared integer array, the
> "store_multiple" and "load_multiple" patterns are not getting emitted.
> Instead simple load and store patterns are emitted multiple times. As per
> actual working store_multiple and load_multiple patters need to get emitted.

What do your store_multiple and load_multiple insns look like?

E.g., if they only work for consecutive registers, then gcc can only
match them after register allocation, but there is no appropriate
optimization pass to do so.  In that case you are going to have write
peepholes for them, and you're going to have to generate them
explicitly in your backend's prologue and epilogue generation.

Ian

Re: Emission of store_multiple and load_multiple patterns

[noeljohn]

Ian Lance Taylor-3 wrote:
> 
> noeljohn <noel.daniel@gmx.com> writes:
> 
>>         I am working on a new risc machine. I have defined the
>> "store_multiple" and "load_multiple" pattern and the system builds fine.
>> But
>> when I compile the C program for a declared integer array, the
>> "store_multiple" and "load_multiple" patterns are not getting emitted.
>> Instead simple load and store patterns are emitted multiple times. As per
>> actual working store_multiple and load_multiple patters need to get
>> emitted.
> 
> What do your store_multiple and load_multiple insns look like?
> 
> E.g., if they only work for consecutive registers, then gcc can only
> match them after register allocation, but there is no appropriate
> optimization pass to do so.  In that case you are going to have write
> peepholes for them, and you're going to have to generate them
> explicitly in your backend's prologue and epilogue generation.
> 
> 
> Ian
> 
> 


Thank you for replying.
According to my understanding, it works for consecutive registers as I am
just declaring an array in my test case. To be specific, how do I get
"rodata" section in assembly generated that contains only the data(integers)
in the array declared,, because when I compile with other already build
processors, it creates this rodata section and then using a single
instruction stores all the elements of array in memory. 

noeljohn
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Re: Emission of store_multiple and load_multiple patterns

[Ian Lance Taylor]

noeljohn <noel.daniel@gmx.com> writes:

> Ian Lance Taylor-3 wrote:
>> 
>> noeljohn <noel.daniel@gmx.com> writes:
>> 
>>>         I am working on a new risc machine. I have defined the
>>> "store_multiple" and "load_multiple" pattern and the system builds fine.
>>> But
>>> when I compile the C program for a declared integer array, the
>>> "store_multiple" and "load_multiple" patterns are not getting emitted.
>>> Instead simple load and store patterns are emitted multiple times. As per
>>> actual working store_multiple and load_multiple patters need to get
>>> emitted.
>> 
>> What do your store_multiple and load_multiple insns look like?
>> 
>> E.g., if they only work for consecutive registers, then gcc can only
>> match them after register allocation, but there is no appropriate
>> optimization pass to do so.  In that case you are going to have write
>> peepholes for them, and you're going to have to generate them
>> explicitly in your backend's prologue and epilogue generation.
>> 
>> 
>> Ian
>> 
>> 
>
>
> Thank you for replying.
> According to my understanding, it works for consecutive registers as I am
> just declaring an array in my test case. To be specific, how do I get
> "rodata" section in assembly generated that contains only the data(integers)
> in the array declared,, because when I compile with other already build
> processors, it creates this rodata section and then using a single
> instruction stores all the elements of array in memory. 


It's difficult to say how this works without more information.  Is the
array being treated as a vector?

It's easy enough to get an rodata section in your assembly code, that
should happen more or less automatically if you write
    const int ai[] = { 1, 2, 3, 4 };
I don't know how to load that using a load-multiple instruction unless
it is being treated as a vector.

Ian

Re: Emission of store_multiple and load_multiple patterns

[noeljohn]

Ian Lance Taylor-3 wrote:
> 
> noeljohn <noel.daniel@gmx.com> writes:
> 
>> Ian Lance Taylor-3 wrote:
>>> 
>>> noeljohn <noel.daniel@gmx.com> writes:
>>> 
>>>>         I am working on a new risc machine. I have defined the
>>>> "store_multiple" and "load_multiple" pattern and the system builds
>>>> fine.
>>>> But
>>>> when I compile the C program for a declared integer array, the
>>>> "store_multiple" and "load_multiple" patterns are not getting emitted.
>>>> Instead simple load and store patterns are emitted multiple times. As
>>>> per
>>>> actual working store_multiple and load_multiple patters need to get
>>>> emitted.
>>> 
>>> What do your store_multiple and load_multiple insns look like?
>>> 
>>> E.g., if they only work for consecutive registers, then gcc can only
>>> match them after register allocation, but there is no appropriate
>>> optimization pass to do so.  In that case you are going to have write
>>> peepholes for them, and you're going to have to generate them
>>> explicitly in your backend's prologue and epilogue generation.
>>> 
>>> 
>>> Ian
>>> 
>>> 
>>
>>
>> Thank you for replying.
>> According to my understanding, it works for consecutive registers as I am
>> just declaring an array in my test case. To be specific, how do I get
>> "rodata" section in assembly generated that contains only the
>> data(integers)
>> in the array declared,, because when I compile with other already build
>> processors, it creates this rodata section and then using a single
>> instruction stores all the elements of array in memory. 
> 
> 
> It's difficult to say how this works without more information.  Is the
> array being treated as a vector?
> 
> It's easy enough to get an rodata section in your assembly code, that
> should happen more or less automatically if you write
>     const int ai[] = { 1, 2, 3, 4 };
> I don't know how to load that using a load-multiple instruction unless
> it is being treated as a vector.
> 
> Ian
> 
> 

Hello Sir,
  The array as I have seen is not being treated as a vector. What it does is
it directly loads the integer array data into the stack. This is normally
done for processors which does not have a support for multiple loading and
storing of words. 

noeljohn
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Re: Emission of store_multiple and load_multiple patterns

[noeljohn]

Ian Lance Taylor-3 wrote:
> 
> noeljohn <noel.daniel@gmx.com> writes:
> 
>> Ian Lance Taylor-3 wrote:
>>> 
>>> noeljohn <noel.daniel@gmx.com> writes:
>>> 
>>>>         I am working on a new risc machine. I have defined the
>>>> "store_multiple" and "load_multiple" pattern and the system builds
>>>> fine.
>>>> But
>>>> when I compile the C program for a declared integer array, the
>>>> "store_multiple" and "load_multiple" patterns are not getting emitted.
>>>> Instead simple load and store patterns are emitted multiple times. As
>>>> per
>>>> actual working store_multiple and load_multiple patters need to get
>>>> emitted.
>>> 
>>> What do your store_multiple and load_multiple insns look like?
>>> 
>>> E.g., if they only work for consecutive registers, then gcc can only
>>> match them after register allocation, but there is no appropriate
>>> optimization pass to do so.  In that case you are going to have write
>>> peepholes for them, and you're going to have to generate them
>>> explicitly in your backend's prologue and epilogue generation.
>>> 
>>> 
>>> Ian
>>> 
>>> 
>>
>>
>> Thank you for replying.
>> According to my understanding, it works for consecutive registers as I am
>> just declaring an array in my test case. To be specific, how do I get
>> "rodata" section in assembly generated that contains only the
>> data(integers)
>> in the array declared,, because when I compile with other already build
>> processors, it creates this rodata section and then using a single
>> instruction stores all the elements of array in memory. 
> 
> 
> It's difficult to say how this works without more information.  Is the
> array being treated as a vector?
> 
> It's easy enough to get an rodata section in your assembly code, that
> should happen more or less automatically if you write
>     const int ai[] = { 1, 2, 3, 4 };
> I don't know how to load that using a load-multiple instruction unless
> it is being treated as a vector.
> 
> Ian
> 
> 

Hello Sir,
  The array as I have seen is not being treated as a vector. What it does is
it directly loads the integer array data into the stack. This is normally
done for processors which does not have a support for multiple loading and
storing of words. Is there any way by which we can convey gcc through macros
that our architecture supports this multiple loading and storing facility?
Awaiting for your help. 

noeljohn

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Re: Emission of store_multiple and load_multiple patterns

[Ian Lance Taylor]

noeljohn <noel.daniel@gmx.com> writes:

>   The array as I have seen is not being treated as a vector. What it does is
> it directly loads the integer array data into the stack. This is normally
> done for processors which does not have a support for multiple loading and
> storing of words. Is there any way by which we can convey gcc through macros
> that our architecture supports this multiple loading and storing facility?

I'm sorry, I don't understand what you mean.  What specific
instruction are you trying to generate, and what precisely does it do?
When exact C code would you write that you would expect to generate
this instruction?

Ian

Re: Emission of store_multiple and load_multiple patterns

[noeljohn]

Ian Lance Taylor-3 wrote:
> 
> noeljohn <noel.daniel@gmx.com> writes:
> 
>>   The array as I have seen is not being treated as a vector. What it does
>> is
>> it directly loads the integer array data into the stack. This is normally
>> done for processors which does not have a support for multiple loading
>> and
>> storing of words. Is there any way by which we can convey gcc through
>> macros
>> that our architecture supports this multiple loading and storing
>> facility?
> 
> I'm sorry, I don't understand what you mean.  What specific
> instruction are you trying to generate, and what precisely does it do?
> When exact C code would you write that you would expect to generate
> this instruction?
> 
> Ian
> 
> 

Hello Sir,
    The actual problem is that the array contents are not put in a separate
data section we would see in .s file. Suppose we take a arm processor or
rs6000 processor, a separate section will be created in which the array
contents will be stored and then these array contents are loaded into the
stack. I want this data section to be created. How should I go forward ?

noeljohn 
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Re: Emission of store_multiple and load_multiple patterns

[Ian Lance Taylor]

noeljohn <noel.daniel@gmx.com> writes:

> Ian Lance Taylor-3 wrote:
>> 
>> noeljohn <noel.daniel@gmx.com> writes:
>> 
>>>   The array as I have seen is not being treated as a vector. What it does
>>> is
>>> it directly loads the integer array data into the stack. This is normally
>>> done for processors which does not have a support for multiple loading
>>> and
>>> storing of words. Is there any way by which we can convey gcc through
>>> macros
>>> that our architecture supports this multiple loading and storing
>>> facility?
>> 
>> I'm sorry, I don't understand what you mean.  What specific
>> instruction are you trying to generate, and what precisely does it do?
>> When exact C code would you write that you would expect to generate
>> this instruction?
>> 
>> Ian
>> 
>> 
>
> Hello Sir,
>     The actual problem is that the array contents are not put in a separate
> data section we would see in .s file. Suppose we take a arm processor or
> rs6000 processor, a separate section will be created in which the array
> contents will be stored and then these array contents are loaded into the
> stack. I want this data section to be created. How should I go forward ?


Give us an example.  Show us some source code.

Ian

Re: Emission of store_multiple and load_multiple patterns

[noeljohn]

Ian Lance Taylor-3 wrote:
> 
> noeljohn <noel.daniel@gmx.com> writes:
> 
>> Ian Lance Taylor-3 wrote:
>>> 
>>> noeljohn <noel.daniel@gmx.com> writes:
>>> 
>>>>   The array as I have seen is not being treated as a vector. What it
>>>> does
>>>> is
>>>> it directly loads the integer array data into the stack. This is
>>>> normally
>>>> done for processors which does not have a support for multiple loading
>>>> and
>>>> storing of words. Is there any way by which we can convey gcc through
>>>> macros
>>>> that our architecture supports this multiple loading and storing
>>>> facility?
>>> 
>>> I'm sorry, I don't understand what you mean.  What specific
>>> instruction are you trying to generate, and what precisely does it do?
>>> When exact C code would you write that you would expect to generate
>>> this instruction?
>>> 
>>> Ian
>>> 
>>> 
>>
>> Hello Sir,
>>     The actual problem is that the array contents are not put in a
>> separate
>> data section we would see in .s file. Suppose we take a arm processor or
>> rs6000 processor, a separate section will be created in which the array
>> contents will be stored and then these array contents are loaded into the
>> stack. I want this data section to be created. How should I go forward ?
> 
> 
> Give us an example.  Show us some source code.
> 
> Ian
> 
> 


	.file	"1234.c"

	.section	.rodata

	.align	2

	.type	C.0.1175, %object

	.size	C.0.1175, 20

C.0.1175:

	.word	6

	.word	9

	.word	5

	.word	6

	.word	8

	.text

	.align	2

	.global	main

	.type	main, %function

main:

	@ args = 0, pretend = 0, frame = 20

	@ frame_needed = 1, uses_anonymous_args = 0

	mov	ip, sp

	stmfd	sp!, {r4, fp, ip, lr, pc}

	sub	fp, ip, #4

	sub	sp, sp, #20

	ldr	r3, .L3

	sub	r4, fp, #36

	mov	ip, r3

	ldmia	ip!, {r0, r1, r2, r3}

	stmia	r4!, {r0, r1, r2, r3}

	ldr	r3, [ip, #0]

	str	r3, [r4, #0]

	ldr	r2, [fp, #-28]

	ldr	r3, [fp, #-20]

	and	r3, r2, r3

	str	r3, [fp, #-24]

	sub	sp, fp, #16

	ldmfd	sp, {r4, fp, sp, pc}

.L4:

	.align	2

.L3:

	.word	C.0.1175

	.size	main, .-main

	.ident	"GCC: (GNU) 4.3.0"


This is the arm assembly for the c program:
void main()

{

int a[5]={6,9,5,6,8};

a[3]=a[2] & a[4];

}

The section below is the one which needs to be generated for the machine
which I am working for.

	.section	.rodata
	.align	2
	.type	C.0.1175, %object
	.size	C.0.1175, 20
C.0.1175:
	.word	6
	.word	9
	.word	5
	.word	6
	.word	8
 
Similar section is seen for the assembly generated by the machine powerpc.
How can it be generated?

noeljohn
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Re: Emission of store_multiple and load_multiple patterns

[Ian Lance Taylor]

noeljohn <noel.daniel@gmx.com> writes:

> This is the arm assembly for the c program:
> void main()
>
> {
>
> int a[5]={6,9,5,6,8};
>
> a[3]=a[2] & a[4];
>
> }
>
> The section below is the one which needs to be generated for the machine
> which I am working for.
>
> 	.section	.rodata
> 	.align	2
> 	.type	C.0.1175, %object
> 	.size	C.0.1175, 20
> C.0.1175:
> 	.word	6
> 	.word	9
> 	.word	5
> 	.word	6
> 	.word	8
>  
> Similar section is seen for the assembly generated by the machine powerpc.
> How can it be generated?

Thanks for the example.  This is controlled by the cost of moving the
structure piece by piece.  See MOVE_MAX, MAX_MOVE_MAX,
MOVE_MAX_PIECES, and MOVE_BY_PIECES_P in the internals manual.

Ian

Re: Emission of store_multiple and load_multiple patterns

[noeljohn]

Ian Lance Taylor-3 wrote:
> 
> noeljohn <noel.daniel@gmx.com> writes:
> 
>> This is the arm assembly for the c program:
>> void main()
>>
>> {
>>
>> int a[5]={6,9,5,6,8};
>>
>> a[3]=a[2] & a[4];
>>
>> }
>>
>> The section below is the one which needs to be generated for the machine
>> which I am working for.
>>
>> 	.section	.rodata
>> 	.align	2
>> 	.type	C.0.1175, %object
>> 	.size	C.0.1175, 20
>> C.0.1175:
>> 	.word	6
>> 	.word	9
>> 	.word	5
>> 	.word	6
>> 	.word	8
>>  
>> Similar section is seen for the assembly generated by the machine
>> powerpc.
>> How can it be generated?
> 
> Thanks for the example.  This is controlled by the cost of moving the
> structure piece by piece.  See MOVE_MAX, MAX_MOVE_MAX,
> MOVE_MAX_PIECES, and MOVE_BY_PIECES_P in the internals manual.
> 
> Ian
> 
> 

Thank you very much Sir. I will work on it and get back to you soon.

noeljohn
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Re: Emission of store_multiple and load_multiple patterns

[noeljohn]

Ian Lance Taylor-3 wrote:
> 
> noeljohn <noel.daniel@gmx.com> writes:
> 
>> This is the arm assembly for the c program:
>> void main()
>>
>> {
>>
>> int a[5]={6,9,5,6,8};
>>
>> a[3]=a[2] & a[4];
>>
>> }
>>
>> The section below is the one which needs to be generated for the machine
>> which I am working for.
>>
>> 	.section	.rodata
>> 	.align	2
>> 	.type	C.0.1175, %object
>> 	.size	C.0.1175, 20
>> C.0.1175:
>> 	.word	6
>> 	.word	9
>> 	.word	5
>> 	.word	6
>> 	.word	8
>>  
>> Similar section is seen for the assembly generated by the machine
>> powerpc.
>> How can it be generated?
> 
> Thanks for the example.  This is controlled by the cost of moving the
> structure piece by piece.  See MOVE_MAX, MAX_MOVE_MAX,
> MOVE_MAX_PIECES, and MOVE_BY_PIECES_P in the internals manual.
> 
> Ian
> 
> 


Hello Sir,
    I introduced MOVE_MAX and MOVE_RATIO macros. With this the gcc build is
successful. But when I compile the .c file, I get a segmentation fault. 
    Are there any docs which will help in knowing the respective macros
required for the rodata section emission ? Awaiting for your help.

noeljohn

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Re: Emission of store_multiple and load_multiple patterns

[Ian Lance Taylor]

noeljohn <noel.daniel@gmx.com> writes:

>     I introduced MOVE_MAX and MOVE_RATIO macros. With this the gcc build is
> successful. But when I compile the .c file, I get a segmentation fault. 
>     Are there any docs which will help in knowing the respective macros
> required for the rodata section emission ? Awaiting for your help.

The gcc internal documentation is pretty good on this kind of thing.

http://gcc.gnu.org/onlinedocs/gccint/

Ian

Re: Emission of store_multiple and load_multiple patterns

[noeljohn]

Ian Lance Taylor-3 wrote:
> 
> noeljohn <noel.daniel@gmx.com> writes:
> 
>>     I introduced MOVE_MAX and MOVE_RATIO macros. With this the gcc build
>> is
>> successful. But when I compile the .c file, I get a segmentation fault. 
>>     Are there any docs which will help in knowing the respective macros
>> required for the rodata section emission ? Awaiting for your help.
> 
> The gcc internal documentation is pretty good on this kind of thing.
> 
> http://gcc.gnu.org/onlinedocs/gccint/
> 
> Ian
> 
> 

Hello Sir,
      The rodata section is finally getting emitted. Thank you very much for
your help.

noeljohn


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Re: Emission of store_multiple and load_multiple patterns

[noeljohn]

Ian Lance Taylor-3 wrote:
> 
> noeljohn <noel.daniel@gmx.com> writes:
> 
>>     I introduced MOVE_MAX and MOVE_RATIO macros. With this the gcc build
>> is
>> successful. But when I compile the .c file, I get a segmentation fault. 
>>     Are there any docs which will help in knowing the respective macros
>> required for the rodata section emission ? Awaiting for your help.
> 
> The gcc internal documentation is pretty good on this kind of thing.
> 
> http://gcc.gnu.org/onlinedocs/gccint/
> 
> Ian
> 
> 


Hello Sir,
     As in the assembly code as I had posted in one the previous posts, we
see that that instructions stmia and ldmia are emitted to get the contents
from the rodata section to stack. But in my case even though I have defined
the patterns for multiple store and multiple load, in which case contents
could be loaded and stored continuously, individual store and load
instructions are getting a number of times. But I wanted the multiple load
and store instructions to get emitted. Please could you help me out of this
?
     Awaiting for your help. Thank you.

noeljohn 

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Re: Emission of store_multiple and load_multiple patterns

[Ian Lance Taylor]

noeljohn <noel.daniel@gmx.com> writes:

>      As in the assembly code as I had posted in one the previous posts, we
> see that that instructions stmia and ldmia are emitted to get the contents
> from the rodata section to stack. But in my case even though I have defined
> the patterns for multiple store and multiple load, in which case contents
> could be loaded and stored continuously, individual store and load
> instructions are getting a number of times. But I wanted the multiple load
> and store instructions to get emitted. Please could you help me out of this
> ?

I don't know.  You would need to provide a lot more information before
I could venture a suggestion.  But I don't think it would be useful
for you to provide all that information.  The gcc-help mailing list
works best when you ask a specific question.  I would encourage you to
use your own debugging skills first to narrow down what is happening
to the point which you find hard to understand.

Ian