Re: Re: [PATCH] RISC-V: Fine tune gather load RA constraint

["juzhe.zhong@rivai.ai" <juzhe.zhong@rivai.ai>]

[-- Attachment #1: Type: text/plain, Size: 1029 bytes --]

Hi, Jeff. I really hope the current "refine tune RA constraint" patches can be merged into GCC-13.
These patches are just making RA constraint to be consistent with RVV ISA after I double checked RVV ISA.
These RA constraints changing is very safe.
This is the last stuff that I want to make it into GCC-13. 

More patches I am gonna to send are going to expected to be merged into GCC-14.

Thanks.


juzhe.zhong@rivai.ai
 
From: Jeff Law
Date: 2023-03-15 02:08
To: juzhe.zhong; gcc-patches
CC: kito.cheng
Subject: Re: [PATCH] RISC-V: Fine tune gather load RA constraint
 
 
On 3/13/23 02:28, juzhe.zhong@rivai.ai wrote:
> From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
> 
> For DEST EEW < SOURCE EEW, we can partial overlap register
> according to RVV ISA.
> 
> gcc/ChangeLog:
> 
>          * config/riscv/vector.md: Fix RA constraint.
> 
> gcc/testsuite/ChangeLog:
> 
>          * gcc.target/riscv/rvv/base/narrow_constraint-12.c: New test.
Similarly.  I think this can wait for gcc-14.
 
jeff