* [PATCH, rs6000] Update altivec-7 testcase(s).
@ 2018-02-21 17:33 Will Schmidt
2018-02-22 18:06 ` Segher Boessenkool
0 siblings, 1 reply; 6+ messages in thread
From: Will Schmidt @ 2018-02-21 17:33 UTC (permalink / raw)
To: gcc-patches; +Cc: Segher Boessenkool, David Edelsohn, Bill Schmidt
Hi,
This patch moves the vsx related content from the altivec-7-be test into
a new vsx-7-be test.
This fixes up some test failures as seen on older power systems.
OK for trunk?
Thanks,
Will
[testsuite]
2018-02-21 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/altivec-7-be.c: Remove VSX content.
* gcc.target/powerpc/altivec-7.h: Remove VSX content.
* gcc.target/powerpc/vsx-7-be.c: New test. (Add VSX content).
diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-7-be.c b/gcc/testsuite/gcc.target/powerpc/altivec-7-be.c
index cbc31e6..9024159 100644
--- a/gcc/testsuite/gcc.target/powerpc/altivec-7-be.c
+++ b/gcc/testsuite/gcc.target/powerpc/altivec-7-be.c
@@ -19,17 +19,12 @@
*/
/* { dg-final { scan-assembler-times "vpkpx" 2 } } */
/* { dg-final { scan-assembler-times "vmulesb" 1 } } */
/* { dg-final { scan-assembler-times "vmulosb" 1 } } */
-/* { dg-final { scan-assembler-times "lxvd2x" 6 } } */
/* { dg-final { scan-assembler-times "lvewx" 2 } } */
/* { dg-final { scan-assembler-times "lvxl" 1 } } */
/* { dg-final { scan-assembler-times "vupklsh" 1 } } */
/* { dg-final { scan-assembler-times "vupkhsh" 1 } } */
-/* { dg-final { scan-assembler-times "xxlnor" 4 } } */
-/* { dg-final { scan-assembler-times "xxland" 4 } } */
-/* { dg-final { scan-assembler-times "xxlxor" 5 } } */
-/* { dg-final { scan-assembler-times "vupkhpx" 1 } } */
/* Source code for the test in altivec-7.h */
#include "altivec-7.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-7.h b/gcc/testsuite/gcc.target/powerpc/altivec-7.h
index ff87deb..4dedcd8 100644
--- a/gcc/testsuite/gcc.target/powerpc/altivec-7.h
+++ b/gcc/testsuite/gcc.target/powerpc/altivec-7.h
@@ -15,11 +15,10 @@ vector signed int *vecint;
vector signed short *vecshort;
vector unsigned char *vecuchar;
vector unsigned int *vecuint;
vector unsigned short *vecushort;
vector float *vecfloat;
-vector double *vecdouble;
int main ()
{
*vecfloat++ = vec_andc((vector bool int)vecint[0], vecfloat[1]);
*vecfloat++ = vec_andc(vecfloat[0], (vector bool int)vecint[1]);
@@ -41,10 +40,8 @@ int main ()
*vecushort++ = vec_vxor(vecushort[0], (vector bool short)vecshort[1]);
*vecuint++ = vec_ld(var_int[0], uintp[1]);
*vecuint++ = vec_lvx(var_int[0], uintp[1]);
*vecuint++ = vec_vmsumubm(vecuchar[0], vecuchar[1], vecuint[2]);
*vecuchar++ = vec_xor(vecuchar[0], (vector unsigned char)vecchar[1]);
- *vecdouble++ = vec_unpackl(vecfloat[0]);
- *vecdouble++ = vec_unpackh(vecfloat[0]);
return 0;
}
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-7-be.c b/gcc/testsuite/gcc.target/powerpc/vsx-7-be.c
new file mode 100644
index 0000000..d5bb309
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-7-be.c
@@ -0,0 +1,42 @@
+/* { dg-do compile { target powerpc64-*-* } } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx" } */
+
+/* This is an extension of altivec-7-be.c, with vsx target features included. */
+
+/* Expected results for Big Endian:
+(from altivec-7.h)
+ vec_packpx vpkpx
+ vec_ld lxv2x
+ vec_lde lvewx
+ vec_ldl lxvl
+ vec_lvewx lvewx
+ vec_andc xxnor
+ xxland
+ vec_vxor xxlxor
+ vec_vmsumubm vmsumubm
+ vec_vmulesb vmulesb
+ vec_vmulosb vmulosb
+(from vsx-7.h)
+ vec_unpackl vupkhsh
+ vec_unpackh vupklsh
+*/
+
+/* { dg-final { scan-assembler-times "vpkpx" 2 } } */
+/* { dg-final { scan-assembler-times "vmulesb" 1 } } */
+/* { dg-final { scan-assembler-times "vmulosb" 1 } } */
+/* { dg-final { scan-assembler-times "lxvd2x" 6 } } */
+/* { dg-final { scan-assembler-times "lvewx" 2 } } */
+/* { dg-final { scan-assembler-times "lvxl" 1 } } */
+/* { dg-final { scan-assembler-times "vupklsh" 1 } } */
+/* { dg-final { scan-assembler-times "vupkhsh" 1 } } */
+/* { dg-final { scan-assembler-times "xxlnor" 4 } } */
+/* { dg-final { scan-assembler-times "xxland" 4 } } */
+/* { dg-final { scan-assembler-times "xxlxor" 5 } } */
+/* { dg-final { scan-assembler-times "vupkhpx" 1 } } */
+
+/* Source code for the 'altivec' test in altivec-7.h */
+/* Source code for the 'vsx' required tests in vsx-7.h */
+
+#include "altivec-7.h"
+#include "vsx-7.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-7.h b/gcc/testsuite/gcc.target/powerpc/vsx-7.h
new file mode 100644
index 0000000..fe55472
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-7.h
@@ -0,0 +1,18 @@
+
+/* This test code is included into vsx-7-be.c.
+ * this is meant to supplement code in altivec-7.h. */
+
+#include <altivec.h>
+
+
+vector float *vecfloat;
+vector double *vecdouble;
+
+int main2 ()
+{
+
+ *vecdouble++ = vec_unpackl(vecfloat[0]);
+ *vecdouble++ = vec_unpackh(vecfloat[0]);
+
+ return 0;
+}
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH, rs6000] Update altivec-7 testcase(s).
2018-02-21 17:33 [PATCH, rs6000] Update altivec-7 testcase(s) Will Schmidt
@ 2018-02-22 18:06 ` Segher Boessenkool
2018-02-23 16:35 ` Will Schmidt
0 siblings, 1 reply; 6+ messages in thread
From: Segher Boessenkool @ 2018-02-22 18:06 UTC (permalink / raw)
To: Will Schmidt; +Cc: gcc-patches, David Edelsohn, Bill Schmidt
Hi Will,
On Wed, Feb 21, 2018 at 11:33:14AM -0600, Will Schmidt wrote:
> This patch moves the vsx related content from the altivec-7-be test into
> a new vsx-7-be test.
> This fixes up some test failures as seen on older power systems.
> --- /dev/null
> +++ b/gcc/testsuite/gcc.target/powerpc/vsx-7-be.c
> @@ -0,0 +1,42 @@
> +/* { dg-do compile { target powerpc64-*-* } } */
powerpc*-*-* please, and if you need 64-bit use lp64.
Otherwise fine. Okay for trunk with that fixed. Thanks!
(Is it useful to copy the altivec stuff here though? The altivec-7-be
test will be run as well).
Segher
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH, rs6000] Update altivec-7 testcase(s).
2018-02-22 18:06 ` Segher Boessenkool
@ 2018-02-23 16:35 ` Will Schmidt
2018-02-26 17:34 ` Segher Boessenkool
0 siblings, 1 reply; 6+ messages in thread
From: Will Schmidt @ 2018-02-23 16:35 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: gcc-patches, David Edelsohn, Bill Schmidt
On Thu, 2018-02-22 at 12:06 -0600, Segher Boessenkool wrote:
> Hi Will,
>
> On Wed, Feb 21, 2018 at 11:33:14AM -0600, Will Schmidt wrote:
> > This patch moves the vsx related content from the altivec-7-be test into
> > a new vsx-7-be test.
> > This fixes up some test failures as seen on older power systems.
>
> > --- /dev/null
> > +++ b/gcc/testsuite/gcc.target/powerpc/vsx-7-be.c
> > @@ -0,0 +1,42 @@
> > +/* { dg-do compile { target powerpc64-*-* } } */
>
> powerpc*-*-* please, and if you need 64-bit use lp64.
Thats an existing thing to help indicate 'be' versus 'le'.
altivec-7-be.c:/* { dg-do compile { target powerpc64-*-* } } */
altivec-7-le.c:/* { dg-do compile { target powerpc64le-*-* } } */
but yeah, we are potentially missing coverage for -m32.
Should I instead try to combine the le,be tests, and set target markers
on any le/be unique scan-assembler stanzas?
> Otherwise fine. Okay for trunk with that fixed. Thanks!
>
> (Is it useful to copy the altivec stuff here though? The altivec-7-be
> test will be run as well).
>
>
> Segher
>
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH, rs6000] Update altivec-7 testcase(s).
2018-02-23 16:35 ` Will Schmidt
@ 2018-02-26 17:34 ` Segher Boessenkool
2018-02-27 15:23 ` [PATCH, rs6000] (v2) " Will Schmidt
0 siblings, 1 reply; 6+ messages in thread
From: Segher Boessenkool @ 2018-02-26 17:34 UTC (permalink / raw)
To: Will Schmidt; +Cc: gcc-patches, David Edelsohn, Bill Schmidt
On Fri, Feb 23, 2018 at 10:35:43AM -0600, Will Schmidt wrote:
> On Thu, 2018-02-22 at 12:06 -0600, Segher Boessenkool wrote:
> > On Wed, Feb 21, 2018 at 11:33:14AM -0600, Will Schmidt wrote:
> > > This patch moves the vsx related content from the altivec-7-be test into
> > > a new vsx-7-be test.
> > > This fixes up some test failures as seen on older power systems.
> >
> > > --- /dev/null
> > > +++ b/gcc/testsuite/gcc.target/powerpc/vsx-7-be.c
> > > @@ -0,0 +1,42 @@
> > > +/* { dg-do compile { target powerpc64-*-* } } */
> >
> > powerpc*-*-* please, and if you need 64-bit use lp64.
>
> Thats an existing thing to help indicate 'be' versus 'le'.
But it does not really work.
> altivec-7-be.c:/* { dg-do compile { target powerpc64-*-* } } */
> altivec-7-le.c:/* { dg-do compile { target powerpc64le-*-* } } */
>
> but yeah, we are potentially missing coverage for -m32.
>
> Should I instead try to combine the le,be tests, and set target markers
> on any le/be unique scan-assembler stanzas?
We really want "we're compiling for BE / LE" targets selectors. I'll
look into it, I guess.
Segher
^ permalink raw reply [flat|nested] 6+ messages in thread
* [PATCH, rs6000] (v2) Update altivec-7 testcase(s).
2018-02-26 17:34 ` Segher Boessenkool
@ 2018-02-27 15:23 ` Will Schmidt
2018-02-28 22:12 ` Segher Boessenkool
0 siblings, 1 reply; 6+ messages in thread
From: Will Schmidt @ 2018-02-27 15:23 UTC (permalink / raw)
To: Segher Boessenkool; +Cc: gcc-patches, David Edelsohn, Bill Schmidt
Hi,
V2 update to incorporate suggested changes.
Move the vsx related content from the altivec-7-be test into
a new vsx-7-be test. Split out the VSX specific bits into a vsx-7.h
header file, and include that when appropriate.
(v2 updates). Adjust target stanza to allow 32bit targets to run test.
Updated scan-assembler stanzas to accommodate codegen variations involving
lxvd2x in BE versus LE versus P9. Sniff tested across p6-p9 systems
with -m32,-m64. Test currently runs clean.
This fixes up results as seen on some power systems.
[testsuite]
2018-02-27 Will Schmidt <will_schmidt@vnet.ibm.com>
* gcc.target/powerpc/altivec-7-be.c: Remove VSX content, allow
-32 bit target.
* gcc.target/powerpc/altivec-7.h: Remove VSX content.
* gcc.target/powerpc/vsx-7-be.c: New test (VSX content).
* gcc.target/powerpc/vsx-7.h: New include (VSX content).
* gcc.target/powerpc/altivec-7-le.c: Add vsx-7.h include.
diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-7-be.c b/gcc/testsuite/gcc.target/powerpc/altivec-7-be.c
index cbc31e6..1e690be 100644
--- a/gcc/testsuite/gcc.target/powerpc/altivec-7-be.c
+++ b/gcc/testsuite/gcc.target/powerpc/altivec-7-be.c
@@ -1,12 +1,12 @@
-/* { dg-do compile { target powerpc64-*-* } } */
+/* { dg-do compile { target powerpc*-*-* } } */
/* { dg-require-effective-target powerpc_altivec_ok } */
/* { dg-options "-maltivec" } */
/* Expected results for Big Endian:
vec_packpx vpkpx
- vec_ld lxv2x
+ vec_ld lxvd2x
vec_lde lvewx
vec_ldl lxvl
vec_lvewx lvewx
vec_unpackh vupklsh
vec_unpackl vupkhsh
@@ -19,17 +19,12 @@
*/
/* { dg-final { scan-assembler-times "vpkpx" 2 } } */
/* { dg-final { scan-assembler-times "vmulesb" 1 } } */
/* { dg-final { scan-assembler-times "vmulosb" 1 } } */
-/* { dg-final { scan-assembler-times "lxvd2x" 6 } } */
/* { dg-final { scan-assembler-times "lvewx" 2 } } */
/* { dg-final { scan-assembler-times "lvxl" 1 } } */
/* { dg-final { scan-assembler-times "vupklsh" 1 } } */
/* { dg-final { scan-assembler-times "vupkhsh" 1 } } */
-/* { dg-final { scan-assembler-times "xxlnor" 4 } } */
-/* { dg-final { scan-assembler-times "xxland" 4 } } */
-/* { dg-final { scan-assembler-times "xxlxor" 5 } } */
-/* { dg-final { scan-assembler-times "vupkhpx" 1 } } */
/* Source code for the test in altivec-7.h */
#include "altivec-7.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-7-le.c b/gcc/testsuite/gcc.target/powerpc/altivec-7-le.c
index 6f895336..38ce153 100644
--- a/gcc/testsuite/gcc.target/powerpc/altivec-7-le.c
+++ b/gcc/testsuite/gcc.target/powerpc/altivec-7-le.c
@@ -30,7 +30,8 @@
/* { dg-final { scan-assembler-times "xxlnor" 4 } } */
/* { dg-final { scan-assembler-times "xxland" 4 } } */
/* { dg-final { scan-assembler-times "xxlxor" 5 } } */
/* { dg-final { scan-assembler-times "vupkhpx" 1 } } */
-/* Source code for the test in altivec-7.h */
+/* Source code for the test in altivec-7.h and vsx-7.h. */
#include "altivec-7.h"
+#include "vsx-7.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/altivec-7.h b/gcc/testsuite/gcc.target/powerpc/altivec-7.h
index ff87deb..4dedcd8 100644
--- a/gcc/testsuite/gcc.target/powerpc/altivec-7.h
+++ b/gcc/testsuite/gcc.target/powerpc/altivec-7.h
@@ -15,11 +15,10 @@ vector signed int *vecint;
vector signed short *vecshort;
vector unsigned char *vecuchar;
vector unsigned int *vecuint;
vector unsigned short *vecushort;
vector float *vecfloat;
-vector double *vecdouble;
int main ()
{
*vecfloat++ = vec_andc((vector bool int)vecint[0], vecfloat[1]);
*vecfloat++ = vec_andc(vecfloat[0], (vector bool int)vecint[1]);
@@ -41,10 +40,8 @@ int main ()
*vecushort++ = vec_vxor(vecushort[0], (vector bool short)vecshort[1]);
*vecuint++ = vec_ld(var_int[0], uintp[1]);
*vecuint++ = vec_lvx(var_int[0], uintp[1]);
*vecuint++ = vec_vmsumubm(vecuchar[0], vecuchar[1], vecuint[2]);
*vecuchar++ = vec_xor(vecuchar[0], (vector unsigned char)vecchar[1]);
- *vecdouble++ = vec_unpackl(vecfloat[0]);
- *vecdouble++ = vec_unpackh(vecfloat[0]);
return 0;
}
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-7-be.c b/gcc/testsuite/gcc.target/powerpc/vsx-7-be.c
new file mode 100644
index 0000000..52bcc43
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-7-be.c
@@ -0,0 +1,46 @@
+/* { dg-do compile { target powerpc*-*-* } } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx" } */
+
+/* This is an extension of altivec-7-be.c, with vsx target features included. */
+
+/* Expected results for Big Endian:
+(from altivec-7.h)
+ vec_packpx vpkpx
+ vec_ld lxvd2x
+ vec_lde lvewx
+ vec_ldl lxvl
+ vec_lvewx lvewx
+ vec_andc xxnor
+ xxland
+ vec_vxor xxlxor
+ vec_vmsumubm vmsumubm
+ vec_vmulesb vmulesb
+ vec_vmulosb vmulosb
+(from vsx-7.h)
+ vec_unpackl vupkhsh
+ vec_unpackh vupklsh
+*/
+
+/* { dg-final { scan-assembler-times "vpkpx" 2 } } */
+/* { dg-final { scan-assembler-times "vmulesb" 1 } } */
+/* { dg-final { scan-assembler-times "vmulosb" 1 } } */
+
+/* { dg-final { scan-assembler-times {\mlxvd2x\M} 0 { target { p9vector_hw } } } } */
+/* { dg-final { scan-assembler-times {\mlxvd2x\M} 36 { target { { ! powerpc_p9vector_ok } && powerpc*le-*-* } } } } */
+/* { dg-final { scan-assembler-times {\mlxvd2x\M} 6 { target { ! powerpc*le-*-* } } } } */
+
+/* { dg-final { scan-assembler-times "lvewx" 2 } } */
+/* { dg-final { scan-assembler-times "lvxl" 1 } } */
+/* { dg-final { scan-assembler-times "vupklsh" 1 } } */
+/* { dg-final { scan-assembler-times "vupkhsh" 1 } } */
+/* { dg-final { scan-assembler-times "xxlnor" 4 } } */
+/* { dg-final { scan-assembler-times "xxland" 4 } } */
+/* { dg-final { scan-assembler-times "xxlxor" 5 } } */
+/* { dg-final { scan-assembler-times "vupkhpx" 1 } } */
+
+/* Source code for the 'altivec' test in altivec-7.h */
+/* Source code for the 'vsx' required tests in vsx-7.h */
+
+#include "altivec-7.h"
+#include "vsx-7.h"
diff --git a/gcc/testsuite/gcc.target/powerpc/vsx-7.h b/gcc/testsuite/gcc.target/powerpc/vsx-7.h
new file mode 100644
index 0000000..fe55472
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/vsx-7.h
@@ -0,0 +1,18 @@
+
+/* This test code is included into vsx-7-be.c.
+ * this is meant to supplement code in altivec-7.h. */
+
+#include <altivec.h>
+
+
+vector float *vecfloat;
+vector double *vecdouble;
+
+int main2 ()
+{
+
+ *vecdouble++ = vec_unpackl(vecfloat[0]);
+ *vecdouble++ = vec_unpackh(vecfloat[0]);
+
+ return 0;
+}
^ permalink raw reply [flat|nested] 6+ messages in thread
* Re: [PATCH, rs6000] (v2) Update altivec-7 testcase(s).
2018-02-27 15:23 ` [PATCH, rs6000] (v2) " Will Schmidt
@ 2018-02-28 22:12 ` Segher Boessenkool
0 siblings, 0 replies; 6+ messages in thread
From: Segher Boessenkool @ 2018-02-28 22:12 UTC (permalink / raw)
To: Will Schmidt; +Cc: gcc-patches, David Edelsohn, Bill Schmidt
Hi Will,
On Tue, Feb 27, 2018 at 09:23:12AM -0600, Will Schmidt wrote:
> Move the vsx related content from the altivec-7-be test into
> a new vsx-7-be test. Split out the VSX specific bits into a vsx-7.h
> header file, and include that when appropriate.
> * gcc.target/powerpc/altivec-7-be.c: Remove VSX content, allow
> -32 bit target.
Only one space after ":". "32-bit target".
> +/* { dg-final { scan-assembler-times {\mlxvd2x\M} 0 { target { p9vector_hw } } } } */
> +/* { dg-final { scan-assembler-times {\mlxvd2x\M} 36 { target { { ! powerpc_p9vector_ok } && powerpc*le-*-* } } } } */
> +/* { dg-final { scan-assembler-times {\mlxvd2x\M} 6 { target { ! powerpc*le-*-* } } } } */
These three conditions are overlapping, and don't cover everything?
The first and the third are both enabled when running on a BE p9 system
(not that those exist, but still).
None are active if compiling for LE p9 on another LE system.
Should the first line have {powerpc*le-*-* && p9vector_ok} instead?
Okay for trunk with that sorted out. Thanks!
Segher
^ permalink raw reply [flat|nested] 6+ messages in thread
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2018-02-21 17:33 [PATCH, rs6000] Update altivec-7 testcase(s) Will Schmidt
2018-02-22 18:06 ` Segher Boessenkool
2018-02-23 16:35 ` Will Schmidt
2018-02-26 17:34 ` Segher Boessenkool
2018-02-27 15:23 ` [PATCH, rs6000] (v2) " Will Schmidt
2018-02-28 22:12 ` Segher Boessenkool
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