[PATCH] RISC-V: Generate helpers for cbranch4

[PATCH] RISC-V: Generate helpers for cbranch4

[Christoph Muellner]

On RISC-V we are facing the fact, that our conditional branches
require Pmode conditions. Currently, we generate them explicitly
with a check for Pmode and then calling the proper generator
(i.e. gen_cbranchdi4 on RV64 and gen_cbranchsi4 on RV32).
Let's simplify this code by generating the INSN helpers
and use gen_cbranch4 (Pmode).

    gcc/
        PR 100266
        * config/rsicv/riscv.c (riscv_block_move_loop): Simplify.
        * config/rsicv/riscv.md (cbranch<mode>4): Generate helpers.
---
 gcc/config/riscv/riscv.c  |  5 +----
 gcc/config/riscv/riscv.md | 12 ++++--------
 2 files changed, 5 insertions(+), 12 deletions(-)

diff --git a/gcc/config/riscv/riscv.c b/gcc/config/riscv/riscv.c
index e1064e374eb0..27665e5b58f9 100644
--- a/gcc/config/riscv/riscv.c
+++ b/gcc/config/riscv/riscv.c
@@ -3258,10 +3258,7 @@ riscv_block_move_loop (rtx dest, rtx src, unsigned HOST_WIDE_INT length,
 
   /* Emit the loop condition.  */
   test = gen_rtx_NE (VOIDmode, src_reg, final_src);
-  if (Pmode == DImode)
-    emit_jump_insn (gen_cbranchdi4 (test, src_reg, final_src, label));
-  else
-    emit_jump_insn (gen_cbranchsi4 (test, src_reg, final_src, label));
+  emit_jump_insn (gen_cbranch4 (Pmode, test, src_reg, final_src, label));
 
   /* Mop up any left-over bytes.  */
   if (leftover)
diff --git a/gcc/config/riscv/riscv.md b/gcc/config/riscv/riscv.md
index 0e35960fefaa..f88877fd5966 100644
--- a/gcc/config/riscv/riscv.md
+++ b/gcc/config/riscv/riscv.md
@@ -2153,7 +2153,7 @@
 		      (label_ref (match_operand 1))
 		      (pc)))])
 
-(define_expand "cbranch<mode>4"
+(define_expand "@cbranch<mode>4"
   [(set (pc)
 	(if_then_else (match_operator 0 "comparison_operator"
 		      [(match_operand:BR 1 "register_operand")
@@ -2167,7 +2167,7 @@
   DONE;
 })
 
-(define_expand "cbranch<mode>4"
+(define_expand "@cbranch<mode>4"
   [(set (pc)
 	(if_then_else (match_operator 0 "fp_branch_comparison"
 		       [(match_operand:ANYF 1 "register_operand")
@@ -2829,12 +2829,8 @@
 					        operands[0],
 					        operands[1]));
 
-  if (mode == DImode)
-    emit_jump_insn (gen_cbranchdi4 (gen_rtx_EQ (VOIDmode, result, const0_rtx),
-				    result, const0_rtx, operands[2]));
-  else
-    emit_jump_insn (gen_cbranchsi4 (gen_rtx_EQ (VOIDmode, result, const0_rtx),
-				    result, const0_rtx, operands[2]));
+  rtx cond = gen_rtx_EQ (VOIDmode, result, const0_rtx);
+  emit_jump_insn (gen_cbranch4 (mode, cond, result, const0_rtx, operands[2]));
 
   DONE;
 })
-- 
2.31.1

Re: [PATCH] RISC-V: Generate helpers for cbranch4

[Jim Wilson]

On Wed, May 5, 2021 at 12:23 PM Christoph Muellner <cmuellner@gcc.gnu.org>
wrote:

>     gcc/
>         PR 100266
>         * config/rsicv/riscv.c (riscv_block_move_loop): Simplify.
>         * config/rsicv/riscv.md (cbranch<mode>4): Generate helpers.
>

OK.  Committed.  Though I had to fix the ChangeLog entry.  It was indented
by spaces instead of tabs.  The PR line is missing the component (target).
riscv is misspelled twice as rsicv.  And it doesn't mention the
stack_protect_test change.  The gcc commit hooks complained about most of
this stuff.  It seems fairly good at finding minor ChangeLog issues.

Jim