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From: Segher Boessenkool <segher@kernel.crashing.org>
To: Peter Bergner <bergner@linux.ibm.com>
Cc: "Kewen.Lin" <linkw@linux.ibm.com>,
	GCC Patches <gcc-patches@gcc.gnu.org>,
	David Edelsohn <dje.gcc@gmail.com>
Subject: Re: [PATCH] rs6000/test: Fix bswap64-4.c with has_arch_ppc64 [PR106680]
Date: Wed, 31 Aug 2022 14:28:39 -0500	[thread overview]
Message-ID: <20220831192839.GT25951@gate.crashing.org> (raw)
In-Reply-To: <16dc8d80-44d5-b739-b4a8-d02a01943d49@linux.ibm.com>

On Wed, Aug 31, 2022 at 12:00:14PM -0500, Peter Bergner wrote:
> On 8/31/22 11:05 AM, Segher Boessenkool wrote:
> > On Wed, Aug 31, 2022 at 10:48:26AM -0500, Peter Bergner wrote:
> >> Ditto for -msoft-float better disable any -maltivec and -mvsx, etc.
> > 
> > Oh?  Why should it disable -maltivec?  -mvsx makes a little sense on
> > one hand, but totally none on the other either.
> 
> VSX has to be disabled, since VSX replies on the FP registers existing.

It doesn't?  On a CPU supporting VSX the FP registers are overlaid on
the VSX registers, not the other way around.

GCC says
  cc1: warning: '-mvsx' requires hardware floating point
and that's okay with me of course, but it doesn't say why it is
required.  Implementation convenience coupled with lack of a use case
is my best guess :-)

OTOH VMX and hard float are completely orthogonal (the VMX FP things do
not even use the fpscr for example).

> As for Altivec, I'm pretty sure there are some inherent dependencies
> there, probably both in hardware and our GCC backend implementation.
> I could be wrong, but my guess is things will fall over the ground
> if as allow -maltivec along with -msoft-float.  Does the linux kernel
> only build with -msoft-float assuming it disables altivec and vsx?
> Or does it explicitly always also add -mno-altivec?

No.  Instead, it just works!

Try this:
===
typedef float vf __attribute__((vector_size(16)));
vf f(float x)
{
	x *= 42;
	return (vf){x, x, x, x};
}
===
with -maltivec -msoft-float.  It does not use the FPRs, and it does use
the VMX registers and VMX instructions.

> So in linux*.h, we have the following which came from a 2004 commit from Alan:
> 
> linux64.h:#define OS_MISSING_POWERPC64 !TARGET_64BIT

That macro returns 1 on OSes that do not properly support -mpowerpc64.

> ...so I think there was no real reason, other than old 64-bit linux kernels didn't
> save the upper register state in 32-bit mode binaries.

And it is still not saved in 32-bit user mode (setjmp/longjmp and
getcontext/setcontext).  Most bigger programs will fail, and most
smaller programs (including everything in the GCC testsuite) work fine.
But we should not enable -mpowerpc64 on 32-bit Linux by default.


Segher

  reply	other threads:[~2022-08-31 19:29 UTC|newest]

Thread overview: 22+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2022-08-31  9:33 Kewen.Lin
2022-08-31 14:13 ` Peter Bergner
2022-09-01  8:57   ` Kewen.Lin
2022-09-01 14:57     ` Segher Boessenkool
2022-09-02  0:50       ` Kewen.Lin
2022-09-02 17:36         ` Segher Boessenkool
2022-09-05  2:25           ` Kewen.Lin
2022-08-31 15:24 ` Segher Boessenkool
2022-08-31 15:48   ` Peter Bergner
2022-08-31 16:05     ` Segher Boessenkool
2022-08-31 17:00       ` Peter Bergner
2022-08-31 19:28         ` Segher Boessenkool [this message]
2022-08-31 19:53           ` Peter Bergner
2022-08-31 21:07             ` Segher Boessenkool
2022-08-31 21:38               ` Peter Bergner
2022-08-31 21:49                 ` Segher Boessenkool
2022-08-31 22:17                   ` Peter Bergner
2022-09-01  9:05   ` Kewen.Lin
2022-09-01 15:04     ` Segher Boessenkool
2022-09-02  0:51       ` Kewen.Lin
2022-09-02 17:44         ` Segher Boessenkool
2022-09-05  2:35           ` Kewen.Lin

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