public inbox for gcc-patches@gcc.gnu.org
 help / color / mirror / Atom feed
* [PATCH] RISC-V: Move function place to make it looks better.
@ 2022-10-11  4:48 juzhe.zhong
  2022-10-12 13:02 ` Kito Cheng
  0 siblings, 1 reply; 2+ messages in thread
From: juzhe.zhong @ 2022-10-11  4:48 UTC (permalink / raw)
  To: gcc-patches; +Cc: kito.cheng, Ju-Zhe Zhong

From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>

gcc/ChangeLog:

        * config/riscv/riscv-vector-builtins.cc (rvv_switcher::rvv_switcher): Move down like ARM SVE.
        (rvv_switcher::~rvv_switcher): Move down like ARM SVE.
        (mangle_builtin_type): Move down to make it together with other global function.
        (class rvv_switcher): Move from riscv-vector-builtins.h.
        * config/riscv/riscv-vector-builtins.h (class rvv_switcher): Move to riscv-vector-builtins.cc.

---
 gcc/config/riscv/riscv-vector-builtins.cc | 79 ++++++++++++++---------
 gcc/config/riscv/riscv-vector-builtins.h  | 19 ------
 2 files changed, 49 insertions(+), 49 deletions(-)

diff --git a/gcc/config/riscv/riscv-vector-builtins.cc b/gcc/config/riscv/riscv-vector-builtins.cc
index 7033b1fc176..6fd1bb0fcb2 100644
--- a/gcc/config/riscv/riscv-vector-builtins.cc
+++ b/gcc/config/riscv/riscv-vector-builtins.cc
@@ -86,23 +86,6 @@ static GTY(()) tree abi_vector_types[NUM_VECTOR_TYPES + 1];
 extern GTY(()) tree builtin_vector_types[MAX_TUPLE_SIZE][NUM_VECTOR_TYPES + 1];
 tree builtin_vector_types[MAX_TUPLE_SIZE][NUM_VECTOR_TYPES + 1];
 
-rvv_switcher::rvv_switcher ()
-{
-  /* Set have_regs_of_mode before targetm.init_builtins ().  */
-  memcpy (m_old_have_regs_of_mode, have_regs_of_mode,
-	  sizeof (have_regs_of_mode));
-  for (int i = 0; i < NUM_MACHINE_MODES; ++i)
-    if (riscv_v_ext_enabled_vector_mode_p ((machine_mode) i))
-      have_regs_of_mode[i] = true;
-}
-
-rvv_switcher::~rvv_switcher ()
-{
-  /* Recover back have_regs_of_mode.  */
-  memcpy (have_regs_of_mode, m_old_have_regs_of_mode,
-	  sizeof (have_regs_of_mode));
-}
-
 /* Add type attributes to builtin type tree, currently only the mangled name. */
 static void
 add_vector_type_attribute (tree type, const char *mangled_name)
@@ -140,19 +123,6 @@ lookup_vector_type_attribute (const_tree type)
   return lookup_attribute ("RVV type", TYPE_ATTRIBUTES (type));
 }
 
-/* If TYPE is a built-in type defined by the RVV ABI, return the mangled name,
-   otherwise return NULL.  */
-const char *
-mangle_builtin_type (const_tree type)
-{
-  if (TYPE_NAME (type) && TREE_CODE (TYPE_NAME (type)) == TYPE_DECL)
-    type = TREE_TYPE (TYPE_NAME (type));
-  if (tree attr = lookup_vector_type_attribute (type))
-    if (tree id = TREE_VALUE (chain_index (0, TREE_VALUE (attr))))
-      return IDENTIFIER_POINTER (id);
-  return NULL;
-}
-
 /* Register the built-in RVV ABI types, such as __rvv_int32m1_t.  */
 static void
 register_builtin_types ()
@@ -231,6 +201,55 @@ register_vector_type (vector_type_index type)
   builtin_vector_types[0][type] = vectype;
 }
 
+/* RAII class for enabling enough RVV features to define the built-in
+   types and implement the riscv_vector.h pragma.
+
+   Note: According to 'TYPE_MODE' macro implementation, we need set
+   have_regs_of_mode[mode] to be true if we want to get the exact mode
+   from 'TYPE_MODE'. However, have_regs_of_mode has not been set yet in
+   targetm.init_builtins (). We need rvv_switcher to set have_regs_of_mode
+   before targetm.init_builtins () and recover back have_regs_of_mode
+   after targetm.init_builtins ().  */
+class rvv_switcher
+{
+public:
+  rvv_switcher ();
+  ~rvv_switcher ();
+
+private:
+  bool m_old_have_regs_of_mode[MAX_MACHINE_MODE];
+};
+
+rvv_switcher::rvv_switcher ()
+{
+  /* Set have_regs_of_mode before targetm.init_builtins ().  */
+  memcpy (m_old_have_regs_of_mode, have_regs_of_mode,
+	  sizeof (have_regs_of_mode));
+  for (int i = 0; i < NUM_MACHINE_MODES; ++i)
+    if (riscv_v_ext_enabled_vector_mode_p ((machine_mode) i))
+      have_regs_of_mode[i] = true;
+}
+
+rvv_switcher::~rvv_switcher ()
+{
+  /* Recover back have_regs_of_mode.  */
+  memcpy (have_regs_of_mode, m_old_have_regs_of_mode,
+	  sizeof (have_regs_of_mode));
+}
+
+/* If TYPE is a built-in type defined by the RVV ABI, return the mangled name,
+   otherwise return NULL.  */
+const char *
+mangle_builtin_type (const_tree type)
+{
+  if (TYPE_NAME (type) && TREE_CODE (TYPE_NAME (type)) == TYPE_DECL)
+    type = TREE_TYPE (TYPE_NAME (type));
+  if (tree attr = lookup_vector_type_attribute (type))
+    if (tree id = TREE_VALUE (chain_index (0, TREE_VALUE (attr))))
+      return IDENTIFIER_POINTER (id);
+  return NULL;
+}
+
 /* Initialize all compiler built-ins related to RVV that should be
    defined at start-up.  */
 void
diff --git a/gcc/config/riscv/riscv-vector-builtins.h b/gcc/config/riscv/riscv-vector-builtins.h
index ec85e0b1320..5c01a760657 100644
--- a/gcc/config/riscv/riscv-vector-builtins.h
+++ b/gcc/config/riscv/riscv-vector-builtins.h
@@ -36,25 +36,6 @@ enum vector_type_index
   NUM_VECTOR_TYPES
 };
 
-/* RAII class for enabling enough RVV features to define the built-in
-   types and implement the riscv_vector.h pragma.
-
-   Note: According to 'TYPE_MODE' macro implementation, we need set
-   have_regs_of_mode[mode] to be true if we want to get the exact mode
-   from 'TYPE_MODE'. However, have_regs_of_mode has not been set yet in
-   targetm.init_builtins (). We need rvv_switcher to set have_regs_of_mode
-   before targetm.init_builtins () and recover back have_regs_of_mode
-   after targetm.init_builtins ().  */
-class rvv_switcher
-{
-public:
-  rvv_switcher ();
-  ~rvv_switcher ();
-
-private:
-  bool m_old_have_regs_of_mode[MAX_MACHINE_MODE];
-};
-
 } // end namespace riscv_vector
 
 #endif
-- 
2.36.1



^ permalink raw reply	[flat|nested] 2+ messages in thread

* Re: [PATCH] RISC-V: Move function place to make it looks better.
  2022-10-11  4:48 [PATCH] RISC-V: Move function place to make it looks better juzhe.zhong
@ 2022-10-12 13:02 ` Kito Cheng
  0 siblings, 0 replies; 2+ messages in thread
From: Kito Cheng @ 2022-10-12 13:02 UTC (permalink / raw)
  To: juzhe.zhong; +Cc: gcc-patches

Moving class declaration to theriscv-vector-builtins.cc file is not
bad idea since the only user is riscv-vector-builtins.cc,
but I don't think moving other code for consistent with ARM's code is
reasonable,
anyway committed with only class declaration movement,

NOTE: I've off-list conversion with Ju-Zhe with this.


On Tue, Oct 11, 2022 at 12:48 PM <juzhe.zhong@rivai.ai> wrote:
>
> From: Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
>
> gcc/ChangeLog:
>
>         * config/riscv/riscv-vector-builtins.cc (rvv_switcher::rvv_switcher): Move down like ARM SVE.
>         (rvv_switcher::~rvv_switcher): Move down like ARM SVE.
>         (mangle_builtin_type): Move down to make it together with other global function.
>         (class rvv_switcher): Move from riscv-vector-builtins.h.
>         * config/riscv/riscv-vector-builtins.h (class rvv_switcher): Move to riscv-vector-builtins.cc.
>
> ---
>  gcc/config/riscv/riscv-vector-builtins.cc | 79 ++++++++++++++---------
>  gcc/config/riscv/riscv-vector-builtins.h  | 19 ------
>  2 files changed, 49 insertions(+), 49 deletions(-)
>
> diff --git a/gcc/config/riscv/riscv-vector-builtins.cc b/gcc/config/riscv/riscv-vector-builtins.cc
> index 7033b1fc176..6fd1bb0fcb2 100644
> --- a/gcc/config/riscv/riscv-vector-builtins.cc
> +++ b/gcc/config/riscv/riscv-vector-builtins.cc
> @@ -86,23 +86,6 @@ static GTY(()) tree abi_vector_types[NUM_VECTOR_TYPES + 1];
>  extern GTY(()) tree builtin_vector_types[MAX_TUPLE_SIZE][NUM_VECTOR_TYPES + 1];
>  tree builtin_vector_types[MAX_TUPLE_SIZE][NUM_VECTOR_TYPES + 1];
>
> -rvv_switcher::rvv_switcher ()
> -{
> -  /* Set have_regs_of_mode before targetm.init_builtins ().  */
> -  memcpy (m_old_have_regs_of_mode, have_regs_of_mode,
> -         sizeof (have_regs_of_mode));
> -  for (int i = 0; i < NUM_MACHINE_MODES; ++i)
> -    if (riscv_v_ext_enabled_vector_mode_p ((machine_mode) i))
> -      have_regs_of_mode[i] = true;
> -}
> -
> -rvv_switcher::~rvv_switcher ()
> -{
> -  /* Recover back have_regs_of_mode.  */
> -  memcpy (have_regs_of_mode, m_old_have_regs_of_mode,
> -         sizeof (have_regs_of_mode));
> -}
> -
>  /* Add type attributes to builtin type tree, currently only the mangled name. */
>  static void
>  add_vector_type_attribute (tree type, const char *mangled_name)
> @@ -140,19 +123,6 @@ lookup_vector_type_attribute (const_tree type)
>    return lookup_attribute ("RVV type", TYPE_ATTRIBUTES (type));
>  }
>
> -/* If TYPE is a built-in type defined by the RVV ABI, return the mangled name,
> -   otherwise return NULL.  */
> -const char *
> -mangle_builtin_type (const_tree type)
> -{
> -  if (TYPE_NAME (type) && TREE_CODE (TYPE_NAME (type)) == TYPE_DECL)
> -    type = TREE_TYPE (TYPE_NAME (type));
> -  if (tree attr = lookup_vector_type_attribute (type))
> -    if (tree id = TREE_VALUE (chain_index (0, TREE_VALUE (attr))))
> -      return IDENTIFIER_POINTER (id);
> -  return NULL;
> -}
> -
>  /* Register the built-in RVV ABI types, such as __rvv_int32m1_t.  */
>  static void
>  register_builtin_types ()
> @@ -231,6 +201,55 @@ register_vector_type (vector_type_index type)
>    builtin_vector_types[0][type] = vectype;
>  }
>
> +/* RAII class for enabling enough RVV features to define the built-in
> +   types and implement the riscv_vector.h pragma.
> +
> +   Note: According to 'TYPE_MODE' macro implementation, we need set
> +   have_regs_of_mode[mode] to be true if we want to get the exact mode
> +   from 'TYPE_MODE'. However, have_regs_of_mode has not been set yet in
> +   targetm.init_builtins (). We need rvv_switcher to set have_regs_of_mode
> +   before targetm.init_builtins () and recover back have_regs_of_mode
> +   after targetm.init_builtins ().  */
> +class rvv_switcher
> +{
> +public:
> +  rvv_switcher ();
> +  ~rvv_switcher ();
> +
> +private:
> +  bool m_old_have_regs_of_mode[MAX_MACHINE_MODE];
> +};
> +
> +rvv_switcher::rvv_switcher ()
> +{
> +  /* Set have_regs_of_mode before targetm.init_builtins ().  */
> +  memcpy (m_old_have_regs_of_mode, have_regs_of_mode,
> +         sizeof (have_regs_of_mode));
> +  for (int i = 0; i < NUM_MACHINE_MODES; ++i)
> +    if (riscv_v_ext_enabled_vector_mode_p ((machine_mode) i))
> +      have_regs_of_mode[i] = true;
> +}
> +
> +rvv_switcher::~rvv_switcher ()
> +{
> +  /* Recover back have_regs_of_mode.  */
> +  memcpy (have_regs_of_mode, m_old_have_regs_of_mode,
> +         sizeof (have_regs_of_mode));
> +}
> +
> +/* If TYPE is a built-in type defined by the RVV ABI, return the mangled name,
> +   otherwise return NULL.  */
> +const char *
> +mangle_builtin_type (const_tree type)
> +{
> +  if (TYPE_NAME (type) && TREE_CODE (TYPE_NAME (type)) == TYPE_DECL)
> +    type = TREE_TYPE (TYPE_NAME (type));
> +  if (tree attr = lookup_vector_type_attribute (type))
> +    if (tree id = TREE_VALUE (chain_index (0, TREE_VALUE (attr))))
> +      return IDENTIFIER_POINTER (id);
> +  return NULL;
> +}
> +
>  /* Initialize all compiler built-ins related to RVV that should be
>     defined at start-up.  */
>  void
> diff --git a/gcc/config/riscv/riscv-vector-builtins.h b/gcc/config/riscv/riscv-vector-builtins.h
> index ec85e0b1320..5c01a760657 100644
> --- a/gcc/config/riscv/riscv-vector-builtins.h
> +++ b/gcc/config/riscv/riscv-vector-builtins.h
> @@ -36,25 +36,6 @@ enum vector_type_index
>    NUM_VECTOR_TYPES
>  };
>
> -/* RAII class for enabling enough RVV features to define the built-in
> -   types and implement the riscv_vector.h pragma.
> -
> -   Note: According to 'TYPE_MODE' macro implementation, we need set
> -   have_regs_of_mode[mode] to be true if we want to get the exact mode
> -   from 'TYPE_MODE'. However, have_regs_of_mode has not been set yet in
> -   targetm.init_builtins (). We need rvv_switcher to set have_regs_of_mode
> -   before targetm.init_builtins () and recover back have_regs_of_mode
> -   after targetm.init_builtins ().  */
> -class rvv_switcher
> -{
> -public:
> -  rvv_switcher ();
> -  ~rvv_switcher ();
> -
> -private:
> -  bool m_old_have_regs_of_mode[MAX_MACHINE_MODE];
> -};
> -
>  } // end namespace riscv_vector
>
>  #endif
> --
> 2.36.1
>
>

^ permalink raw reply	[flat|nested] 2+ messages in thread

end of thread, other threads:[~2022-10-12 13:02 UTC | newest]

Thread overview: 2+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2022-10-11  4:48 [PATCH] RISC-V: Move function place to make it looks better juzhe.zhong
2022-10-12 13:02 ` Kito Cheng

This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for read-only IMAP folder(s) and NNTP newsgroup(s).